llvm-project/llvm/test/CodeGen/AArch64
Jonas Paulsson 122efef8ee Revert "Reapply "[CodeGen] Add new pass for late cleanup of redundant definitions.""
This reverts commit 17db0de330.

Some more bots got broken - need to investigate.
2022-12-05 00:52:00 +01:00
..
GlobalISel AArch64/GlobalISel: Convert tests to opaque pointers 2022-12-02 16:19:38 -05:00
2s-complement-asm.ll
128bit_load_store.ll
DAGCombine_vscale.ll [SVE] Expand DUPM patterns to handle all integer vector types. 2022-08-05 16:00:08 +00:00
O0-pipeline.ll [X86] Add ExpandLargeFpConvert Pass and enable for X86 2022-12-01 13:47:43 +08:00
O3-pipeline.ll Revert "Reapply "[CodeGen] Add new pass for late cleanup of redundant definitions."" 2022-12-05 00:52:00 +01:00
PBQP-chain.ll
PBQP-coalesce-benefit.ll
PBQP-csr.ll
PBQP.ll
PHIElimination-crash.mir
PHIElimination-debugloc.mir
README
Redundantstore.ll
a55-fuse-address.mir
a57-csel.ll
aarch-multipart.ll
aarch64-2014-08-11-MachineCombinerCrash.ll
aarch64-2014-12-02-combine-soften.ll
aarch64-DAGCombine-findBetterNeighborChains-crash.ll
aarch64-a57-fp-load-balancing.ll
aarch64-address-type-promotion-assertion.ll
aarch64-address-type-promotion.ll
aarch64-addv.ll
aarch64-avoid-illegal-extract-subvector.ll
aarch64-be-bv.ll AArch64: add nvcast patterns for v1f64 2022-04-11 12:24:48 +01:00
aarch64-bf16-dotprod-intrinsics.ll
aarch64-bf16-ldst-intrinsics.ll
aarch64-bif-gen.ll
aarch64-bit-gen.ll
aarch64-bswap-ext.ll
aarch64-checkMergeStoreCandidatesForDependencies.ll
aarch64-codegen-prepare-atp.ll
aarch64-combine-fmul-fsub.mir [AArch64] Mark all instructions that read/write FPCR as doing so 2022-11-16 12:29:50 +00:00
aarch64-dup-ext-crash.ll
aarch64-dup-ext-scalable.ll
aarch64-dup-ext-vectortype-crash.ll
aarch64-dup-ext.ll [AArch64] Alter mull buildvectors(ext(..)) combine to work on shuffles 2022-04-04 23:07:47 +01:00
aarch64-dup-extract-scalable.ll
aarch64-dynamic-stack-layout.ll [AArch64] Add GPR rr instructions to isAssociativeAndCommutative 2022-11-27 12:53:10 +00:00
aarch64-fix-cortex-a53-835769.ll
aarch64-fold-lslfast.ll [AArch64] Enable LSLFast for modern OoO cpus 2022-09-20 17:09:14 +01:00
aarch64-gep-opt.ll
aarch64-insert-subvector-undef.ll
aarch64-interleaved-access-w-undef.ll [AArch64] Add index check before lowerInterleavedStore() uses ShuffleVectorInst's mask 2022-10-10 12:52:31 +01:00
aarch64-interleaved-ld-combine.ll [CodeGen] Remove unneeded regex escaping in FileCheck patterns. NFC. 2022-02-18 16:10:56 +00:00
aarch64-isel-csinc-type.ll [DAGCombiner][AArch64] Enhance to fold CSNEG into CSINC instruction 2022-02-16 09:39:38 +08:00
aarch64-isel-csinc.ll [DAGCombiner][AArch64] Enhance to fold CSNEG into CSINC instruction 2022-02-16 09:39:38 +08:00
aarch64-ldst-modified-baseReg.mir
aarch64-ldst-no-premature-sp-pop.mir
aarch64-ldst-subsuperReg-no-ldp.mir
aarch64-load-ext.ll
aarch64-loop-gep-opt.ll
aarch64-lsr-bfi.ll [AArch64] Fold lsr+bfi in tryBitfieldInsertOpFromOr 2022-04-06 22:02:31 +08:00
aarch64-matmul.ll
aarch64-matrix-umull-smull.ll [AArch64] Sink splat(s/zext(..)) to uses 2022-09-13 15:47:41 +01:00
aarch64-minmaxv.ll
aarch64-mops-consecutive.ll [AArch64] Async unwind - function prologues 2022-03-24 16:16:44 +00:00
aarch64-mops-mte.ll
aarch64-mops.ll [AArch64] Async unwind - function prologues 2022-03-24 16:16:44 +00:00
aarch64-mov-debug-locs.mir
aarch64-mull-masks.ll
aarch64-named-reg-w18.ll
aarch64-named-reg-x18.ll
aarch64-neon-v1i1-setcc.ll
aarch64-p2align-max-bytes-neoverse.ll [MC] Omit fill value if it's zero when emitting code alignment 2022-08-25 10:07:33 -07:00
aarch64-p2align-max-bytes.ll [MC] Omit fill value if it's zero when emitting code alignment 2022-08-25 10:07:33 -07:00
aarch64-pmull2.ll [NFC] Move a test case across files. 2022-08-30 14:16:28 -07:00
aarch64-sched-store.ll [MC] Omit fill value if it's zero when emitting code alignment 2022-08-25 10:07:33 -07:00
aarch64-signedreturnaddress.ll
aarch64-smax-constantfold.ll
aarch64-smov-gen.ll
aarch64-smull.ll [AArch64] Add additional tests for SMULL instruction selection 2022-09-30 12:32:26 +01:00
aarch64-split-and-bitmask-immediate.ll
aarch64-stp-cluster.ll
aarch64-sve-and-combine-crash.ll
aarch64-sve-asm-negative.ll
aarch64-sve-asm.ll
aarch64-tail-dup-size.ll
aarch64-tbz.ll
aarch64-tryBitfieldInsertOpFromOr-crash.ll
aarch64-unroll-and-jam.ll
aarch64-uzp1-combine.ll [AArch64] Improve codegen for "trunc <4 x i64> to <4 x i8>" for all cases 2022-10-13 19:08:33 +08:00
aarch64-v1f32-arg.ll [SelectionDAGBuilder] use bitcast instead of AnyExtOrTrunc if copy parts from an int vector to a float vector to fix issue #58615 2022-11-03 15:35:13 -07:00
aarch64-vcvtfp2fxs-combine.ll
aarch64-vector-pcs.mir
aarch64-vectorcombine-invalid-extract-index-crash.ll [AArch64][DAGCombine] Fix a bug in performBuildVectorCombine where it could produce an invalid EXTRACT_SUBVECTOR 2022-08-24 16:24:19 -07:00
aarch64-vuzp.ll
aarch64-wide-mul.ll [AArch64] Common patterns between UMULL and int_aarch64_neon_umull 2022-02-19 14:38:57 +00:00
aarch64-wide-shuffle.ll [AArch64] Only mark cost 1 perfect shuffles as legal 2022-04-19 12:58:55 +01:00
aarch64_f16_be.ll
aarch64_tree_tests.ll
aarch64_win64cc_vararg.ll
aarch64st1.mir
active_lane_mask.ll [AArch64][SVE] Use PTRUE instruction instead of WHILELO if the range is appropriate for predicator constant. 2022-11-18 16:21:10 +00:00
adc.ll [AArch64] Add `foldADCToCINC` DAG combine. 2022-05-12 22:21:20 +01:00
add-negative.ll Allow bitwidth difference when checking for isOneOrOneSplat. 2022-06-16 16:04:20 +00:00
addcarry-crash.ll [AArch64] Add `foldADCToCINC` DAG combine. 2022-05-12 22:21:20 +01:00
addg_subg.mir [AArch64] Fix subtarget features for tests. NFC 2022-07-12 11:03:40 +01:00
addimm-mulimm.ll [AArch64] Lower multiplication by a constant int to madd 2022-10-07 19:33:47 +08:00
addr-of-ret-addr.ll
addrsig-macho.ll [MC][MachO] Change addrsig format + ensure its size is properly set 2022-07-19 21:22:23 -04:00
addsub-24bit-imm.mir
addsub-constant-folding.ll [AArch64] Async unwind - function prologues 2022-03-24 16:16:44 +00:00
addsub-shifted.ll
addsub.ll [AArch64] Support all extend/shift op for pattern: (ExtendOrShfitNode - Y) + Z --> (Z - Y) + ExtendOrShfitNode 2022-11-09 18:06:35 +08:00
addsub_ext.ll
align-down.ll
alloca.ll
analyze-branch.ll
analyzecmp.ll
and-mask-removal.ll [AArch64] Ensure condition (SUBS) has no uses of value in performCONDCombine 2022-10-04 21:18:30 +01:00
and-sink.ll [CodeGen] Limit building time in CodeGenPrepare for huge function 2022-09-07 10:05:40 +08:00
andandshift.ll [AArch64] Regenerate andandshift.ll test checks 2022-05-23 11:48:24 +01:00
andcompare.ll [AArch64] Add some extra GlobalISel CCMP tests coverage. NFC 2022-08-04 20:52:26 +01:00
andorbrcompare.ll [AArch64] Add some extra GlobalISel CCMP tests coverage. NFC 2022-08-04 20:52:26 +01:00
apple-latest-cpu.ll
argument-blocks-array-of-struct.ll [AArch64] Order STP Q's by ascending address 2022-05-23 09:50:44 +01:00
argument-blocks.ll
arm64-2011-03-09-CPSRSpill.ll
arm64-2011-03-17-AsmPrinterCrash.ll
arm64-2011-03-21-Unaligned-Frame-Index.ll
arm64-2011-04-21-CPSRBug.ll
arm64-2011-10-18-LdStOptBug.ll
arm64-2012-01-11-ComparisonDAGCrash.ll
arm64-2012-05-07-DAGCombineVectorExtract.ll
arm64-2012-05-07-MemcpyAlignBug.ll [InstCombine] handle subobjects of constant aggregates 2022-06-21 11:55:14 -06:00
arm64-2012-05-09-LOADgot-bug.ll
arm64-2012-05-22-LdStOptBug.ll
arm64-2012-06-06-FPToUI.ll
arm64-2012-07-11-InstrEmitterBug.ll
arm64-2013-01-13-ffast-fcmp.ll
arm64-2013-01-23-frem-crash.ll
arm64-2013-01-23-sext-crash.ll
arm64-2013-02-12-shufv8i8.ll
arm64-AdvSIMD-Scalar.ll [SchedModels][CortexA55] Add ASIMD integer instructions 2022-02-17 13:41:57 +03:00
arm64-AnInfiniteLoopInDAGCombine.ll
arm64-EXT-undef-mask.ll
arm64-aapcs-be.ll
arm64-aapcs.ll
arm64-abi-hfa-args.ll
arm64-abi-varargs.ll [DAGCombine] Add node in the worklist in topological order in CombineTo 2022-05-07 16:24:31 +00:00
arm64-abi.ll
arm64-abi_align.ll [CodeGen] Remove unneeded regex escaping in FileCheck patterns. NFC. 2022-02-18 16:10:56 +00:00
arm64-addp.ll [AArch64] Generate ADDP from shuffled add 2022-06-06 11:39:51 +01:00
arm64-addr-mode-folding.ll
arm64-addr-type-promotion.ll
arm64-addrmode.ll
arm64-alloc-no-stack-realign.ll [CodeGen] Remove unneeded regex escaping in FileCheck patterns. NFC. 2022-02-18 16:10:56 +00:00
arm64-alloca-frame-pointer-offset.ll
arm64-andCmpBrToTBZ.ll Revert "[SimplifyCFG] Thread branches on same condition in more cases (PR54980)" 2022-07-05 16:57:46 +02:00
arm64-ands-bad-peephole.ll
arm64-anyregcc-crash.ll Migrate llvm.experimental.patchpoint() to ptr. 2022-08-10 13:18:02 +01:00
arm64-anyregcc.ll Migrate llvm.experimental.patchpoint() to ptr. 2022-08-10 13:18:02 +01:00
arm64-arith-saturating.ll [AArch64] Lower scalar sqxtn intrinsics to use fp registers 2022-09-21 10:46:43 +01:00
arm64-arith.ll
arm64-arm64-dead-def-elimination-flag.ll
arm64-assert-zext-sext.ll
arm64-atomic-128.ll [AArch64] Support SETCCCARRY lowering 2022-10-14 22:29:31 +03:00
arm64-atomic.ll
arm64-bcc.ll
arm64-big-endian-bitconverts.ll
arm64-big-endian-eh.ll
arm64-big-endian-varargs.ll
arm64-big-endian-vector-callee.ll
arm64-big-endian-vector-caller.ll
arm64-big-imm-offsets.ll
arm64-big-stack.ll
arm64-bitfield-extract.ll [AArch64] Compare BFI and ORR with left-shifted operand for OR instruction selection. 2022-11-03 12:32:08 -07:00
arm64-blockaddress.ll
arm64-break.ll Reland "[COFF, ARM64] Add __break intrinsic" 2022-04-20 13:01:30 -07:00
arm64-build-vector.ll [AArch64] Known bits for AArch64ISD::DUP 2022-06-20 19:11:57 +01:00
arm64-builtins-linux.ll
arm64-call-tailcalls.ll
arm64-cast-opt.ll
arm64-ccmp-heuristics.ll
arm64-ccmp.ll [AArch64] Select to CCMN when the CCMP's second operator is negative constant 2022-10-14 21:41:25 +08:00
arm64-clrsb.ll
arm64-coalesce-ext.ll
arm64-coalescing-MOVi32imm.ll
arm64-code-model-large-darwin.ll [CodeGen] Remove unneeded regex escaping in FileCheck patterns. NFC. 2022-02-18 16:10:56 +00:00
arm64-codegen-prepare-extload.ll
arm64-collect-loh-garbage-crash.ll
arm64-collect-loh-str.ll
arm64-collect-loh.ll [CodeGen] Remove unneeded regex escaping in FileCheck patterns. NFC. 2022-02-18 16:10:56 +00:00
arm64-complex-ret.ll
arm64-const-addr.ll
arm64-constrained-fcmp-no-nans-opt.ll
arm64-convert-v4f64.ll
arm64-copy-tuple.ll
arm64-crc32.ll
arm64-crypto.ll
arm64-cse.ll [AArch64] Regenerate 3 codegen test files. NFC 2022-06-16 18:23:05 +01:00
arm64-csel.ll [AArch64] Fix signed integer overflow in CSINC case 2022-08-15 15:04:20 -07:00
arm64-csldst-mmo.ll
arm64-custom-call-saved-reg.ll [AArch64] Async unwind - function prologues 2022-03-24 16:16:44 +00:00
arm64-cvt.ll
arm64-dagcombiner-convergence.ll
arm64-dagcombiner-dead-indexed-load.ll
arm64-dagcombiner-load-slicing.ll [CodeGen] Remove unneeded regex escaping in FileCheck patterns. NFC. 2022-02-18 16:10:56 +00:00
arm64-darwin-cc.ll
arm64-dead-def-frame-index.ll
arm64-dead-register-def-bug.ll
arm64-detect-vec-redux.ll
arm64-dup.ll [AArch64] Add Extract(DUP(C)) as a canonical constant. 2022-06-21 09:51:22 +01:00
arm64-early-ifcvt.ll
arm64-elf-calls.ll
arm64-elf-constpool.ll
arm64-ext.ll
arm64-extend-int-to-fp.ll
arm64-extend.ll
arm64-extload-knownzero.ll
arm64-extract.ll
arm64-extract_subvector.ll
arm64-fast-isel-addr-offset.ll
arm64-fast-isel-alloca.ll
arm64-fast-isel-br.ll
arm64-fast-isel-call.ll [CodeGen] Remove unneeded regex escaping in FileCheck patterns. NFC. 2022-02-18 16:10:56 +00:00
arm64-fast-isel-conversion-fallback.ll
arm64-fast-isel-conversion.ll
arm64-fast-isel-fcmp.ll
arm64-fast-isel-gv.ll [CodeGen] Remove unneeded regex escaping in FileCheck patterns. NFC. 2022-02-18 16:10:56 +00:00
arm64-fast-isel-icmp.ll
arm64-fast-isel-indirectbr.ll
arm64-fast-isel-intrinsic.ll [CodeGen] Remove unneeded regex escaping in FileCheck patterns. NFC. 2022-02-18 16:10:56 +00:00
arm64-fast-isel-materialize.ll [CodeGen] Remove unneeded regex escaping in FileCheck patterns. NFC. 2022-02-18 16:10:56 +00:00
arm64-fast-isel-noconvert.ll
arm64-fast-isel-rem.ll
arm64-fast-isel-ret.ll
arm64-fast-isel-store.ll
arm64-fast-isel.ll
arm64-fastcc-tailcall.ll
arm64-fastisel-gep-promote-before-add.ll
arm64-fcmp-opt.ll
arm64-fcopysign.ll [SchedModels][CortexA55] Add ASIMD integer instructions 2022-02-17 13:41:57 +03:00
arm64-fixed-point-scalar-cvt-dagcombine.ll [AArch64] Fix assumptions on input type of tryCombineFixedPointConvert 2022-05-23 08:55:54 +01:00
arm64-fma-combine-with-fpfusion.ll
arm64-fma-combines.ll
arm64-fmadd.ll [AArch64] Add instruction selection for strict FP 2022-02-17 13:11:54 +00:00
arm64-fmax-safe.ll
arm64-fmax.ll [AArch64] Add bf16 select handling 2022-08-11 14:20:36 +01:00
arm64-fminv.ll
arm64-fml-combines.ll [AArch64] Add some missing tests for FNMADD combine patterns. NFC. 2022-11-15 18:05:25 +05:30
arm64-fmuladd.ll
arm64-fold-address.ll
arm64-fold-lsl.ll
arm64-fp-contract-zero.ll
arm64-fp-imm-size.ll
arm64-fp-imm.ll
arm64-fp.ll
arm64-fp128-folding.ll
arm64-fp128.ll [AArch64] Async unwind - Adjust unwind info in AArch64LoadStoreOptimizer 2022-04-18 12:09:44 +01:00
arm64-fpcr.ll
arm64-frame-index.ll
arm64-global-address.ll
arm64-hello.ll
arm64-homogeneous-prolog-epilog-bad-outline.mir
arm64-homogeneous-prolog-epilog-frame-tail.ll
arm64-homogeneous-prolog-epilog-no-helper.ll [AArch64] Async unwind - do not schedule frame setup/destroy 2022-02-24 17:24:04 +00:00
arm64-homogeneous-prolog-epilog.ll
arm64-i16-subreg-extract.ll
arm64-icmp-opt.ll
arm64-indexed-memory.ll
arm64-indexed-vector-ldst-2.ll
arm64-indexed-vector-ldst.ll [AArch64]Enhance 'isBitfieldPositioningOp' to find pattern (shl(and(val,mask), N). 2022-10-17 09:01:29 -07:00
arm64-inline-asm-error-I.ll
arm64-inline-asm-error-J.ll
arm64-inline-asm-error-K.ll
arm64-inline-asm-error-L.ll
arm64-inline-asm-error-M.ll
arm64-inline-asm-error-N.ll
arm64-inline-asm-zero-reg-error.ll
arm64-inline-asm.ll [NFCI] Fixed missing colon in CHECK directives - part 2 2022-04-03 14:42:59 +02:00
arm64-instruction-mix-remarks.ll [AArch64] Adds SUBS and ADDS instructions to the MIPeepholeOpt. 2022-02-19 15:35:53 +00:00
arm64-isel-or.ll
arm64-join-reserved.ll
arm64-jumptable.ll
arm64-large-frame.ll [AArch64] Async unwind - function prologues 2022-03-24 16:16:44 +00:00
arm64-ld-from-st.ll
arm64-ld1.ll
arm64-ldp-aa.ll
arm64-ldp-cluster.ll
arm64-ldp.ll
arm64-ldst-unscaled-pre-post.mir
arm64-ldur.ll
arm64-ldxr-stxr.ll [OpaquePtr][AArch64] Use elementtype on ldxr/stxr 2022-03-14 10:09:59 -07:00
arm64-leaf.ll
arm64-long-shift.ll
arm64-memcpy-inline.ll CodeGen: Remove AliasAnalysis from regalloc 2022-07-18 17:23:41 -04:00
arm64-memset-inline.ll [AArch64] Order STP Q's by ascending address 2022-05-23 09:50:44 +01:00
arm64-memset-to-bzero-pgso.ll
arm64-memset-to-bzero.ll [SelectionDAG] Handle bzero/memset libcalls globally instead of per target 2022-06-09 08:34:55 +00:00
arm64-misaligned-memcpy-inline.ll
arm64-misched-basic-A53.ll
arm64-misched-basic-A57.ll
arm64-misched-forwarding-A53.ll
arm64-misched-memdep-bug.ll
arm64-misched-multimmo.ll
arm64-movi.ll
arm64-mte.ll
arm64-mul.ll [AArch64] Regenerate arm64-mul.ll test checks 2022-07-16 15:27:47 +01:00
arm64-named-reg-alloc.ll
arm64-named-reg-notareg.ll
arm64-narrow-st-merge.ll
arm64-neg.ll
arm64-neon-2velem-high.ll [AArch64] Add extra widening mul tests. NFC 2022-02-17 19:11:45 +00:00
arm64-neon-2velem.ll
arm64-neon-3vdiff.ll [AArch64] Explicitly use v1i64 type for llvm.aarch64.neon.pmull64 2022-07-27 11:11:16 -07:00
arm64-neon-aba-abd.ll
arm64-neon-across.ll
arm64-neon-add-pairwise.ll
arm64-neon-add-sub.ll
arm64-neon-copy.ll [AArch64]Enhance 'isBitfieldPositioningOp' to find pattern (shl(and(val,mask), N). 2022-10-17 09:01:29 -07:00
arm64-neon-copyPhysReg-tuple.ll
arm64-neon-mul-div-cte.ll
arm64-neon-mul-div.ll [AArch64] Async unwind - function prologues 2022-03-24 16:16:44 +00:00
arm64-neon-scalar-by-elem-mul.ll
arm64-neon-select_cc.ll
arm64-neon-simd-ldst-one.ll [AArch64] Regenerate arm64-neon-simd-ldst-one.ll test checks 2022-07-16 15:27:47 +01:00
arm64-neon-simd-shift.ll
arm64-neon-simd-vget.ll
arm64-neon-v1i1-setcc.ll
arm64-neon-v8.1a.ll
arm64-neon-vector-list-spill.ll
arm64-neon-vector-shuffle-extract.ll
arm64-non-pow2-ldst.ll [AArch64] Compare BFI and ORR with left-shifted operand for OR instruction selection. 2022-11-03 12:32:08 -07:00
arm64-nvcast.ll [AArch64]Enhance 'isBitfieldPositioningOp' to find pattern (shl(and(val,mask), N). 2022-10-17 09:01:29 -07:00
arm64-opt-remarks-lazy-bfi.ll [CodeGen] Async unwind - add a pass to fix CFI information 2022-04-11 13:27:26 +01:00
arm64-patchpoint-scratch-regs.ll Migrate llvm.experimental.patchpoint() to ptr. 2022-08-10 13:18:02 +01:00
arm64-patchpoint-webkit_jscc.ll [llvm-objdump] Add --no-print-imm-hex to tests depending on it. 2022-10-29 15:40:26 -07:00
arm64-patchpoint.ll Migrate llvm.experimental.patchpoint() to ptr. 2022-08-10 13:18:02 +01:00
arm64-pic-local-symbol.ll
arm64-platform-reg.ll [AArch64] Add an option to reserve physical registers from RA 2022-09-06 17:18:01 +00:00
arm64-popcnt.ll [AArch64] use CNT for ISD::popcnt and ISD::parity if available 2022-12-02 11:27:14 +00:00
arm64-prefetch.ll [AArch64][GISel] Lower llvm.prefetch 2022-08-19 09:11:18 +01:00
arm64-preserve-most.ll
arm64-promote-const-complex-initializers.ll [ConstantExpr] Remove fneg expression 2022-09-08 10:24:55 +02:00
arm64-promote-const.ll [CodeGen] Remove unneeded regex escaping in FileCheck patterns. NFC. 2022-02-18 16:10:56 +00:00
arm64-raddhn-combine.ll
arm64-redzone.ll
arm64-reg-copy-noneon.ll
arm64-register-offset-addressing.ll
arm64-register-pairing.ll
arm64-regress-f128csel-flags.ll
arm64-regress-interphase-shift.ll
arm64-regress-opt-cmp.mir
arm64-reserve-call-saved-reg.ll
arm64-reserved-arg-reg-call-error.ll
arm64-return-vector.ll
arm64-returnaddr.ll
arm64-rev.ll [AArch64] Add GPR rr instructions to isAssociativeAndCommutative 2022-11-27 12:53:10 +00:00
arm64-rounding.ll
arm64-scaled_iv.ll
arm64-scvt.ll [AArch64] Predicate SSHLL;SCVTF patterns behind UseAlternateSExtLoadCVTF32 2022-05-16 18:00:30 +01:00
arm64-setcc-int-to-fp-combine.ll
arm64-shifted-sext.ll [AArch64] Remove isDef32 2022-06-07 18:57:59 +01:00
arm64-shrink-v1i64.ll
arm64-shrink-wrapping.ll [AArch64] Async unwind - function epilogues 2022-04-12 16:50:50 +01:00
arm64-simd-scalar-to-vector.ll
arm64-simplest-elf.ll
arm64-sincos.ll
arm64-sitofp-combine-chains.ll
arm64-sli-sri-opt.ll [AArch64] Known bits for AArch64ISD::DUP 2022-06-20 19:11:57 +01:00
arm64-smaxv.ll
arm64-sminv.ll
arm64-spill-lr.ll
arm64-spill-remarks-treshold-hotness.ll
arm64-spill-remarks.ll RAGreedyStats: Ignore identity COPYs; count COPYs from/to physregs 2022-08-17 12:53:29 -07:00
arm64-spill.ll
arm64-sqshl-uqshl-i64Contant.ll
arm64-sqxtn2-combine.ll
arm64-srl-and.ll
arm64-st1.ll
arm64-stack-no-frame.ll
arm64-stackmap-nops.ll
arm64-stackmap.ll Migrate llvm.experimental.patchpoint() to ptr. 2022-08-10 13:18:02 +01:00
arm64-stackpointer.ll
arm64-stacksave.ll
arm64-storebytesmerge.ll
arm64-stp-aa.ll
arm64-stp.ll
arm64-strict-align.ll [AArch64] Compare BFI and ORR with left-shifted operand for OR instruction selection. 2022-11-03 12:32:08 -07:00
arm64-stur.ll
arm64-subsections.ll
arm64-subvector-extend.ll [SchedModels][CortexA55] Add ASIMD integer instructions 2022-02-17 13:41:57 +03:00
arm64-summary-remarks.ll
arm64-swizzle-tbl-i16-layout.ll [CodeGen] Remove unneeded regex escaping in FileCheck patterns. NFC. 2022-02-18 16:10:56 +00:00
arm64-tbl.ll [AArch64] Try to fold shuffle (tbl2, tbl2) to tbl4. 2022-09-21 19:15:56 +01:00
arm64-this-return.ll
arm64-tls-darwin.ll
arm64-tls-dynamic-together.ll
arm64-tls-dynamics.ll
arm64-tls-initial-exec.ll
arm64-tls-local-exec.ll
arm64-trap.ll
arm64-triv-disjoint-mem-access.ll
arm64-trn.ll [ARM][AArch64] Add some extra shuffle conversion test coverage. NFC 2022-05-05 15:27:44 +01:00
arm64-trunc-store.ll
arm64-umaxv.ll
arm64-uminv.ll
arm64-umov.ll
arm64-unaligned_ldst.ll
arm64-uzp.ll
arm64-uzp2-combine.ll Reland "[AArch64] Add a tablegen pattern for UZP2." 2022-07-20 09:47:32 +01:00
arm64-vaargs.ll
arm64-vabs.ll [GlobalISel] Add computeNumSignBits() support for compares. 2022-10-05 00:28:08 +01:00
arm64-vadd.ll Reland "[AArch64] Add a tablegen pattern for UZP2." 2022-07-20 09:47:32 +01:00
arm64-vaddlv.ll
arm64-vaddv.ll
arm64-variadic-aapcs.ll
arm64-vbitwise.ll
arm64-vclz.ll
arm64-vcmp.ll
arm64-vcnt.ll
arm64-vcombine.ll
arm64-vcvt.ll
arm64-vcvt_f.ll
arm64-vcvt_f32_su32.ll
arm64-vcvt_n.ll
arm64-vcvt_su32_f32.ll
arm64-vcvtxd_f32_f64.ll
arm64-vecCmpBr.ll
arm64-vecFold.ll
arm64-vector-ext.ll
arm64-vector-imm.ll
arm64-vector-insertion.ll
arm64-vector-ldst.ll [AArch64] Regenerate arm64-vector-ldst.ll test checks 2022-07-16 15:27:47 +01:00
arm64-vext.ll
arm64-vext_reverse.ll
arm64-vfloatintrinsics.ll
arm64-vhadd.ll [SchedModels][CortexA55] Add ASIMD integer instructions 2022-02-17 13:41:57 +03:00
arm64-vhsub.ll
arm64-virtual_base.ll [CodeGen] Remove unneeded regex escaping in FileCheck patterns. NFC. 2022-02-18 16:10:56 +00:00
arm64-vmax.ll [AArch64] Regenerate arm64-vmax.ll test checks 2022-07-16 15:27:47 +01:00
arm64-vminmaxnm.ll
arm64-vmovn.ll
arm64-vmul.ll [AArch64] Add pattern for SQDML*Lv1i32_indexed 2022-08-17 12:00:47 +01:00
arm64-volatile.ll
arm64-vpopcnt.ll
arm64-vqadd.ll
arm64-vqsub.ll
arm64-vselect.ll [AArch64] Regenerate arm64-vselect.ll test checks 2022-07-13 13:52:15 +01:00
arm64-vsetcc_fp.ll
arm64-vshift.ll
arm64-vshr.ll
arm64-vshuffle.ll [DAG] PromoteIntRes_BUILD_VECTOR - extend constant boolean vectors according to target BooleanContents 2022-07-20 10:49:31 +01:00
arm64-vsqrt.ll
arm64-vsra.ll
arm64-vsub.ll
arm64-weak-reference.ll
arm64-windows-calls.ll [AArch64][Windows] Check sret attribute also for inreg attribute 2022-10-12 09:58:50 +08:00
arm64-windows-tailcall.ll
arm64-xaluo.ll AArch64/GlobalISel: Stop using legal s1 values 2022-07-08 11:55:08 -04:00
arm64-zero-cycle-regmov.ll
arm64-zero-cycle-zeroing.ll
arm64-zeroreg.ll
arm64-zext.ll
arm64-zextload-unscaled.ll
arm64-zip.ll
arm64_32-addrs.ll
arm64_32-atomics.ll [OpaquePtr][AArch64] Use elementtype on ldxr/stxr 2022-03-14 10:09:59 -07:00
arm64_32-fastisel.ll
arm64_32-frame-pointers.ll
arm64_32-gep-sink.ll
arm64_32-memcpy.ll
arm64_32-neon.ll
arm64_32-null.ll
arm64_32-pointer-extend.ll
arm64_32-stack-pointers.ll
arm64_32-tls.ll
arm64_32-va.ll
arm64_32.ll [AArch64] Compare BFI and ORR with left-shifted operand for OR instruction selection. 2022-11-03 12:32:08 -07:00
arm64ec-dllimport.ll [Arm64EC] Refer to dllimport'ed functions correctly. 2022-10-20 15:08:56 -07:00
arm64ec-reservedregs.ll [ARM64EC 3/?] Mark reserved registers specific to ARM64EC ABI. 2022-09-05 12:59:39 -07:00
arm64ec-varargs.ll [ARM64EC 4/?] Add LLVM support for varargs calling convention. 2022-09-05 13:05:48 -07:00
asm-large-immediate.ll
asm-print-comments.ll
asm-srcloc.ll
assertion-rc-mismatch.ll
atomic-ops-ldapr.ll [CodeGen][AArch64] Enable LDAPR under +RCPC 2022-11-09 21:46:54 +00:00
atomic-ops-lse.ll
atomic-ops-not-barriers.ll
atomic-ops.ll
atomicrmw-O0.ll [AArch64] Optimize cmp chain before legalization 2022-11-23 19:43:44 +08:00
atomicrmw-xchg-fp.ll
autoupgrade-aarch64-neon-addp-float.ll
avoid-zero-copy.mir Add all constant physical registers to callee preserved masks 2022-09-21 12:50:12 +00:00
basic-pic.ll
bcax.ll Teach the AArch64 backend to instruction select the BCAX instruction. 2022-02-23 15:59:40 -08:00
bcmp-inline-small.ll [AArch64] Optimize more memcmp when the result is tested for [in]equality with 0 2022-11-13 11:02:34 +08:00
bcmp.ll [AArch64] Optimize cmp chain before legalization 2022-11-23 19:43:44 +08:00
bf16-convert-intrinsics.ll
bf16-select.ll [AArch64] Add bf16 select handling 2022-08-11 14:20:36 +01:00
bf16-shuffle.ll [AArch64] Add tablegen patterns for bf16 trn/zip/uzp. 2022-10-05 21:47:36 +01:00
bf16-vector-bitcast.ll
bf16-vector-shuffle.ll
bf16.ll
bfis-in-loop.ll [AArch64] Compare BFI and ORR with left-shifted operand for OR instruction selection. 2022-11-03 12:32:08 -07:00
bics.ll
big-callframe.ll
bisect-post-ra-machine-sink.mir
bitcast-promote-widen.ll [AArch64][DAGCombine] Add performBuildVectorCombine 'extract_elt ~> anyext' 2022-07-29 09:51:09 +01:00
bitcast-v2i8.ll
bitcast.ll
bitfield-extract.ll
bitfield-insert-0.ll
bitfield-insert.ll [AArch64] Select BFI/BFXIL to ORR with shifted operand when one operand is the left or right shift of another operand 2022-11-11 14:01:02 -08:00
bitfield.ll AArch64: clamp UBFX high-bit to 32-bits 2022-02-23 12:48:39 +00:00
bitreverse.ll
blockaddress.ll
bool-ext-inc.ll [AArch64][GlobalISel] When lowering signext i1 parameters, don't zero-extend to s8 first. 2022-10-15 20:25:43 -07:00
bool-loads.ll
br-cond-not-merge.ll
br-to-eh-lpad.ll
br-undef-cond.ll
branch-folder-merge-mmos.ll
branch-folder-oneinst.mir
branch-relax-alignment.ll
branch-relax-asm.ll
branch-relax-bcc.ll
branch-relax-block-size.mir
branch-relax-cbz.ll
branch-target-enforcement-indirect-calls.ll
breg.ll
bswap-known-bits.ll
bti-branch-relaxation.ll
build-one-lane.ll
build-pair-isel.ll [AArch64] Compare BFI and ORR with left-shifted operand for OR instruction selection. 2022-11-03 12:32:08 -07:00
build-vector-extract.ll [DAG] Canonicalize non-inlane shuffle -> AND if all non-inlane referenced elements are known zero 2022-07-16 11:38:24 +01:00
byval-type.ll
call-rv-marker.ll [AArch64] Cleanup call-rv-marker.ll test. NFC. 2022-04-12 10:34:54 -07:00
callbr-asm-label.ll [SelectionDAG] make INLINEASM_BR use MachineBasicBlocks instead of BlockAddresses 2022-08-17 09:34:31 -07:00
callbr-asm-obj-file.ll [llvm-objdump] Add --no-print-imm-hex to tests depending on it. 2022-10-29 15:40:26 -07:00
callee-save.ll
ccmp-successor-probs.mir
cfguard-checks.ll [llvm] Mark CFGuard fn ptr symbol as DSO local and add tests for mingw 2022-08-23 23:39:39 +03:00
cfguard-module-flag.ll [llvm] Mark CFGuard fn ptr symbol as DSO local and add tests for mingw 2022-08-23 23:39:39 +03:00
cfi-fixup.ll [AArch64] Async unwind - function epilogues 2022-04-12 16:50:50 +01:00
cfi-fixup.mir [CodeGen] Async unwind - add a pass to fix CFI information 2022-04-11 13:27:26 +01:00
cfi_restore.mir
cfinv-def-nzcv.mir
cfinv-use-nzcv.mir
cgp-trivial-phi-node.ll
cgp-usubo.ll
check-sign-bit-before-extension.ll
chkstk.ll
clang-section-macho.ll [MC] Allow annotating custom sections as zerofill 2022-06-28 15:08:47 +01:00
cls.ll
cluster-frame-index.mir
cmp-bool.ll
cmp-chains.ll [AArch64] Add GPR rr instructions to isAssociativeAndCommutative 2022-11-27 12:53:10 +00:00
cmp-const-max.ll
cmp-frameindex.ll
cmp-select-sign.ll [AArch64] Async unwind - function prologues 2022-03-24 16:16:44 +00:00
cmp-to-cmn.ll
cmpwithshort.ll
cmpxchg-O0.ll [CodeGen] Remove unneeded regex escaping in FileCheck patterns. NFC. 2022-02-18 16:10:56 +00:00
cmpxchg-idioms.ll [AArch64] Async unwind - function prologues 2022-03-24 16:16:44 +00:00
cmpxchg-lse-even-regs.ll
code-model-large-abs.ll
code-model-tiny-abs.ll
combine-and-like.ll
combine-andintoload.ll
combine-comparisons-by-cse.ll [AArch64] Async unwind - function epilogues 2022-04-12 16:50:50 +01:00
combine-mul.ll
compare-branch.ll
compiler-ident.ll
complex-copy-noneon.ll
complex-deinterleaving-f16-add.ll [AArch64][CodeGen] Add AArch64 support for complex deinterleaving 2022-11-16 14:00:54 +00:00
complex-deinterleaving-f16-mul.ll [AArch64][CodeGen] Add AArch64 support for complex deinterleaving 2022-11-16 14:00:54 +00:00
complex-deinterleaving-f32-add.ll [AArch64][CodeGen] Add AArch64 support for complex deinterleaving 2022-11-16 14:00:54 +00:00
complex-deinterleaving-f32-mul.ll [AArch64][CodeGen] Add AArch64 support for complex deinterleaving 2022-11-16 14:00:54 +00:00
complex-deinterleaving-f64-add.ll [AArch64][CodeGen] Add AArch64 support for complex deinterleaving 2022-11-16 14:00:54 +00:00
complex-deinterleaving-f64-mul.ll [AArch64][CodeGen] Add AArch64 support for complex deinterleaving 2022-11-16 14:00:54 +00:00
complex-deinterleaving-mixed-cases.ll [AArch64][CodeGen] Add AArch64 support for complex deinterleaving 2022-11-16 14:00:54 +00:00
complex-deinterleaving-uniform-cases.ll [AArch64][CodeGen] Add AArch64 support for complex deinterleaving 2022-11-16 14:00:54 +00:00
complex-fp-to-int.ll
complex-int-to-fp.ll
concat-vector.ll
concat_vector-scalar-combine.ll
concat_vector-truncate-combine.ll
concat_vector-truncated-scalar-combine.ll
cond-br-tuning.ll [AArch64] Move SeparateConstOffsetFromGEPPass before LSR and enable EnableGEPOpt by default. 2022-07-22 15:20:53 +01:00
cond-sel-value-prop.ll
cond-sel.ll
const-shift-of-constmasked.ll
consthoist-gep.ll
convertphitype.ll [CodeGenPrep] Handle constants in ConvertPhiType 2022-10-13 16:41:44 +01:00
copyprop.ll Give option to use isCopyInstr to determine which MI is 2022-05-26 18:43:16 +00:00
copyprop.mir Give option to use isCopyInstr to determine which MI is 2022-05-26 18:43:16 +00:00
cpus.ll [AArch64] Add Neoverse V2 CPU support 2022-09-27 07:56:08 +00:00
csel-zero-float.ll
csinc-cmp-removal.mir
csr-split.ll [AArch64] Async unwind - function epilogues 2022-04-12 16:50:50 +01:00
ctpop-nonean.ll [AArch64] use CNT for ISD::popcnt and ISD::parity if available 2022-12-02 11:27:14 +00:00
cvt-fp-int-fp.ll [AArch64] Allow strict opcodes in fp->int->fp patterns 2022-02-17 13:11:54 +00:00
cxx-tlscc.ll
dag-ReplaceAllUsesOfValuesWith.ll Fix some test files with executable permissions 2022-12-02 17:12:03 -05:00
dag-combine-insert-subvector.ll [IR] Move vector.insert/vector.extract out of experimental namespace 2022-06-27 10:48:45 +00:00
dag-combine-invaraints.ll
dag-combine-lifetime-end-store-typesize.ll [AArch64] Fix subtarget features for tests. NFC 2022-07-12 11:03:40 +01:00
dag-combine-mul-shl.ll
dag-combine-select.ll [AArch64] Add some extra GlobalISel CCMP tests coverage. NFC 2022-08-04 20:52:26 +01:00
dag-combine-setcc.ll [AArch64] Optimize cmp chain before legalization 2022-11-23 19:43:44 +08:00
dag-combine-trunc-build-vec.ll
dag-numsignbits.ll [DAG] SimplifyDemandedBits - add DemandedElts handling to ISD::SIGN_EXTEND_INREG simplification 2022-06-19 15:35:29 +01:00
darwinpcs-tail.ll [AArch64] Use correct calling convention for each vararg 2022-03-10 15:07:25 -08:00
dbg-declare-tag-offset.ll
dbg-value-tag-offset.ll
debug-info-sve-dbg-declare.mir Support the min of module flags when linking, use for AArch64 BTI/PAC-RET 2022-04-13 09:31:51 +02:00
debug-info-sve-dbg-value.mir
debugtrap.ll
directcond.ll
div-rem-pair-recomposition-signed.ll [SchedModels][CortexA55] Add ASIMD integer instructions 2022-02-17 13:41:57 +03:00
div-rem-pair-recomposition-unsigned.ll [SchedModels][CortexA55] Add ASIMD integer instructions 2022-02-17 13:41:57 +03:00
div_minsize.ll
divrem.ll
dllexport.ll
dllimport.ll [CodeGen] Remove unneeded regex escaping in FileCheck patterns. NFC. 2022-02-18 16:10:56 +00:00
dont-shrink-wrap-stack-mayloadorstore.mir
dont-take-over-the-world.ll
dp-3source.ll
dp1.ll [AArch64] Remove isDef32 2022-06-07 18:57:59 +01:00
dp2.ll
dwarf-cfi.ll
early-ifcvt-regclass-mismatch.mir [AArch64] Mark all instructions that read/write FPCR as doing so 2022-11-16 12:29:50 +00:00
early-ifcvt-same-value.mir
eh_recoverfp.ll
ehcontguard.ll [MC] Make MCAsmInfo::isAcceptableChar reflect MCAsmInfo::doesAllowAtInName 2022-03-29 14:01:32 -07:00
elf-globals-pic.ll
elf-globals-static.ll
elf-preemption.ll Mark the $local function begin symbol as a function 2022-08-26 09:34:04 +00:00
elim-dead-mi.mir
eliminate-trunc.ll
emutls.ll [AArch64] Async unwind - function epilogues 2022-04-12 16:50:50 +01:00
emutls_generic.ll
eon.ll
eor3.ll
expand-blr-rvmarker-pseudo.mir llvm-reduce: Don't assert on functions which don't track liveness 2022-06-07 10:00:25 -04:00
expand-movi-renamable.mir
expand-select.ll
expand-subs-pseudo.mir
expand-vector-rot.ll [SchedModels][CortexA55] Add ASIMD integer instructions 2022-02-17 13:41:57 +03:00
ext-narrow-index.ll
extern-weak.ll
extra-callee-save.mir
extract-bits.ll
extract-insert.ll
extract-lowbits.ll
extract-sext-zext.ll
extract-subvec-combine.ll [DAGCombine] Combine signext_inreg of extract-extend 2022-08-15 10:58:07 +00:00
extract.ll
f16-convert.ll
f16-imm.ll [AArch64] Add f16 fpimm patterns 2022-07-25 09:08:10 +01:00
f16-instructions.ll [AArch64] Add bf16 select handling 2022-08-11 14:20:36 +01:00
f16-neon-intrinsics.ll [AArch64] Move fp16 intrinsics tests to new file. NFC 2022-07-11 20:36:46 +01:00
fabd-no-neon.ll [AArch64] Add missing HasNEON predicate in scalar FABD patterns 2022-04-13 09:30:11 +00:00
fabs.ll [AArch64] Use simd mov to materialize big fp constants 2022-03-04 11:34:20 -05:00
fadd-combines.ll [AArch64] add tests for fadd -> fma combines; NFC 2022-09-21 09:00:11 -04:00
faddp-half.ll [AArch64] Generate FADDP from shuffled fadd 2022-06-11 14:16:37 +01:00
faddp.ll [AArch64] Generate FADDP from shuffled fadd 2022-06-11 14:16:37 +01:00
falkor-hwpf-fix.ll
falkor-hwpf-fix.mir
falkor-hwpf.ll
fast-isel-address-extends.ll
fast-isel-addressing-modes.ll
fast-isel-assume.ll
fast-isel-atomic.ll [CodeGen] Remove unneeded regex escaping in FileCheck patterns. NFC. 2022-02-18 16:10:56 +00:00
fast-isel-branch-cond-mask.ll [CodeGen] Remove unneeded regex escaping in FileCheck patterns. NFC. 2022-02-18 16:10:56 +00:00
fast-isel-branch-cond-split.ll [CodeGen] Async unwind - add a pass to fix CFI information 2022-04-11 13:27:26 +01:00
fast-isel-branch-uncond-debug.ll
fast-isel-branch_weights.ll
fast-isel-call-return.ll
fast-isel-cbz.ll
fast-isel-cmp-branch.ll
fast-isel-cmp-vec.ll Implement support for AArch64ISD::MOVI in computeKnownBits 2022-11-01 15:50:08 +00:00
fast-isel-cmpxchg.ll [CodeGen] Remove unneeded regex escaping in FileCheck patterns. NFC. 2022-02-18 16:10:56 +00:00
fast-isel-const-float.ll [AArch64][GlobalISel] Add new MOVI pattern for fp constants 2022-03-29 10:57:22 +08:00
fast-isel-dbg.ll
fast-isel-erase.ll
fast-isel-folded-shift.ll
fast-isel-folding.ll
fast-isel-fpimm.ll
fast-isel-gep.ll
fast-isel-int-ext.ll
fast-isel-int-ext2.ll
fast-isel-int-ext3.ll
fast-isel-int-ext4.ll
fast-isel-int-ext5.ll
fast-isel-intrinsic.ll
fast-isel-logic-op.ll
fast-isel-memcpy.ll
fast-isel-mul.ll
fast-isel-runtime-libcall.ll [CodeGen] Remove unneeded regex escaping in FileCheck patterns. NFC. 2022-02-18 16:10:56 +00:00
fast-isel-sdiv.ll
fast-isel-select.ll
fast-isel-shift.ll
fast-isel-sp-adjust.ll
fast-isel-sqrt.ll
fast-isel-switch-phi.ll
fast-isel-tail-call.ll
fast-isel-tbz.ll
fast-isel-trunc.ll
fast-isel-vector-arithmetic.ll
fast-isel-vret.ll
fast-regalloc-empty-bb-with-liveins.mir
fastcc-reserved.ll
fastcc.ll [AArch64] Async unwind - function epilogues 2022-04-12 16:50:50 +01:00
fastisel-debugvalue-undef.ll
fcmp.ll
fcopysign.ll [AArch64]Combine BFXIL to ORR with right shift for ISD::OR instruction selection 2022-11-08 11:20:43 -08:00
fcsel-zero.ll
fcvt-fixed.ll [AArch64] Use simd mov to materialize big fp constants 2022-03-04 11:34:20 -05:00
fcvt-int.ll
fcvt_combine.ll [AArch64] Ensure fixed point fptoi_sat has correct saturation width 2022-03-29 10:12:44 +01:00
fdiv-combine.ll recommit "[DAGCombiner] Teach scalarizeBinOpOfSplats handle scalable splat." 2022-07-21 17:34:34 +08:00
fdiv_combine.ll
fence-singlethread.ll AArch64: support ISel for fence instructions 2022-05-16 12:01:18 +01:00
fjcvtzs.ll
fjcvtzs.mir
flags-multiuse.ll
float-conv-elim.ll [SDAG] fix miscompile when casting int->FP->int 2022-05-02 14:57:27 -04:00
floatdp_1source.ll
floatdp_2source.ll
fmov-imm-licm.ll
fnmul.ll [AArch64] Add match patterns for the reassociated forms of FNMUL 2022-11-14 20:02:36 +05:30
fold-constants.ll
fold-csel-cttz-and.ll [AArch64] Generate AND in place of CSEL for predicated CTTZ 2022-05-20 13:41:32 +01:00
fold-global-offsets.ll [GISel] Add Trunc/Lshr/BuildVector Folding 2022-10-07 08:44:03 +00:00
fp-cond-sel.ll
fp-const-fold.ll
fp-conversion-to-tbl.ll [AArch64] Try to fold shuffle (tbl2, tbl2) to tbl4. 2022-09-21 19:15:56 +01:00
fp-dp3.ll
fp-intrinsics-fp16.ll [AArch64] Lowering and legalization of strict FP16 2022-04-14 16:51:22 +01:00
fp-intrinsics-vector.ll [AArch64] Add some missing strict FP vector lowering 2022-02-17 16:10:31 +00:00
fp-intrinsics.ll [AArch64] Lowering and legalization of strict FP16 2022-04-14 16:51:22 +01:00
fp16-fmla.ll
fp16-v4-instructions.ll
fp16-v8-instructions.ll [AArch64] fp16-v8-instructions.ll - remove some old defunct CHECKS identified in D125604 2022-05-18 12:49:05 +01:00
fp16-v16-instructions.ll
fp16-vector-bitcast.ll
fp16-vector-load-store.ll
fp16-vector-nvcast.ll
fp16-vector-shuffle.ll
fp16_intrinsic_lane.ll
fp16_intrinsic_scalar_1op.ll Autogenerate a couple of test in the AMDGPU backend. NFC 2022-09-25 14:12:49 +00:00
fp16_intrinsic_scalar_2op.ll Autogenerate a couple of test in the AMDGPU backend. NFC 2022-09-25 14:12:49 +00:00
fp16_intrinsic_scalar_3op.ll
fp16_intrinsic_vector_1op.ll
fp16_intrinsic_vector_2op.ll
fp16_intrinsic_vector_3op.ll
fp128-folding.ll
fpclamptosat.ll [AArch64] Support SETCCCARRY lowering 2022-10-14 22:29:31 +03:00
fpclamptosat_vec.ll [AArch64] Support SETCCCARRY lowering 2022-10-14 22:29:31 +03:00
fpconv-vector-op-scalarize.ll
fpenv.ll
fpimm.ll [AArch64] Use simd mov to materialize big fp constants 2022-03-04 11:34:20 -05:00
fptosi-sat-scalar.ll Revert "[AArch64] Add `foldCSELOfCSEl` DAG combine" 2022-08-16 20:29:37 -07:00
fptosi-sat-vector.ll [AArch64] Improve codegen for "trunc <4 x i64> to <4 x i8>" for all cases 2022-10-13 19:08:33 +08:00
fptosi-strictfp.ll
fptoui-sat-scalar.ll
fptoui-sat-vector.ll [AArch64] Improve codegen for "trunc <4 x i64> to <4 x i8>" for all cases 2022-10-13 19:08:33 +08:00
fptouint-i8-zext.ll
frameaddr.ll
framelayout-fp-csr.ll
framelayout-frame-record.mir [AArch64] Async unwind - do not schedule frame setup/destroy 2022-02-24 17:24:04 +00:00
framelayout-offset-immediate-change.mir
framelayout-scavengingslot.mir
framelayout-sve-basepointer.mir
framelayout-sve-calleesaves-fix.mir [AArch64] Async unwind - function epilogues 2022-04-12 16:50:50 +01:00
framelayout-sve-fixed-width-access.mir [AArch64] Improve access to fixed-width object when stack has SVE. 2022-03-04 09:33:59 +00:00
framelayout-sve-scavengingslot.mir
framelayout-sve.mir llvm-reduce: Don't assert on functions which don't track liveness 2022-06-07 10:00:25 -04:00
framelayout-unaligned-fp.ll [AArch64] Async unwind - function epilogues 2022-04-12 16:50:50 +01:00
free-zext.ll
frintn.ll
ftrunc.ll
func-argpassing.ll
func-calls.ll
funclet-local-stack-size.ll
funclet-match-add-sub-stack.ll
funcptr_cast.ll
function-info-noredzone-present.ll
function-subtarget-features.ll
funnel-shift-rot.ll [AArch64] Compare BFI and ORR with left-shifted operand for OR instruction selection. 2022-11-03 12:32:08 -07:00
funnel-shift.ll [SelectionDAG] Clear promoted bits before UREM on shift amount in PromoteIntRes_FunnelShift. 2022-05-06 09:26:30 -07:00
gep-nullptr.ll
ghc-cc.ll
global-alignment.ll
global-merge-1.ll
global-merge-2.ll
global-merge-3.ll
global-merge-4.ll
global-merge-group-by-use.ll [AArch64] Regenerate more tests. NFC 2022-07-03 15:49:16 +01:00
global-merge-hidden-minsize.ll
global-merge-ignore-single-use-minsize.ll
global-merge-ignore-single-use.ll
global-merge-minsize.ll
global-merge.ll
got-abuse.ll
hadd-combine.ll [DAGCombine] Move AVG combine to SimplifyDemandBits 2022-02-15 10:17:02 +00:00
half.ll
highextractbitcast.ll [AArch64] Mark smull and umull as commutative. 2022-06-13 09:24:15 +01:00
hints.ll
hoist-and-by-const-from-lshr-in-eqcmp-zero.ll
hoist-and-by-const-from-shl-in-eqcmp-zero.ll
hwasan-check-memaccess.ll
hwasan-prefer-fp.ll
i1-contents.ll
i128-align.ll
i128-cmp.ll [AArch64] Optimize cmp chain before legalization 2022-11-23 19:43:44 +08:00
i128-fast-isel-fallback.ll
i128-math.ll [AArch64] Add `foldCSELOfCSEL` combine. 2022-08-19 01:04:29 +01:00
i128_volatile_load_store.ll [AArch64] Split fuse-literals feature 2022-04-11 05:27:11 +00:00
i256-math.ll [AArch64] Add `foldCSELOfCSEL` combine. 2022-08-19 01:04:29 +01:00
iabs.ll
icmp-shift-opt.ll [AArch64] Add `foldADCToCINC` DAG combine. 2022-05-12 22:21:20 +01:00
ifcvt-select.ll
illegal-float-ops.ll
illegal-floating-point-vector-compares.ll [AArch64][CodeGen] Remove redundant vector negations before concat 2022-11-16 11:17:07 +00:00
ilp32-tlsdesc.ll
ilp32-va.ll
immcost.ll
implicit-null-check.ll
implicit-sret.ll
inc-of-add.ll
init-array.ll
inline-asm-blockaddress.ll
inline-asm-clobber-arm64ec.ll [llvm][AArch64] Explain why certain registers are reserved on Arm64EC 2022-09-13 10:13:06 +00:00
inline-asm-clobber-base-frame-pointer.ll [llvm][AArch64] Test warning for clobbering w19 with base frame pointer 2022-09-12 09:57:53 +00:00
inline-asm-clobber.ll
inline-asm-constraints-bad-sve.ll
inline-asm-constraints-badI.ll
inline-asm-constraints-badK.ll
inline-asm-constraints-badK2.ll
inline-asm-constraints-badL.ll
inline-asm-globaladdress.ll
inline-asm-i-constraint-i1.ll
inline-asm-multilevel-gep.ll
inlineasm-S-constraint.ll
inlineasm-X-allocation.ll
inlineasm-X-constraint.ll
inlineasm-illegal-type.ll
inlineasm-ldr-pseudo.ll [llvm-objdump] Add --no-print-imm-hex to tests depending on it. 2022-10-29 15:40:26 -07:00
inlineasm-output-template.ll
insert-extend.ll [AArch64] Fold Mul(And(Srl(X, 15), 0x10001), 0xffff) to CMLTz 2022-08-02 13:01:59 +01:00
insert-subvector-res-legalization.ll [AArch64][SVE] Fold target specific ext/trunc nodes into loads/stores 2022-07-25 15:24:05 +00:00
insert-subvector.ll [AArch64] Move v4i8 concat load lowering to a combine. 2022-04-14 15:19:33 +01:00
int-to-fp-no-neon.ll [AArch64] Predicate SSHLL;SCVTF patterns behind UseAlternateSExtLoadCVTF32 2022-05-16 18:00:30 +01:00
intrinsics-memory-barrier.ll
inttoptr_debug_value.ll [SelectionDAG] Handle IntToPtr constants in dbg.value 2022-08-03 14:10:05 -04:00
irg-nomem.mir
irg.ll
irg_sp_tagp.ll
isinf.ll [AArch64] Add f16 fpimm patterns 2022-07-25 09:08:10 +01:00
jti-correct-datatype.mir
jump-table-32.ll [AArch64] Split fuse-literals feature 2022-04-11 05:27:11 +00:00
jump-table-compress.mir
jump-table-duplicate.mir
jump-table-exynos.ll
jump-table.ll [aarch64] add missing run line to a test 2022-10-05 13:36:59 -04:00
kcfi-bti.ll KCFI sanitizer 2022-08-24 22:41:38 +00:00
kcfi-patchable-function-prefix.ll KCFI sanitizer 2022-08-24 22:41:38 +00:00
kcfi.ll KCFI sanitizer 2022-08-24 22:41:38 +00:00
known-never-nan.ll
lack-of-signed-truncation-check.ll
landingpad-ifcvt.ll
large-consts.ll
large-stack-cmp.ll [AArch64] Async unwind - function prologues 2022-03-24 16:16:44 +00:00
large-stack.ll [AArch64] Async unwind - function epilogues 2022-04-12 16:50:50 +01:00
large_shift.ll
ldp-stp-scaled-unscaled-pairs.ll
ldradr.ll
ldrpre-ldr-merge.mir
ldst-miflags.mir
ldst-nopreidx-sp-redzone.mir
ldst-opt-aa.mir
ldst-opt-after-block-placement.ll
ldst-opt-mte-with-dbg.mir [AArch64] Fix subtarget features for tests. NFC 2022-07-12 11:03:40 +01:00
ldst-opt-mte.mir [AArch64] Fix subtarget features for tests. NFC 2022-07-12 11:03:40 +01:00
ldst-opt-non-imm-offset.mir
ldst-opt-zr-clobber.mir
ldst-opt.ll
ldst-opt.mir
ldst-paired-aliasing.ll [AArch64] Async unwind - function prologues 2022-03-24 16:16:44 +00:00
ldst-regoffset.ll
ldst-unscaledimm.ll
ldst-unsignedimm.ll
ldst-zero.ll
legalize-bug-bogus-cpu.ll
lit.local.cfg
literal_pools_float.ll
live-debugvalues-sve.mir Support the min of module flags when linking, use for AArch64 BTI/PAC-RET 2022-04-13 09:31:51 +02:00
live-interval-analysis.mir
llrint-conv-fp16.ll
llrint-conv.ll
llround-conv-fp16.ll
llround-conv.ll
llvm-ir-to-intrinsic.ll
llvm-masked-gather-legal-for-sve.ll
llvm-masked-scatter-legal-for-sve.ll
load-combine-big-endian.ll [AArch64] Compare BFI and ORR with left-shifted operand for OR instruction selection. 2022-11-03 12:32:08 -07:00
load-combine.ll [AArch64] Compare BFI and ORR with left-shifted operand for OR instruction selection. 2022-11-03 12:32:08 -07:00
load-store-forwarding.ll [DAGCombiner] More load-store forwarding for big-endian 2022-09-14 15:36:35 -04:00
local_vars.ll [AArch64] Async unwind - function epilogues 2022-04-12 16:50:50 +01:00
logic-reassociate.ll [SDAG] simplify bitwise logic with repeated operand 2022-03-13 11:12:30 -04:00
logic-shift.ll [AArch64] Compare BFI and ORR with left-shifted operand for OR instruction selection. 2022-11-03 12:32:08 -07:00
logical-imm.ll
logical_shifted_reg.ll [AArch64] Swap 'lsl(val1,small-shmt)' to right hand side for AND(lsl(val1,small-shmt), lsl(val2,large-shmt)) 2022-10-09 17:26:54 -07:00
loh-adrp-add-ldr-clobber.mir
loh-use-between-adrp-add.mir
loh.mir [AArch64][LOH] Don't ignore regmasks in bundles by iterating over instrs. 2022-04-12 10:34:54 -07:00
loop-micro-op-buffer-size-t99.ll
loop-sink-limit.mir [MachineSink] replace MachineLoop with MachineCycle 2022-05-26 06:45:23 -04:00
loop-sink.mir
lower-ptrmask.ll
lower-range-metadata-func-call.ll
lowerMUL-newload.ll [SchedModels][CortexA55] Add ASIMD integer instructions 2022-02-17 13:41:57 +03:00
lrint-conv-fp16-win.ll
lrint-conv-fp16.ll
lrint-conv-win.ll
lrint-conv.ll
lround-conv-fp16-win.ll
lround-conv-fp16.ll
lround-conv-win.ll
lround-conv.ll
ls64-inline-asm.ll
ls64-intrinsics.ll
machine-combiner-copy.ll [AArch64] Look through copy in MachineCombiner FMUL patterns. 2022-05-31 09:28:00 +01:00
machine-combiner-fmul-dup.mir [AArch64] Mark all instructions that read/write FPCR as doing so 2022-11-16 12:29:50 +00:00
machine-combiner-instr-fmf.mir [AArch64] Mark all instructions that read/write FPCR as doing so 2022-11-16 12:29:50 +00:00
machine-combiner-madd.ll
machine-combiner-reassociate.mir [AArch64] Mark all instructions that read/write FPCR as doing so 2022-11-16 12:29:50 +00:00
machine-combiner-subadd.ll [MachineCombiner, AArch64] Add a new pattern A-(B+C) => (A-B)-C to reduce latency 2022-06-28 21:42:51 +00:00
machine-combiner-subadd2.mir [AArch64] Update test case. 2022-06-29 01:37:56 +00:00
machine-combiner-transient.ll [MachineCombiner] Don't compute the latency of transient instructions 2022-07-14 17:08:14 +00:00
machine-combiner.ll [AArch64] Use fast-math-flags in isAssociativeAndCommutative 2022-09-19 11:34:00 +01:00
machine-combiner.mir [AArch64] Mark all instructions that read/write FPCR as doing so 2022-11-16 12:29:50 +00:00
machine-copy-prop.ll
machine-copy-remove.ll
machine-copy-remove.mir
machine-cp-clobbers.mir [AArch64][test] Replace -march with -mtriple for llc RUN lines 2022-05-31 22:39:43 -07:00
machine-dead-copy.mir
machine-licm-sink-instr.ll [AArch64] Async unwind - function prologues 2022-03-24 16:16:44 +00:00
machine-outliner-2fixup-blr-terminator.mir
machine-outliner-all-stack.mir
machine-outliner-bad-adrp.mir
machine-outliner-bad-register.mir
machine-outliner-bti.mir
machine-outliner-calls.mir
machine-outliner-cfi-tail-some.mir
machine-outliner-cfi-tail.mir
machine-outliner-cfi.mir Fix interaction of CFI instructions with MachineOutliner. 2022-06-10 13:37:49 -07:00
machine-outliner-compatible-candidates.mir
machine-outliner-create-lr-livein.mir
machine-outliner-default.mir
machine-outliner-drop-stack.mir
machine-outliner-flags.ll
machine-outliner-function-annotate.mir
machine-outliner-inline-asm-adrp.mir
machine-outliner-iterative-2.mir
machine-outliner-iterative.mir
machine-outliner-mapping-stats.mir [MachineOutliner] Add testcase for instruction mapping stats 2022-02-17 18:26:59 -08:00
machine-outliner-no-noreturn-no-stack.mir
machine-outliner-noredzone.ll
machine-outliner-noreturn-no-stack.mir
machine-outliner-noreturn-save-lr.mir
machine-outliner-ordering.mir
machine-outliner-outline-bti.ll
machine-outliner-patchable.ll
machine-outliner-regsave.mir
machine-outliner-remarks.ll [AArch64] Async unwind - function epilogues 2022-04-12 16:50:50 +01:00
machine-outliner-retaddr-sign-cfi.ll [AArch64] Emit .cfi_negate_ra_state for PAC-auth instructions. 2022-04-22 13:25:57 +02:00
machine-outliner-retaddr-sign-diff-scope-same-key.ll
machine-outliner-retaddr-sign-non-leaf.ll
machine-outliner-retaddr-sign-regsave.mir [AArch64] Emit .cfi_negate_ra_state for PAC-auth instructions. 2022-04-22 13:25:57 +02:00
machine-outliner-retaddr-sign-same-scope-diff-key.ll
machine-outliner-retaddr-sign-same-scope-same-key-a.ll
machine-outliner-retaddr-sign-same-scope-same-key-b.ll
machine-outliner-retaddr-sign-sp-mod.ll
machine-outliner-retaddr-sign-sp-mod.mir [AArch64] Emit .cfi_negate_ra_state for PAC-auth instructions. 2022-04-22 13:25:57 +02:00
machine-outliner-retaddr-sign-subtarget.ll
machine-outliner-retaddr-sign-thunk.ll [AArch64] Emit .cfi_negate_ra_state for PAC-auth instructions. 2022-04-22 13:25:57 +02:00
machine-outliner-retaddr-sign-v8-3.ll
machine-outliner-side-effect-2.mir
machine-outliner-side-effect.mir
machine-outliner-size-info.mir
machine-outliner-tail.ll
machine-outliner-throw.ll [AArch64] Lower multiplication by a constant int to madd 2022-10-07 19:33:47 +08:00
machine-outliner-throw2.ll [AArch64] Async unwind - function prologues 2022-03-24 16:16:44 +00:00
machine-outliner-thunk.ll
machine-outliner-unsafe-stack-call.mir
machine-outliner.ll Outliner: add "target-cpu" feature from source function to outlined 2022-08-02 09:33:29 +01:00
machine-outliner.mir
machine-scheduler.mir
machine-sink-getmemoperandwithoffset.mir
machine-sink-kill-flags.ll
machine-sink-zr.mir
machine-zero-copy-remove.mir
machine_cse.ll
machine_cse_illegal_hoist.ll
machine_cse_impdef_killflags.ll
macho-global-symbols.ll
macho-trap.ll
macro-fusion-last.mir
macro-fusion.ll
madd-combiner.ll [AArch64] Lower multiplication by a constant int to madd 2022-10-07 19:33:47 +08:00
madd-lohi.ll
mattr-all.ll [AArch64] Add target feature "all" 2022-06-30 10:37:58 -07:00
mature-mc-support.ll
max-jump-table.ll
memcpy-f128.ll
memcpy-scoped-aa.ll
memset-inline.ll [clang] Add support for __builtin_memset_inline 2022-06-10 13:13:59 +00:00
memset-vs-memset-inline.ll [clang] Add support for __builtin_memset_inline 2022-06-10 13:13:59 +00:00
memset.ll
memsize-remarks.ll Support the min of module flags when linking, use for AArch64 BTI/PAC-RET 2022-04-13 09:31:51 +02:00
merge-scoped-aa-store.ll
merge-store-dependency.ll [MC] Omit fill value if it's zero when emitting code alignment 2022-08-25 10:07:33 -07:00
merge-store.ll
merge-trunc-store.ll
mergestores_noimplicitfloat.ll
midpoint-int.ll
min-jump-table.ll
min-max.ll [GlobalISel] Add computeNumSignBits() support for compares. 2022-10-05 00:28:08 +01:00
mingw-refptr.ll
minmax-of-minmax.ll [SchedModels][CortexA55] Add ASIMD integer instructions 2022-02-17 13:41:57 +03:00
minmax.ll Allow bitwidth difference when checking for isOneOrOneSplat. 2022-06-16 16:04:20 +00:00
misched-fusion-addadrp.ll [AArch64] Enable FeatureFuseAdrpAdd for all Arm cpus 2022-09-26 09:55:10 +01:00
misched-fusion-addr-tune.ll [CodeGen] Remove unneeded regex escaping in FileCheck patterns. NFC. 2022-02-18 16:10:56 +00:00
misched-fusion-addr.ll [CodeGen] Remove unneeded regex escaping in FileCheck patterns. NFC. 2022-02-18 16:10:56 +00:00
misched-fusion-aes.ll
misched-fusion-arith-logic.mir
misched-fusion-cmp.mir [AArch64] Fix scheduler crash in fusion code. 2022-10-20 10:47:44 -07:00
misched-fusion-crypto-eor.mir
misched-fusion-csel.ll
misched-fusion-lit.ll [AArch64] Enable AdrpAdd fusion for neoverse-n1 2022-08-19 00:27:32 +00:00
misched-fusion.ll
misched-predicate-virtreg.mir [AArch64] Mark all instructions that read/write FPCR as doing so 2022-11-16 12:29:50 +00:00
misched-stp.ll
mla_mls_merge.ll
mlicm-stack-write-check.mir
movid-no-neon.ll [AArch64] Avoid emitting MOVID when NEON is disabled 2022-05-14 14:40:51 +00:00
movimm-wzr.mir
movw-consts.ll
movw-shift-encoding.ll
mul-lohi.ll
mul_by_elt.ll
mul_pow2.ll [AArch64][SelectionDAG] Lower multiplication by a constant to shl+add+shl+add 2022-10-21 00:33:49 +08:00
mulcmle.ll [AArch64] Fold Mul(And(Srl(X, 15), 0x10001), 0xffff) to CMLTz 2022-08-02 13:01:59 +01:00
multi-vector-store-size.ll
named-vector-shuffle-reverse-neon.ll [AARCH64][COST] Improve cost of reverse shuffles for AArch64 2022-09-08 18:55:49 +08:00
named-vector-shuffle-reverse-sve.ll
named-vector-shuffles-neon.ll
named-vector-shuffles-sve.ll
neg-abs.ll [AArch64] Replace `performANDSCombine` with `performFlagSettingCombine`. 2022-05-12 22:17:23 +01:00
neg-imm.ll [AArch64] Async unwind - function prologues 2022-03-24 16:16:44 +00:00
neg-selects.ll [AARCH64][DAGCombine] Add combine for negation of CSEL absolute value pattern. 2022-02-22 09:59:36 +00:00
neon-abd.ll [AArch64] Replace `performANDSCombine` with `performFlagSettingCombine`. 2022-05-12 22:17:23 +01:00
neon-addlv.ll
neon-bitcast.ll
neon-bitselect.ll
neon-bitwise-instructions.ll [DAG] Canonicalize non-inlane shuffle -> AND if all non-inlane referenced elements are known zero 2022-07-16 11:38:24 +01:00
neon-compare-instructions.ll [GlobalISel] Add computeNumSignBits() support for compares. 2022-10-05 00:28:08 +01:00
neon-diagnostics.ll
neon-dot-product.ll [AArch64] Support for Ampere1 core 2022-05-03 15:54:02 +01:00
neon-dotpattern.ll
neon-dotreduce.ll
neon-extadd.ll [AArch64] Convert vector add(ext, ext) into ext(add(ext, ext)) 2022-06-24 10:04:28 +01:00
neon-extract.ll [AArch64] Add some vector lowering tests and regenerate a couple of files. NFC 2022-09-15 21:52:55 +01:00
neon-extracttruncate.ll [AArch64] Lower 3 and 4 sources buildvectors to TBL 2022-03-26 21:10:43 +00:00
neon-fma-FMF.ll Reassoc FMF should not optimize FMA(a, 0, b) to (b) 2022-07-26 09:39:12 +01:00
neon-fma.ll
neon-fp16fml.ll
neon-fpextend_f16.ll
neon-fpround_f128.ll
neon-idiv.ll
neon-inline-asm-16-bit-fp.ll
neon-insextbitcast.ll [AArch64] Remove incorrect zero element insert-bitcast patterns 2022-09-27 17:08:17 +01:00
neon-mla-mls.ll [MachineCombiner] Don't compute the latency of transient instructions 2022-07-14 17:08:14 +00:00
neon-mov.ll
neon-or-combine.ll
neon-perm.ll [AArch64] Turn UZP1 with undef operand into truncate 2022-03-04 11:12:26 +00:00
neon-reverseshuffle.ll [AArch64] Only mark cost 1 perfect shuffles as legal 2022-04-19 12:58:55 +01:00
neon-sad.ll
neon-scalar-by-elem-fma.ll [AArch64] Allow strict opcodes in indexed fmul and fma patterns 2022-02-17 13:11:54 +00:00
neon-scalar-copy.ll
neon-sha3.ll
neon-shift-left-long.ll
neon-shift-neg.ll
neon-sm4-sm3.ll
neon-stepvector.ll
neon-truncstore.ll
neon-vcadd.ll
neon-vcmla.ll
neon-vmull-high-p8.ll [AArch64] Add smull sinking extract-and-splat tests and regenerate neon-vmull-high-p8.ll. NFC 2022-11-11 08:27:44 +00:00
neon-vmull-high-p64.ll [AArch64] Fix subtarget features for tests. NFC 2022-07-12 11:03:40 +01:00
neon-wide-splat.ll [AArch64] Add lane moves to PerfectShuffle tables 2022-04-19 14:49:50 +01:00
neon-widen-shuffle.ll [AArch64] Only mark cost 1 perfect shuffles as legal 2022-04-19 12:58:55 +01:00
neon_rbit.ll
nest-register.ll
new-load-requires-renaming-in-mssa.ll [InterleavedLoadComb] Rename uses when inserting new uses. 2022-06-14 13:15:23 +01:00
no-fp-asm-clobbers-crash.ll
no-quad-ldp-stp.ll
no-stack-arg-probe.ll
no_cfi.ll
nomerge.ll [AArch64] Async unwind - function epilogues 2022-04-12 16:50:50 +01:00
nonlazybind.ll
nontemporal-load.ll [AArch64] Compare BFI and ORR with left-shifted operand for OR instruction selection. 2022-11-03 12:32:08 -07:00
nontemporal.ll
note-gnu-property-pac-bti-0.ll Support the min of module flags when linking, use for AArch64 BTI/PAC-RET 2022-04-13 09:31:51 +02:00
note-gnu-property-pac-bti-1.ll Support the min of module flags when linking, use for AArch64 BTI/PAC-RET 2022-04-13 09:31:51 +02:00
note-gnu-property-pac-bti-2.ll Support the min of module flags when linking, use for AArch64 BTI/PAC-RET 2022-04-13 09:31:51 +02:00
note-gnu-property-pac-bti-3.ll Support the min of module flags when linking, use for AArch64 BTI/PAC-RET 2022-04-13 09:31:51 +02:00
note-gnu-property-pac-bti-4.ll Support the min of module flags when linking, use for AArch64 BTI/PAC-RET 2022-04-13 09:31:51 +02:00
null-mctargetstreamer.ll AArch64: Register null MCTargetStreamer 2022-10-31 18:31:46 -07:00
nzcv-save.ll [AArch64] Replace `performANDSCombine` with `performFlagSettingCombine`. 2022-05-12 22:17:23 +01:00
optimize-cond-branch.ll [AArch64] Async unwind - function epilogues 2022-04-12 16:50:50 +01:00
optimize-imm.ll [AArch64] Regenerate optimize-imm.ll test checks 2022-07-15 13:54:17 +01:00
or-combine.ll
overeager_mla_fusing.ll [SchedModels][CortexA55] Add ASIMD integer instructions 2022-02-17 13:41:57 +03:00
overlapping-copy-bundle-cycle.mir
overlapping-copy-bundle.mir
p2align-zero-fillvalue.ll [MC] Omit fill value if it's zero when emitting code alignment 2022-08-25 10:07:33 -07:00
pacbti-llvm-generated-funcs-1.ll
pacbti-llvm-generated-funcs-2.ll Support the min of module flags when linking, use for AArch64 BTI/PAC-RET 2022-04-13 09:31:51 +02:00
pacbti-module-attrs.ll Support the min of module flags when linking, use for AArch64 BTI/PAC-RET 2022-04-13 09:31:51 +02:00
paired-load.ll
parity.ll [AArch64] use CNT for ISD::popcnt and ISD::parity if available 2022-12-02 11:27:14 +00:00
partial-pipeline-execution.ll
patchable-function-entry-bti.ll
patchable-function-entry-empty.mir
patchable-function-entry.ll
pcsections.ll [GlobalISel][AArch64] Fix pcsections for expanded atomics and add more tests 2022-09-15 10:36:11 +02:00
peephole-and-tst.ll [AArch64] Async unwind - function prologues 2022-03-24 16:16:44 +00:00
peephole-insert-subreg.mir [Peephole] rewrite INSERT_SUBREG to SUBREG_TO_REG if upper bits zero 2022-09-09 09:00:54 +08:00
peephole-opt-check-cflags.mir
peephole-orr.mir [AArch64] Remove ToBeRemoved from AArch64MIPeepholeOpt 2022-06-08 17:26:07 +01:00
phi-dbg.ll
pic-eh-stubs.ll
pie.ll
pmull-ldr-merge.ll [NFC] Move a test case across files. 2022-08-30 14:16:28 -07:00
popcount.ll
post-ra-machine-sink.mir
postra-mi-sched.ll
pow.75.ll Revert "[CodeGen] Place SDNode debug ID declaration under appropriate #if" 2022-04-06 20:32:53 +03:00
pow.ll
powi-windows.ll
powi.ll [SimplifyLibCalls] refactor pow(x, n) expansion where n is a constant integer value 2022-07-09 12:00:22 -04:00
pr-cf624b2.ll [AArch64] `LowerBUILD_VECTOR()`: `NormalizeBuildVector()` might return non-BUILD_VECTOR 2022-11-26 18:46:36 +03:00
pr27816.ll
pr33172.ll
pr40091.ll
pr48188.ll
pr49781.ll
pr51476.ll [DAGCombine] Add node in the worklist in topological order in CombineTo 2022-05-07 16:24:31 +00:00
pr51516.mir
pr53315-returned-i128.ll
pr55178.ll [SelectionDAG] Constant fold (sext_inreg undef, VT) to 0 instead of undef. 2022-05-05 09:45:35 -07:00
pr55201.ll [DAGCombiner] When matching a disguised rotate by constant don't forget to apply LHSMask/RHSMask. 2022-04-30 11:02:30 -07:00
pr55644.ll [DAGCombiner][AArch64] Don't fold (smulo x, 2) -> (saddo x, x) if VT is i2. 2022-05-23 11:13:57 -07:00
pr58350.ll [AArch64]Enhance 'isBitfieldPositioningOp' to find pattern (shl(and(val,mask), N). 2022-10-17 09:01:29 -07:00
pr58431.ll [GlobalISel][AArch64] Fix miscompile caused by wrong G_ZEXT selection in GISel 2022-10-26 09:54:13 +08:00
pr58516.ll [AAArch64][Windows] Fix the crash when running ninja check-asan 2022-10-21 22:11:54 +08:00
predicated-add-sub.ll [AArch64] Add patterns for SVE predicated add/sub and mov combine 2022-11-28 16:37:30 +00:00
preferred-alignment.ll
preferred-function-alignment.ll [AArch64] Set MaxBytesForLoopAlignment for more targets 2022-03-31 11:37:11 +01:00
prefixdata.ll
preserve_mostcc.ll
print-mrs-system-register.ll
prologue-epilogue-remarks.mir
ptrauth-intrinsic-sign-generic.ll
ptrauth-intrinsic-sign.ll
ptrauth-intrinsic-strip.ll [AArch64][PAC] Select XPAC for ptrauth.strip intrinsic. 2022-10-24 08:15:56 -07:00
pull-binop-through-shift.ll
pull-conditional-binop-through-shift.ll
pull-negations-after-concat-of-truncates.ll [AArch64][CodeGen] Remove redundant vector negations before concat 2022-11-16 11:17:07 +00:00
qmovn.ll
ragreedy-csr.ll
ragreedy-local-interval-cost.ll [AArch64] Order STP Q's by ascending address 2022-05-23 09:50:44 +01:00
rand.ll
rbit.ll
read-pc.ll
readcyclecounter.ll
recp-fastmath.ll
reduce-and.ll [AArch64] Add GPR rr instructions to isAssociativeAndCommutative 2022-11-27 12:53:10 +00:00
reduce-or.ll [AArch64] Add GPR rr instructions to isAssociativeAndCommutative 2022-11-27 12:53:10 +00:00
reduce-shuffle.ll [AArch64] Fold Mul(And(Srl(X, 15), 0x10001), 0xffff) to CMLTz 2022-08-02 13:01:59 +01:00
reduce-xor.ll [AArch64] Add GPR rr instructions to isAssociativeAndCommutative 2022-11-27 12:53:10 +00:00
redundant-copy-elim-empty-mbb.ll
redundant-mov-from-zero-extend.ll
redundant-orrwrs-from-zero-extend.mir
reg-scavenge-frame.mir
regalloc-last-chance-recolor-with-split.mir [Greedy RegAlloc] Fix the handling of split register in last chance re-coloring. 2022-06-14 12:04:17 +07:00
regcoal-physreg.mir
regress-bitcast-formals.ll
regress-combine-extract-vectors.ll
regress-f128csel-flags.ll
regress-fp128-livein.ll
regress-tail-livereg.ll
regress-tblgen-chains.ll [AArch64] Regenerate 3 codegen test files. NFC 2022-06-16 18:23:05 +01:00
regress-w29-reserved-with-fp.ll
relaxed-fp-atomics.ll
reloc-specifiers.mir
rem_crash.ll
remat-const-float-simd.ll [AArch64] Use simd mov to materialize big fp constants 2022-03-04 11:34:20 -05:00
remat-float0.ll
remat.ll [AArch64] Support for Ampere1 core 2022-05-03 15:54:02 +01:00
reserveXreg.ll [AArch64] Correctly recognize -reserve-regs-for-regalloc=X30,X29 2022-11-22 17:18:29 +00:00
returnaddr.ll
reverse-csr-restore-seq.mir [AArch64] Async unwind - Always place the first LDP at the end when ReverseCSRRestoreSeq is true 2022-02-24 18:48:07 +00:00
rm_redundant_cmp.ll [AArch64] Add some extra typepromotion cost tests. NFC 2022-09-12 11:13:23 +01:00
rmif-def-nzcv.mir
rmif-use-nzcv.mir
rotate-extract.ll [AArch64] Compare BFI and ORR with left-shifted operand for OR instruction selection. 2022-11-03 12:32:08 -07:00
rotate.ll
round-conv.ll
round-fptosi-sat-scalar.ll
round-fptoui-sat-scalar.ll
rvmarker-pseudo-expansion-and-outlining.mir
sadd_sat.ll
sadd_sat_plus.ll
sadd_sat_vec.ll [AArch64] Add `foldCSELOfCSEL` combine. 2022-08-19 01:04:29 +01:00
sat-add.ll [SchedModels][CortexA55] Add ASIMD integer instructions 2022-02-17 13:41:57 +03:00
scalable-vector-promotion.ll
sched-past-vector-ldst.ll
scheduledag-constreg.mir
sdag-no-typesize-warnings-regandsizes.ll
sdag-store-merging-bug.ll
sdivpow2.ll
seh-finally.ll
seh_funclet_x1.ll
select-constant-xor.ll
select-with-and-or.ll Extend `performANDCSELCombine` to `performANDORCSELCombine` 2022-03-04 15:09:59 +00:00
select_cc.ll [AArch64][CodeGen]Fold the mov and lsl into ubfiz 2022-09-09 23:50:29 +08:00
select_const.ll [AArch64] Increase AddedComplexity of BIC 2022-09-06 20:31:24 +00:00
select_fmf.ll
selectcc-to-shiftand.ll [SchedModels][CortexA55] Add ASIMD integer instructions 2022-02-17 13:41:57 +03:00
selectiondag-order.ll
selectopt-logical.ll [SelectOpt] Don't treat LogicalAnd/LogicalOr as selects 2022-11-24 14:29:57 +00:00
selectopt.ll [AArch64] Enable the select optimize pass for AArch64 2022-12-03 16:08:58 +00:00
semantic-interposition-asm.ll Mark the $local function begin symbol as a function 2022-08-26 09:34:04 +00:00
seqpaircopy.mir
seqpairspill.mir
setcc-fsh.ll [SDAG] try to reduce compare of funnel shift equal 0 2022-04-11 07:44:58 -04:00
setcc-takes-i32.ll
setcc-type-mismatch.ll
setf8-def-nzcv.mir
setf8-use-nzcv.mir
setf16-def-nzcv.mir
setf16-use-nzcv.mir
setjmp-bti-no-enforcement.ll Support the min of module flags when linking, use for AArch64 BTI/PAC-RET 2022-04-13 09:31:51 +02:00
setjmp-bti-outliner.ll Support the min of module flags when linking, use for AArch64 BTI/PAC-RET 2022-04-13 09:31:51 +02:00
setjmp-bti.ll Support the min of module flags when linking, use for AArch64 BTI/PAC-RET 2022-04-13 09:31:51 +02:00
settag-merge-order.ll
settag-merge.ll
settag-merge.mir
settag.ll [AArch64] Async unwind - Fix MTE codegen emitting frame adjustments in a loop 2022-04-15 14:00:23 +01:00
shadow-call-stack.ll
shift-accumulate.ll Implement support for AArch64ISD::MOVI in computeKnownBits 2022-11-01 15:50:08 +00:00
shift-amount-mod.ll
shift-by-signext.ll
shift-logic.ll Recommit [AArch64] Improve codegen for shifted mask op 2022-11-07 17:16:35 +08:00
shift-mod.ll
shift_minsize.ll
shiftregister-from-and.ll [AArch64] Precommit test for D138904; NFC 2022-12-02 10:59:03 +08:00
shrink-constant-multiple-users.ll
shrink-wrap.ll Fix some test files with executable permissions 2022-12-02 17:12:03 -05:00
shrink-wrapping-vla.ll [AArch64][CodeGen]Fold the mov and lsl into ubfiz 2022-09-09 23:50:29 +08:00
shuffle-mask-legal.ll
shuffle-tbl34.ll [AArch64] Teach perfect shuffles tables about D-lane movs 2022-05-17 18:16:45 +01:00
shuffles.ll [AArch64] Teach perfect shuffles tables about D-lane movs 2022-05-17 18:16:45 +01:00
sibling-call.ll [AArch64] Async unwind - function prologues 2022-03-24 16:16:44 +00:00
sign-return-address-cfi-negate-ra-state.ll
sign-return-address.ll AArch64: Don't use RETA[AB] when ShadowCallStack is enabled. 2022-09-30 12:33:23 -07:00
signbit-shift.ll [SchedModels][CortexA55] Add ASIMD integer instructions 2022-02-17 13:41:57 +03:00
signed-truncation-check.ll
simple-macho.ll [llvm-objdump,ARM] Fix further test failures. 2022-07-26 11:35:16 +01:00
sincos-expansion.ll
sincospow-vector-expansion.ll
sink-addsub-of-const.ll [SchedModels][CortexA55] Add ASIMD integer instructions 2022-02-17 13:41:57 +03:00
sink-copy-for-shrink-wrap.ll
sinksplat.ll [AArch64] Allow sinking both extract and splat to smull 2022-11-12 16:41:15 +00:00
sitofp-fixed-legal.ll [SchedModels][CortexA55] Add ASIMD integer instructions 2022-02-17 13:41:57 +03:00
sme-disable-gisel-fisel.ll [AArch64][SME] Always allocate a lazy-save buffer if a function has ZA state. 2022-11-21 16:33:23 +00:00
sme-intrinsics-add.ll [AArch64][SME] Make all SME intrinsics use 32bit immediates. 2022-10-31 11:28:12 +00:00
sme-intrinsics-loads.ll [AArch64][SME] Make all SME intrinsics use 32bit immediates. 2022-10-31 11:28:12 +00:00
sme-intrinsics-mopa.ll [AArch64][SME] Make all SME intrinsics use 32bit immediates. 2022-10-31 11:28:12 +00:00
sme-intrinsics-mops.ll [AArch64][SME] Make all SME intrinsics use 32bit immediates. 2022-10-31 11:28:12 +00:00
sme-intrinsics-mova-extract.ll [AArch64][SME] Make all SME intrinsics use 32bit immediates. 2022-10-31 11:28:12 +00:00
sme-intrinsics-mova-insert.ll [AArch64][SME] Make all SME intrinsics use 32bit immediates. 2022-10-31 11:28:12 +00:00
sme-intrinsics-rdsvl.ll [AArch64][SME] Add SME cntsb/h/w/d intrinsics 2022-06-16 10:50:25 +01:00
sme-intrinsics-stores.ll [AArch64][SME] Make all SME intrinsics use 32bit immediates. 2022-10-31 11:28:12 +00:00
sme-intrinsics-zero.ll [AArch64][SME] Make all SME intrinsics use 32bit immediates. 2022-10-31 11:28:12 +00:00
sme-lazy-save-call.ll [SME] Store buffer to the correct pointer when setting up lazy-save. 2022-11-16 16:37:33 +00:00
sme-new-za-function.ll [AArch64][SME] Set fn attributes correctly on __arm_tpidr2_save call. 2022-10-28 07:33:50 +00:00
sme-read-write-tpidr2.ll [AArch64][SME] Add some SME PSTATE setting/query intrinsics 2022-06-22 10:26:45 +01:00
sme-shared-za-interface.ll [AArch64][SME] Always allocate a lazy-save buffer if a function has ZA state. 2022-11-21 16:33:23 +00:00
sme-streaming-body.ll [AArch64][SME] Fix chain for arm_locally_streaming functions. 2022-10-25 08:14:51 +00:00
sme-streaming-compatible-interface.ll [AArch64][SME] Disable tail-call optimization when streaming mode change or lazy-save may be required. 2022-09-17 16:15:07 +00:00
sme-streaming-interface.ll [AArch64][SME] Prevent SVE object address calculations between smstop and call 2022-10-05 08:11:16 +00:00
sme-support-routines-calling-convention.ll [AArch64][SME] Fix lowering of llvm.aarch64.get.pstatesm() 2022-09-15 15:14:13 +00:00
sme-toggle-pstateza.ll [AArch64][SME] Add intrinsics for enabling/disabling ZA. 2022-09-17 16:41:42 +00:00
space.ll
special-reg.ll
speculation-hardening-dagisel.ll [LLVM][AArch64] Don't warn about clobbering X16 when Speculative Load Hardening is used 2022-09-14 15:19:53 +00:00
speculation-hardening-loads.ll [AArch64] Async unwind - function epilogues 2022-04-12 16:50:50 +01:00
speculation-hardening-sls-blr.mir
speculation-hardening-sls.ll [IR] Don't use blockaddresses as callbr arguments 2022-07-15 10:18:17 +02:00
speculation-hardening-sls.mir Untangle the mess which is MachineBasicBlock::hasAddressTaken(). 2022-08-16 16:15:44 -07:00
speculation-hardening.ll
speculation-hardening.mir
spill-fold.ll
spill-fold.mir [AARCH64 folding] Do not fold any copy with NZCV 2022-06-21 10:38:49 +07:00
spill-stack-realignment.mir
spill-undef.mir
spillfill-sve.ll
spillfill-sve.mir
split-vector-insert.ll [IR] Move vector.insert/vector.extract out of experimental namespace 2022-06-27 10:48:45 +00:00
sponentry.ll
sqrt-fastmath.ll
srem-lkk.ll [AArch64][SelectionDAG] stick all the power-of-two tests in a separate file; NFC 2022-04-14 00:48:28 +08:00
srem-pow2.ll [Arch64][SelectionDAG] Add target-specific implementation of srem 2022-04-19 02:49:42 +08:00
srem-seteq-illegal-types.ll [ValueTypes] Define MVTs for v128i2/v64i4 as well as i2 and i4. 2022-06-02 00:49:11 +00:00
srem-seteq-optsize.ll
srem-seteq-vec-nonsplat.ll [SchedModels][CortexA55] Add ASIMD integer instructions 2022-02-17 13:41:57 +03:00
srem-seteq-vec-splat.ll [SDAG] fold sub-of-shift to add-of-shift 2022-02-18 11:55:50 -05:00
srem-seteq.ll [AArch64] Lower multiplication by a constant int to madd 2022-10-07 19:33:47 +08:00
srem-vector-lkk.ll [Arch64][SelectionDAG] Add target-specific implementation of srem 2022-04-19 02:49:42 +08:00
sshl_sat.ll
ssub_sat.ll
ssub_sat_plus.ll
ssub_sat_vec.ll [AArch64] Add `foldCSELOfCSEL` combine. 2022-08-19 01:04:29 +01:00
stack-guard-reassign-sve.mir
stack-guard-reassign.ll [CodeGen] Remove unneeded regex escaping in FileCheck patterns. NFC. 2022-02-18 16:10:56 +00:00
stack-guard-reassign.mir
stack-guard-remat-bitcast.ll Revert "Reapply "[CodeGen] Add new pass for late cleanup of redundant definitions."" 2022-12-05 00:52:00 +01:00
stack-guard-sve.ll [AArch64] Improve access to fixed-width object when stack has SVE. 2022-03-04 09:33:59 +00:00
stack-guard-sysreg.ll [AArch64] Async unwind - function epilogues 2022-04-12 16:50:50 +01:00
stack-guard-vaarg.ll
stack-id-pei-alloc.mir
stack-id-stackslot-scavenging.mir
stack-protector-musttail.ll StackProtector: ensure stack checks are inserted before the tail call 2022-09-16 22:24:46 +08:00
stack-protector-target.ll [ARM64EC 5/?] Fix names of __chkstk and __security_check_cookie. 2022-09-05 13:19:54 -07:00
stack-tagging-cfi.ll [MC] Add 'G' to augmentation string for MTE instrumented functions 2022-06-08 12:36:32 -07:00
stack-tagging-dbg.ll
stack-tagging-ex-1.ll
stack-tagging-ex-2.ll
stack-tagging-initializer-merge.ll
stack-tagging-loop.ll [MTE] [HWASan] Use LoopInfo for reachability queries. 2022-06-22 15:28:49 -07:00
stack-tagging-musttail.ll
stack-tagging-setjmp.ll
stack-tagging-split-lifetime.ll [MTE] [HWASan] unify isInterestingAlloca 2022-09-28 15:52:34 -07:00
stack-tagging-stack-coloring.ll [MTE] Add test that stack tagging does not mess up stack coloring. 2022-03-14 13:36:21 -07:00
stack-tagging-unchecked-ld-st.ll [CodeGen] Remove unneeded regex escaping in FileCheck patterns. NFC. 2022-02-18 16:10:56 +00:00
stack-tagging-untag-placement.ll
stack-tagging.ll [MTE] [HWASan] unify isInterestingAlloca 2022-09-28 15:52:34 -07:00
stack_guard_remat.ll [CodeGen] Remove unneeded regex escaping in FileCheck patterns. NFC. 2022-02-18 16:10:56 +00:00
stackguard-internal.ll
stackmap-dynamic-alloca.ll [STACKMAPS] Document+test UINT64_MAX stack size. 2022-06-27 11:57:07 +01:00
stackmap-frame-setup.ll
stackmap-liveness.ll Migrate llvm.experimental.patchpoint() to ptr. 2022-08-10 13:18:02 +01:00
stackmap.ll Migrate llvm.experimental.patchpoint() to ptr. 2022-08-10 13:18:02 +01:00
statepoint-call-lowering-lr.ll [STATEPOINT] Mark LR is early-clobber implicit def. 2022-02-21 10:37:43 +07:00
statepoint-call-lowering-sp.ll
statepoint-call-lowering.ll [AArch64] Async unwind - function prologues 2022-03-24 16:16:44 +00:00
stgp.ll [CodeGen] Remove unneeded regex escaping in FileCheck patterns. NFC. 2022-02-18 16:10:56 +00:00
store_merge_pair_offset.ll
storepairsuppress_minsize.ll [AArch64] Async unwind - function epilogues 2022-04-12 16:50:50 +01:00
stp-opt-with-renaming-debug.mir
stp-opt-with-renaming-ld3.mir
stp-opt-with-renaming-reserved-regs.mir [AArch64] SME2 Single-multi vector ternary int/FP 2 and 4 registers 2022-10-19 17:49:48 +01:00
stp-opt-with-renaming-undef-assert.mir [IR] Enable opaque pointers by default 2022-06-02 09:40:56 +02:00
stp-opt-with-renaming.mir [AArch64] Mark all instructions that read/write FPCR as doing so 2022-11-16 12:29:50 +00:00
strict-fp-int-promote.ll
strict-fp-opt.ll [AArch64] Mark all instructions that read/write FPCR as doing so 2022-11-16 12:29:50 +00:00
strpre-str-merge.mir
strqro.ll
strqu.ll
sub-of-bias.ll
sub-of-not.ll
sub-splat-sub.ll
sub1.ll [SDAG] enhance sub->xor fold to ignore signbit 2022-07-11 12:37:50 -04:00
subs-to-sub-opt.ll
sve-aba.ll [SVE] Lower "unpredicated" sabd/uabd intrinsics to ISD::ABDS/U. 2022-06-22 00:02:51 +01:00
sve-abd.ll [DAGCombiner] Extend ISD::ABDS/U combine to handle more cases. 2022-02-17 13:32:20 +00:00
sve-adr.ll
sve-alloca-stackid.ll
sve-alloca.ll [AArch64][SVE] Restore SP from FP when SVE CSRs and variable sized objects are present 2022-05-04 12:57:03 +00:00
sve-bad-intrinsics.ll
sve-bad-select.ll
sve-bit-counting-pred.ll
sve-bit-counting.ll
sve-bitcast.ll [SelectionDAG] Remove invalid TypeSize conversion from WidenVecOp_BITCAST. 2022-06-11 10:41:13 +01:00
sve-breakdown-scalable-vectortype.ll
sve-callbyref-notailcall.ll
sve-calling-convention-byref.ll
sve-calling-convention-mixed.ll Revert "Reapply "[CodeGen] Add new pass for late cleanup of redundant definitions."" 2022-12-05 00:52:00 +01:00
sve-calling-convention.ll
sve-cmp-folds.ll [AArch64] Add patterns to fold zext(cmpeq(x, splat(0))) 2022-07-19 08:14:38 +00:00
sve-cmp-select.ll [AArch64][SVE] Fold away SETCC if original input was predicate vector. 2022-02-28 14:12:43 +00:00
sve-cntp-combine.ll
sve-coalesce-ptrue-intrinsics.ll
sve-copy-zprpair.mir
sve-expand-div.ll
sve-extload-icmp.ll [llvm][SVE] Remove redundant and when comparing against extending load 2022-07-19 17:08:32 +01:00
sve-extract-element.ll [CodeGen] Using ZExt for extractelement indices. 2022-10-15 15:45:35 -07:00
sve-extract-fixed-from-scalable-vector.ll [CodeGen] Support extracting fixed-length vectors from illegal scalable vectors 2022-09-05 15:05:14 +01:00
sve-extract-fixed-vector.ll [IR] Move vector.insert/vector.extract out of experimental namespace 2022-06-27 10:48:45 +00:00
sve-extract-scalable-vector.ll [AArch64] Add support for insert/extract for nxv1i1 types. 2022-07-04 15:54:03 +00:00
sve-extract-vector-to-predicate-store.ll [IR] Move vector.insert/vector.extract out of experimental namespace 2022-06-27 10:48:45 +00:00
sve-fadda-select.ll [AArch64] Add f16 fpimm patterns 2022-07-25 09:08:10 +01:00
sve-fcmp.ll [SVE] Extend "and(ipg,cmp(x,y))" patterns to cover the case when y is an immediate. 2022-07-01 00:56:22 +01:00
sve-fcopysign.ll [AArch64][SVE] Use SVE for VLS fcopysign for wide vectors 2022-08-10 10:17:19 +00:00
sve-fcvt.ll
sve-fix-length-and-combine-512.ll [AArch64] Regenerate more tests. NFC 2022-07-03 15:49:16 +01:00
sve-fixed-ld2-alloca.ll [AArch64] NFC: Fix broken test sve-fixed-ld2-alloca.ll 2022-11-16 17:23:20 +00:00
sve-fixed-length-addressing-modes.ll [SVE] Extend findMoreOptimalIndexType so BUILD_VECTORs do not force 64bit indices. 2022-08-18 18:00:53 +01:00
sve-fixed-length-bit-counting.ll [AArch64][SVE] Migrate tests to use opaque pointers (NFC) 2022-11-10 00:38:28 +00:00
sve-fixed-length-bitcast.ll [AArch64][SVE] Migrate tests to use opaque pointers (NFC) 2022-11-10 00:38:28 +00:00
sve-fixed-length-bitselect.ll [AArch64][SVE] Migrate tests to use opaque pointers (NFC) 2022-11-10 00:38:28 +00:00
sve-fixed-length-build-vector.ll [SVE][SelectionDAG] Use INDEX to generate matching instances of BUILD_VECTOR. 2022-07-26 15:28:37 +00:00
sve-fixed-length-concat.ll [AArch64][SVE] Migrate tests to use opaque pointers (NFC) 2022-11-10 00:38:28 +00:00
sve-fixed-length-ext-loads.ll [AArch64][SVE] Migrate tests to use opaque pointers (NFC) 2022-11-10 00:38:28 +00:00
sve-fixed-length-extract-subvector.ll [AArch64][SVE] Migrate tests to use opaque pointers (NFC) 2022-11-10 00:38:28 +00:00
sve-fixed-length-extract-vector-elt.ll [AArch64][SVE] Migrate tests to use opaque pointers (NFC) 2022-11-10 00:38:28 +00:00
sve-fixed-length-fcopysign.ll [AArch64][SVE] Use SVE for VLS fcopysign for wide vectors 2022-08-10 10:17:19 +00:00
sve-fixed-length-fp-arith.ll [AArch64][SVE] Migrate tests to use opaque pointers (NFC) 2022-11-10 00:38:28 +00:00
sve-fixed-length-fp-compares.ll [AArch64][SVE] Migrate tests to use opaque pointers (NFC) 2022-11-10 00:38:28 +00:00
sve-fixed-length-fp-convert.ll [AArch64][SVE] Migrate tests to use opaque pointers (NFC) 2022-11-10 00:38:28 +00:00
sve-fixed-length-fp-extend-trunc.ll [AArch64][SVE] Migrate tests to use opaque pointers (NFC) 2022-11-10 00:38:28 +00:00
sve-fixed-length-fp-fma.ll [AArch64][SVE] Migrate tests to use opaque pointers (NFC) 2022-11-10 00:38:28 +00:00
sve-fixed-length-fp-minmax.ll [AArch64][SVE] Migrate tests to use opaque pointers (NFC) 2022-11-10 00:38:28 +00:00
sve-fixed-length-fp-reduce.ll [AArch64][SVE] Migrate tests to use opaque pointers (NFC) 2022-11-10 00:38:28 +00:00
sve-fixed-length-fp-rounding.ll [AArch64][SVE] Migrate tests to use opaque pointers (NFC) 2022-11-10 00:38:28 +00:00
sve-fixed-length-fp-select.ll [AArch64][SVE] Migrate tests to use opaque pointers (NFC) 2022-11-10 00:38:28 +00:00
sve-fixed-length-fp-to-int.ll [SVE] Fix incorrect predicate for fixed length int/fp conversion. 2022-11-22 14:40:12 +00:00
sve-fixed-length-fp-vselect.ll [AArch64][SVE] Migrate tests to use opaque pointers (NFC) 2022-11-10 00:38:28 +00:00
sve-fixed-length-frame-offests-crash.ll [AArch64][SVE] Migrate tests to use opaque pointers (NFC) 2022-11-10 00:38:28 +00:00
sve-fixed-length-frame-offests.ll [AArch64][SVE] Migrate tests to use opaque pointers (NFC) 2022-11-10 00:38:28 +00:00
sve-fixed-length-insert-vector-elt.ll [AArch64][SVE] Migrate tests to use opaque pointers (NFC) 2022-11-10 00:38:28 +00:00
sve-fixed-length-int-arith.ll [AArch64][SVE] Migrate tests to use opaque pointers (NFC) 2022-11-10 00:38:28 +00:00
sve-fixed-length-int-compares.ll [AArch64][SVE] Migrate tests to use opaque pointers (NFC) 2022-11-10 00:38:28 +00:00
sve-fixed-length-int-div.ll [AArch64][SVE] Migrate tests to use opaque pointers (NFC) 2022-11-10 00:38:28 +00:00
sve-fixed-length-int-extends.ll [AArch64][SVE] Migrate tests to use opaque pointers (NFC) 2022-11-10 00:38:28 +00:00
sve-fixed-length-int-immediates.ll [AArch64][SVE] Migrate tests to use opaque pointers (NFC) 2022-11-10 00:38:28 +00:00
sve-fixed-length-int-log.ll [AArch64][SVE] Migrate tests to use opaque pointers (NFC) 2022-11-10 00:38:28 +00:00
sve-fixed-length-int-minmax.ll [AArch64][SVE] Migrate tests to use opaque pointers (NFC) 2022-11-10 00:38:28 +00:00
sve-fixed-length-int-mulh.ll [AArch64][SVE] Migrate tests to use opaque pointers (NFC) 2022-11-10 00:38:28 +00:00
sve-fixed-length-int-reduce.ll [AArch64][SVE] Migrate tests to use opaque pointers (NFC) 2022-11-10 00:38:28 +00:00
sve-fixed-length-int-rem.ll [AArch64][SVE] Migrate tests to use opaque pointers (NFC) 2022-11-10 00:38:28 +00:00
sve-fixed-length-int-select.ll [AArch64][SVE] Migrate tests to use opaque pointers (NFC) 2022-11-10 00:38:28 +00:00
sve-fixed-length-int-shifts.ll [AArch64][SVE] Migrate tests to use opaque pointers (NFC) 2022-11-10 00:38:28 +00:00
sve-fixed-length-int-to-fp.ll [SVE] Fix incorrect predicate for fixed length int/fp conversion. 2022-11-22 14:40:12 +00:00
sve-fixed-length-int-vselect.ll [AArch64][SVE] Migrate tests to use opaque pointers (NFC) 2022-11-10 00:38:28 +00:00
sve-fixed-length-limit-duplane.ll [AArch64][SVE] Migrate tests to use opaque pointers (NFC) 2022-11-10 00:38:28 +00:00
sve-fixed-length-loads.ll [AArch64][SVE] Migrate tests to use opaque pointers (NFC) 2022-11-10 00:38:28 +00:00
sve-fixed-length-log-reduce.ll [AArch64][SVE] Migrate tests to use opaque pointers (NFC) 2022-11-10 00:38:28 +00:00
sve-fixed-length-mask-opt.ll [AArch64][SVE] Migrate tests to use opaque pointers (NFC) 2022-11-10 00:38:28 +00:00
sve-fixed-length-masked-gather.ll [AArch64][SVE] Migrate tests to use opaque pointers (NFC) 2022-11-10 00:38:28 +00:00
sve-fixed-length-masked-loads.ll [AArch64][SVE] Migrate tests to use opaque pointers (NFC) 2022-11-10 00:38:28 +00:00
sve-fixed-length-masked-scatter.ll [AArch64][SVE] Migrate tests to use opaque pointers (NFC) 2022-11-10 00:38:28 +00:00
sve-fixed-length-masked-stores.ll [AArch64][SVE] Migrate tests to use opaque pointers (NFC) 2022-11-10 00:38:28 +00:00
sve-fixed-length-no-vscale-range.ll [AArch64][SVE] Change the asserts in LowerToPredicatedOp to check for legal types 2022-03-11 09:57:58 +00:00
sve-fixed-length-optimize-ptrue.ll [AArch64][SVE] Migrate tests to use opaque pointers (NFC) 2022-11-10 00:38:28 +00:00
sve-fixed-length-permute-rev.ll [AArch64][SVE] Migrate tests to use opaque pointers (NFC) 2022-11-10 00:38:28 +00:00
sve-fixed-length-permute-zip-uzp-trn.ll [AArch64][SVE] Migrate tests to use opaque pointers (NFC) 2022-11-10 00:38:28 +00:00
sve-fixed-length-ptest.ll [AArch64][SVE] Migrate tests to use opaque pointers (NFC) 2022-11-10 00:38:28 +00:00
sve-fixed-length-reshuffle.ll
sve-fixed-length-rev.ll [AArch64][SVE] Migrate tests to use opaque pointers (NFC) 2022-11-10 00:38:28 +00:00
sve-fixed-length-sdiv-pow2.ll [AArch64][SVE] Migrate tests to use opaque pointers (NFC) 2022-11-10 00:38:28 +00:00
sve-fixed-length-shuffles.ll [AArch64] Lower fixed-length vector_shuffle to SVE splat if possible 2022-11-16 11:47:27 +00:00
sve-fixed-length-splat-vector.ll [AArch64] Lower fixed-length vector_shuffle to SVE splat if possible 2022-11-16 11:47:27 +00:00
sve-fixed-length-stores.ll [AArch64][SVE] Migrate tests to use opaque pointers (NFC) 2022-11-10 00:38:28 +00:00
sve-fixed-length-subvector.ll [AArch64][SVE] Migrate tests to use opaque pointers (NFC) 2022-11-10 00:38:28 +00:00
sve-fixed-length-trunc-stores.ll [AArch64][SVE] Migrate tests to use opaque pointers (NFC) 2022-11-10 00:38:28 +00:00
sve-fixed-length-trunc.ll [AArch64][SVE] Migrate tests to use opaque pointers (NFC) 2022-11-10 00:38:28 +00:00
sve-fixed-length-vector-shuffle.ll [AArch64][SVE] Migrate tests to use opaque pointers (NFC) 2022-11-10 00:38:28 +00:00
sve-fold-loadext-and-splat-vector.ll [DAGCombine] Support splat_vector nodes in (and (extload)) dagcombine 2022-05-16 11:25:20 +00:00
sve-fold-vscale.ll
sve-forward-st-to-ld.ll
sve-fp-combine.ll [AArch64][SVE] Add patterns to select masked FP arith 2022-08-08 08:44:13 +00:00
sve-fp-immediates-merging.ll [SVE] Add isel patterns that match "FpImm - A" to the immediate form of FSUBR. 2022-06-22 00:11:24 +01:00
sve-fp-reciprocal.ll [AArch64][SVE] Invert VSelect operand order and condition for predicated arithmetic operations 2022-02-17 16:01:17 +00:00
sve-fp-reduce.ll [AArch64] Add f16 fpimm patterns 2022-07-25 09:08:10 +01:00
sve-fp-rounding.ll
sve-fp-vselect.ll
sve-fp.ll [SVE] Update patterns to commute FMLS multiplication operands 2022-03-01 12:53:14 -08:00
sve-fpext-load.ll
sve-fptosi-sat.ll [SVE] Expand DUPM patterns to handle all integer vector types. 2022-08-05 16:00:08 +00:00
sve-fptoui-sat.ll [SVE] Expand DUPM patterns to handle all integer vector types. 2022-08-05 16:00:08 +00:00
sve-fptrunc-store.ll
sve-gather-scatter-addr-opts.ll [DAG] Move one-use add of splat to base of scatter/gather 2022-09-22 18:45:12 -07:00
sve-gather-scatter-dag-combine.ll [AArch64][SVE] Expand gather index to 32 bits instead of 64 bits 2022-09-28 14:42:12 +00:00
sve-gep.ll recommit "[DAGCombiner] Teach scalarizeBinOpOfSplats handle scalable splat." 2022-07-21 17:34:34 +08:00
sve-implicit-zero-filling.ll
sve-insert-element.ll [CodeGen] Using ZExt for extractelement indices. 2022-10-15 15:45:35 -07:00
sve-insert-vector-to-predicate-load.ll [IR] Move vector.insert/vector.extract out of experimental namespace 2022-06-27 10:48:45 +00:00
sve-insert-vector.ll [AArch64] NFC: Fix name mangling in sve-insert-vector.ll 2022-07-06 15:57:11 +00:00
sve-insr.ll
sve-int-arith-imm.ll [SVE] Expand DUPM patterns to handle all integer vector types. 2022-08-05 16:00:08 +00:00
sve-int-arith-pred.ll
sve-int-arith.ll
sve-int-div-pred.ll
sve-int-imm.ll
sve-int-log-imm.ll
sve-int-log-pred.ll
sve-int-log.ll [AArch64] Add support for various operations on nxv1i1 types. 2022-07-06 15:57:11 +00:00
sve-int-mad-pred.ll
sve-int-mul-pred.ll
sve-int-mulh-pred.ll
sve-int-pred-reduce.ll [AArch64][SVE] Use more flag-setting instructions 2022-10-25 09:02:21 +00:00
sve-int-reduce-pred.ll
sve-int-reduce.ll [SelectionDAG] Enable WidenVecOp_VECREDUCE for scalable vector 2022-06-24 02:32:53 +00:00
sve-intrinsics-adr.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve-intrinsics-bfloat.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve-intrinsics-contiguous-prefetches.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve-intrinsics-conversion.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve-intrinsics-counting-bits.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve-intrinsics-counting-elems-i32.ll
sve-intrinsics-counting-elems.ll [AArch64] Remove references to Streaming SVE from target features. 2022-05-31 16:25:01 +02:00
sve-intrinsics-dup-x.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve-intrinsics-ff-gather-loads-32bit-scaled-offsets.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve-intrinsics-ff-gather-loads-32bit-unscaled-offsets.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve-intrinsics-ff-gather-loads-64bit-scaled-offset.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve-intrinsics-ff-gather-loads-64bit-unscaled-offset.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve-intrinsics-ff-gather-loads-vector-base-imm-offset.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve-intrinsics-ff-gather-loads-vector-base-scalar-offset.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve-intrinsics-ffr-manipulation.ll
sve-intrinsics-fp-arith-imm.ll
sve-intrinsics-fp-arith-merging.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve-intrinsics-fp-arith.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve-intrinsics-fp-compares.ll
sve-intrinsics-fp-converts.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve-intrinsics-fp-reduce.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve-intrinsics-gather-loads-32bit-scaled-offsets.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve-intrinsics-gather-loads-32bit-unscaled-offsets.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve-intrinsics-gather-loads-64bit-scaled-offset.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve-intrinsics-gather-loads-64bit-unscaled-offset.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve-intrinsics-gather-loads-vector-base-imm-offset.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve-intrinsics-gather-loads-vector-base-scalar-offset.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve-intrinsics-gather-prefetches-scalar-base-vector-indexes.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve-intrinsics-gather-prefetches-vect-base-imm-offset.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve-intrinsics-gather-prefetches-vect-base-invalid-imm-offset.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve-intrinsics-index.ll Revert "[SDAG] Allow scalable vectors in ComputeKnownBits" 2022-11-18 15:29:14 -08:00
sve-intrinsics-int-arith-imm.ll [SVE] Expand DUPM patterns to handle all integer vector types. 2022-08-05 16:00:08 +00:00
sve-intrinsics-int-arith-merging.ll [AArch64][SVE] Support logical operation BIC with DestructiveBinary patterns 2022-11-11 09:15:50 +08:00
sve-intrinsics-int-arith-merging.mir [AArch64][SVE] Support logical operation BIC with DestructiveBinary patterns 2022-11-11 09:15:50 +08:00
sve-intrinsics-int-arith.ll [AArch64]Remove svget/svset/svcreate from llvm 2022-09-23 10:48:43 +01:00
sve-intrinsics-int-compares-with-imm.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve-intrinsics-int-compares.ll [AArc64] Legalisation of compares and truncates of nxv1i1 types. 2022-07-07 07:39:27 +00:00
sve-intrinsics-ld1-addressing-mode-reg-imm.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve-intrinsics-ld1-addressing-mode-reg-reg.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve-intrinsics-ld1.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve-intrinsics-ld1ro-addressing-mode-reg-imm.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve-intrinsics-ld1ro-addressing-mode-reg-reg.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve-intrinsics-ld1ro.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve-intrinsics-ldN-sret-reg+imm-addr-mode.ll [SVE] Extend getMemVTFromNode to cover the sret variants of sve.ld2/3/4. 2022-11-08 18:41:15 +00:00
sve-intrinsics-ldN-sret-reg+reg-addr-mode.ll [AArch64]Change printVectorList to print SVE vector range 2022-10-14 18:59:56 +01:00
sve-intrinsics-ldst-ext.ll [AArch64][SelectionDAG] Refactor to support more scalable vector extending loads 2022-03-27 21:18:01 +08:00
sve-intrinsics-loads-ff.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve-intrinsics-loads-nf.ll
sve-intrinsics-loads.ll [LLVM][AArch64] Replace aarch64.sve.ld by aarch64.sve.ldN.sret 2022-09-20 13:15:07 +01:00
sve-intrinsics-logical-imm.ll [SVE] Expand DUPM patterns to handle all integer vector types. 2022-08-05 16:00:08 +00:00
sve-intrinsics-logical.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve-intrinsics-mask-ldst-ext.ll [AArch64][SelectionDAG] Refactor to support more scalable vector extending loads 2022-03-27 21:18:01 +08:00
sve-intrinsics-matmul-fp32.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve-intrinsics-matmul-fp64.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve-intrinsics-matmul-int8.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve-intrinsics-perm-select-matmul-fp64.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve-intrinsics-perm-select.ll Revert "[SDAG] Allow scalable vectors in ComputeKnownBits" 2022-11-18 15:29:14 -08:00
sve-intrinsics-pred-creation.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve-intrinsics-pred-operations.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve-intrinsics-pred-testing.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve-intrinsics-reinterpret-no-streaming.ll [SVE] Optimize new cases for lowerConvertToSVBool 2022-05-09 10:17:57 +00:00
sve-intrinsics-reinterpret.ll [AArch64] Add support for various operations on nxv1i1 types. 2022-07-06 15:57:11 +00:00
sve-intrinsics-reversal.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve-intrinsics-scalar-to-vec.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve-intrinsics-scatter-stores-32bit-scaled-offsets.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve-intrinsics-scatter-stores-32bit-unscaled-offsets.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve-intrinsics-scatter-stores-64bit-scaled-offset.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve-intrinsics-scatter-stores-64bit-unscaled-offset.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve-intrinsics-scatter-stores-vector-base-imm-offset.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve-intrinsics-scatter-stores-vector-base-scalar-offset.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve-intrinsics-sel.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve-intrinsics-shifts-merging.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve-intrinsics-shifts.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve-intrinsics-sqdec.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve-intrinsics-sqinc.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve-intrinsics-st1-addressing-mode-reg-imm.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve-intrinsics-st1-addressing-mode-reg-reg.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve-intrinsics-st1.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve-intrinsics-stN-reg-imm-addr-mode.ll [AArch64]Change printVectorList to print SVE vector range 2022-10-14 18:59:56 +01:00
sve-intrinsics-stN-reg-reg-addr-mode.ll [AArch64]Change printVectorList to print SVE vector range 2022-10-14 18:59:56 +01:00
sve-intrinsics-stores.ll [AArch64]Change printVectorList to print SVE vector range 2022-10-14 18:59:56 +01:00
sve-intrinsics-unpred-form.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve-intrinsics-uqdec.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve-intrinsics-uqinc.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve-intrinsics-while.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve-ld-post-inc.ll
sve-ld1-addressing-mode-reg-imm.ll
sve-ld1-addressing-mode-reg-reg.ll
sve-ld1r.ll [AArch64][SVE] Add DAG-Combine to push bitcasts from floating point loads after DUPLANE128 2022-07-21 11:00:10 +00:00
sve-ld1r.mir
sve-ldN.mir [AArch64]Change printVectorList to print SVE vector range 2022-10-14 18:59:56 +01:00
sve-ldnf1.mir [AArch64] Async unwind - function epilogues 2022-04-12 16:50:50 +01:00
sve-ldstnt1.mir [AArch64] Async unwind - function epilogues 2022-04-12 16:50:50 +01:00
sve-load-compare-store.ll [DAG] Allow folding AND of anyext masked_load with >1 user to zext version 2022-11-18 10:38:09 +00:00
sve-localstackalloc.mir
sve-lsr-scaled-index-addressing-mode.ll
sve-masked-gather-32b-signed-scaled.ll
sve-masked-gather-32b-signed-unscaled.ll
sve-masked-gather-32b-unsigned-scaled.ll
sve-masked-gather-32b-unsigned-unscaled.ll
sve-masked-gather-64b-scaled.ll
sve-masked-gather-64b-unscaled.ll
sve-masked-gather-legalize.ll [SDAG] Allow scalable vectors in ComputeNumSignBits (try 2) 2022-11-29 08:25:05 -08:00
sve-masked-gather-vec-plus-imm.ll
sve-masked-gather-vec-plus-reg.ll
sve-masked-gather.ll [SVE] Add support for non-element-type sized scaling when lowering MGATHER/MSCATTER. 2022-04-14 11:54:46 +01:00
sve-masked-int-arith.ll [AArch64][SVE] Add patterns to select mla/mls 2022-07-26 07:52:44 +00:00
sve-masked-ldst-nonext.ll
sve-masked-ldst-sext.ll [AArch64] Regenerate 3 codegen test files. NFC 2022-06-16 18:23:05 +01:00
sve-masked-ldst-trunc.ll
sve-masked-ldst-zext.ll [AArch64][InstCombine] Fold MLOAD and zero extensions into MLOAD 2022-04-06 20:50:42 +08:00
sve-masked-scatter-32b-scaled.ll
sve-masked-scatter-32b-unscaled.ll
sve-masked-scatter-64b-scaled.ll
sve-masked-scatter-64b-unscaled.ll
sve-masked-scatter-legalize.ll
sve-masked-scatter-vec-plus-imm.ll
sve-masked-scatter-vec-plus-reg.ll
sve-masked-scatter.ll [SVE] Add support for non-element-type sized scaling when lowering MGATHER/MSCATTER. 2022-04-14 11:54:46 +01:00
sve-merging-stores.ll [LLVM][AArch64] Replace aarch64.sve.ld by aarch64.sve.ldN.sret 2022-09-20 13:15:07 +01:00
sve-min-max-pred.ll AArch64 SVE 2022-08-24 11:09:22 +00:00
sve-no-typesize-warnings.ll [IR] Move vector.insert/vector.extract out of experimental namespace 2022-06-27 10:48:45 +00:00
sve-pfalse-machine-cse.mir
sve-pred-arith.ll [AArch64] Async unwind - function epilogues 2022-04-12 16:50:50 +01:00
sve-pred-contiguous-ldst-addressing-mode-reg-imm.ll
sve-pred-contiguous-ldst-addressing-mode-reg-reg.ll
sve-pred-log.ll
sve-pred-non-temporal-ldst-addressing-mode-reg-imm.ll
sve-pred-non-temporal-ldst-addressing-mode-reg-reg.ll
sve-pseudos-expand-undef.mir
sve-ptest-removal-brk.ll [AArch64][SVE] Use more flag-setting instructions 2022-10-25 09:02:21 +00:00
sve-ptest-removal-cmpeq.ll [AArch64][SVE] Add PTEST_ANY pseudo instruction 2022-11-15 15:46:28 +00:00
sve-ptest-removal-cmpeq.mir [AArch64][SVE] Fix bad PTEST(PTRUE_ALL, PTEST_LIKE) optimization 2022-11-15 12:43:21 +00:00
sve-ptest-removal-cmpge.ll [AArch64][SVE] Add PTEST_ANY pseudo instruction 2022-11-15 15:46:28 +00:00
sve-ptest-removal-cmpgt.ll [AArch64][SVE] Add PTEST_ANY pseudo instruction 2022-11-15 15:46:28 +00:00
sve-ptest-removal-cmphi.ll [AArch64][SVE] Add PTEST_ANY pseudo instruction 2022-11-15 15:46:28 +00:00
sve-ptest-removal-cmphs.ll [AArch64][SVE] Add PTEST_ANY pseudo instruction 2022-11-15 15:46:28 +00:00
sve-ptest-removal-cmple.ll [AArch64][SVE] Ensure redundant PTEST are removed with an 'invalid' PTRUE 2022-11-17 15:42:17 +00:00
sve-ptest-removal-cmplo.ll [AArch64][SVE] Add PTEST_ANY pseudo instruction 2022-11-15 15:46:28 +00:00
sve-ptest-removal-cmpls.ll [AArch64][SVE] Add PTEST_ANY pseudo instruction 2022-11-15 15:46:28 +00:00
sve-ptest-removal-cmplt.ll [AArch64][SVE] Add PTEST_ANY pseudo instruction 2022-11-15 15:46:28 +00:00
sve-ptest-removal-cmpne.ll [AArch64][SVE] Add PTEST_ANY pseudo instruction 2022-11-15 15:46:28 +00:00
sve-ptest-removal-log.ll [AArch64][SVE] Use more flag-setting instructions 2022-10-25 09:02:21 +00:00
sve-ptest-removal-match.ll [AArch64][SVE] Add PTEST_ANY pseudo instruction 2022-11-15 15:46:28 +00:00
sve-ptest-removal-pfirst-pnext.ll [AArch64][SVE] Add PTEST_ANY pseudo instruction 2022-11-15 15:46:28 +00:00
sve-ptest-removal-ptrue.ll [AArch64][SVE] Use more flag-setting instructions 2022-10-25 09:02:21 +00:00
sve-ptest-removal-rdffr.mir
sve-ptest-removal-sink.ll [AArch64][SVE] Sink ptrue into loop if it is used by PTEST. 2022-07-26 15:07:41 +01:00
sve-ptest-removal-whilege.mir [AArch64] Fix subtarget features for tests. NFC 2022-07-12 11:03:40 +01:00
sve-ptest-removal-whilegt.mir [AArch64][SVE] Fix bad PTEST(X, X) optimization 2022-11-15 11:59:07 +00:00
sve-ptest-removal-whilehi.mir [AArch64] Fix subtarget features for tests. NFC 2022-07-12 11:03:40 +01:00
sve-ptest-removal-whilehs.mir [AArch64] Fix subtarget features for tests. NFC 2022-07-12 11:03:40 +01:00
sve-ptest-removal-whilele.mir
sve-ptest-removal-whilelo.mir
sve-ptest-removal-whilels.mir
sve-ptest-removal-whilelt.mir
sve-ptest-removal-whilerw.mir [AArch64] Fix subtarget features for tests. NFC 2022-07-12 11:03:40 +01:00
sve-ptest-removal-whilewr.mir [AArch64] Fix subtarget features for tests. NFC 2022-07-12 11:03:40 +01:00
sve-ptest.ll [AArch64][SVE] Consider more intrinsics in 'isZeroingInactiveLanes'. 2022-07-26 15:07:41 +01:00
sve-punpklo-combine.ll [IR] Move vector.insert/vector.extract out of experimental namespace 2022-06-27 10:48:45 +00:00
sve-redundant-store.ll
sve-rev.ll
sve-sdiv-pow2.ll
sve-select.ll [AArch64] Make nxv1i1 types a legal type for SVE. 2022-07-01 15:11:13 +00:00
sve-setcc.ll [AArch64][SVE] Add PTEST_ANY pseudo instruction 2022-11-15 15:46:28 +00:00
sve-sext-zext.ll [LegalizeDAG] Fix TypeSize conversion error when expanding SIGN_EXTEND_INREG 2022-04-30 19:21:48 +01:00
sve-smulo-sdnode.ll [SDAG] Allow scalable vectors in ComputeNumSignBits (try 2) 2022-11-29 08:25:05 -08:00
sve-split-extract-elt.ll [CodeGen] Using ZExt for extractelement indices. 2022-10-15 15:45:35 -07:00
sve-split-fcvt.ll
sve-split-fp-reduce.ll
sve-split-insert-elt.ll [AArch64] Async unwind - function prologues 2022-03-24 16:16:44 +00:00
sve-split-int-pred-reduce.ll [AArch64][SVE] Use more flag-setting instructions 2022-10-25 09:02:21 +00:00
sve-split-int-reduce.ll
sve-split-load.ll
sve-split-store.ll
sve-split-trunc.ll
sve-srem-combine-loop.ll
sve-st1-addressing-mode-reg-imm.ll
sve-st1-addressing-mode-reg-reg.ll
sve-stN.mir [AArch64]Change printVectorList to print SVE vector range 2022-10-14 18:59:56 +01:00
sve-stepvector.ll [SelectionDAG] Add support to widen ISD::STEP_VECTOR operations. 2022-05-24 22:42:37 +01:00
sve-streaming-mode-fixed-length-and-combine.ll [AArch64][SVE][NFC] Add streaming mode SVE tests 2022-11-10 13:51:09 +00:00
sve-streaming-mode-fixed-length-bit-counting.ll [AArch64][SME]: Generate streaming-compatible code for bit counting/select 2022-11-29 12:24:21 +00:00
sve-streaming-mode-fixed-length-bitcast.ll [AArch64][SVE][NFC] Add streaming mode SVE tests 2022-11-10 13:51:09 +00:00
sve-streaming-mode-fixed-length-bitselect.ll [AArch64][SME]: Generate streaming-compatible code for bit counting/select 2022-11-29 12:24:21 +00:00
sve-streaming-mode-fixed-length-build-vector.ll [AArch64-SVE]: Force generating code compatible to streaming mode. 2022-10-31 11:01:56 +00:00
sve-streaming-mode-fixed-length-concat.ll [AArch64-SVE]: Force generating code compatible to streaming mode. 2022-10-31 11:01:56 +00:00
sve-streaming-mode-fixed-length-ext-loads.ll [AArch64-SVE][streaming-mode]: Add tests for masked/truncating/extending load/store. 2022-11-10 10:12:28 +00:00
sve-streaming-mode-fixed-length-extract-subvector.ll [AArch64] Lower fixed-length vector_shuffle to SVE splat if possible 2022-11-16 11:47:27 +00:00
sve-streaming-mode-fixed-length-extract-vector-elt.ll [AArch64-SVE]: Force generating code compatible to streaming mode. 2022-10-31 11:01:56 +00:00
sve-streaming-mode-fixed-length-fcopysign.ll [AArch64][SME][NFC]: Enable lowering truncate for enhancement. 2022-12-01 03:54:28 +00:00
sve-streaming-mode-fixed-length-fp-arith.ll [AArch64][SME]: Generate streaming-compatible code for fp_arith and fp-fma 2022-11-22 18:00:24 +00:00
sve-streaming-mode-fixed-length-fp-compares.ll [AArch64][SME]: Generate streaming-compatible code for fp-compares. 2022-11-28 11:21:40 +00:00
sve-streaming-mode-fixed-length-fp-convert.ll [AArch64][SME]: Generate streaming-compatible code for fp_to_int and int_to_fp. 2022-11-21 18:12:58 +00:00
sve-streaming-mode-fixed-length-fp-extend-trunc.ll [AArch64][SME]: Generate streaming-compatible code for fp-extend-trunc 2022-11-29 12:45:53 +00:00
sve-streaming-mode-fixed-length-fp-fma.ll [AArch64][SME]: Generate streaming-compatible code for fp_arith and fp-fma 2022-11-22 18:00:24 +00:00
sve-streaming-mode-fixed-length-fp-minmax.ll [AArch64][SME]: Generate streaming-compatible code for int-minmax, fp-minmax 2022-11-23 15:49:16 +00:00
sve-streaming-mode-fixed-length-fp-reduce.ll [AArch64][SME]: Generate streaming-compatible code for int-reduce, fp-reduce 2022-11-24 17:11:24 +00:00
sve-streaming-mode-fixed-length-fp-rounding.ll [AArch64][SME]: Generate streaming-compatible code for FP rounding operations. 2022-11-24 17:45:17 +00:00
sve-streaming-mode-fixed-length-fp-select.ll [AArch64][SME]: Add precursory tests for D138519 2022-11-24 18:19:13 +00:00
sve-streaming-mode-fixed-length-fp-to-int.ll [AArch64][SME][NFC]: Enable lowering truncate for enhancement. 2022-12-01 03:54:28 +00:00
sve-streaming-mode-fixed-length-fp-vselect.ll [AArch64][SME]: Generate streaming-compatible code for int/fp select/vselect 2022-11-24 18:19:13 +00:00
sve-streaming-mode-fixed-length-insert-vector-elt.ll [AArch64][SME]: Generate streaming-compatible code for ISD::INSERT_VECTOR_ELT. 2022-11-18 12:20:16 +00:00
sve-streaming-mode-fixed-length-int-arith.ll [AArch64-SVE]: Force generating code compatible to streaming mode. 2022-11-10 12:38:26 +00:00
sve-streaming-mode-fixed-length-int-compares.ll [AArch64][SME]: Add streaming-compatible testing files. 2022-12-01 01:37:36 +00:00
sve-streaming-mode-fixed-length-int-div.ll [AArch64][SME][NFC]: Enable lowering truncate for enhancement. 2022-12-01 03:54:28 +00:00
sve-streaming-mode-fixed-length-int-extends.ll [AArch64][SVE][NFC] Add streaming mode SVE tests 2022-11-10 13:51:09 +00:00
sve-streaming-mode-fixed-length-int-immediates.ll [AArch64][SME]: Add streaming-compatible testing files. 2022-12-01 01:37:36 +00:00
sve-streaming-mode-fixed-length-int-log.ll [AArch64-SVE]: Force generating code compatible to streaming mode. 2022-11-10 12:38:26 +00:00
sve-streaming-mode-fixed-length-int-minmax.ll [AArch64][SME]: Generate streaming-compatible code for int-minmax, fp-minmax 2022-11-23 15:49:16 +00:00
sve-streaming-mode-fixed-length-int-mulh.ll [AArch64][SME][NFC]: Enable lowering truncate for enhancement. 2022-12-01 03:54:28 +00:00
sve-streaming-mode-fixed-length-int-reduce.ll [AArch64][SME]: Generate streaming-compatible code for int-reduce, fp-reduce 2022-11-24 17:11:24 +00:00
sve-streaming-mode-fixed-length-int-rem.ll [AArch64][SME][NFC]: Enable lowering truncate for enhancement. 2022-12-01 03:54:28 +00:00
sve-streaming-mode-fixed-length-int-select.ll [AArch64][SME]: Add precursory tests for D138519 2022-11-24 18:19:13 +00:00
sve-streaming-mode-fixed-length-int-shifts.ll [AArch64-SVE]: Force generating code compatible to streaming mode. 2022-10-31 11:01:56 +00:00
sve-streaming-mode-fixed-length-int-to-fp.ll [AArch64][SME][NFC]: Enable lowering truncate for enhancement. 2022-12-01 03:54:28 +00:00
sve-streaming-mode-fixed-length-int-vselect.ll [AArch64][SME]: Generate streaming-compatible code for int/fp select/vselect 2022-11-24 18:19:13 +00:00
sve-streaming-mode-fixed-length-ld2-alloca.ll Reland "[AArch64][SME]: Generate streaming-compatible code for ld2-alloca." 2022-12-01 14:48:30 +00:00
sve-streaming-mode-fixed-length-limit-duplane.ll [AArch64][SME]: Add streaming-compatible testing files. 2022-12-01 01:15:44 +00:00
sve-streaming-mode-fixed-length-loads.ll [AArch64-SVE]: Force generating code compatible to streaming mode. 2022-10-31 11:01:56 +00:00
sve-streaming-mode-fixed-length-log-reduce.ll [AArch64][SME]: Add streaming-compatible testing files. 2022-12-01 01:37:36 +00:00
sve-streaming-mode-fixed-length-masked-load.ll [AArch64-SVE][streaming-mode]: Add tests for masked/truncating/extending load/store. 2022-11-10 10:12:28 +00:00
sve-streaming-mode-fixed-length-masked-store.ll [AArch64-SVE][streaming-mode]: Add tests for masked/truncating/extending load/store. 2022-11-10 10:12:28 +00:00
sve-streaming-mode-fixed-length-optimize-ptrue.ll [AArch64][SME]: Add streaming-compatible testing files. 2022-12-01 01:15:44 +00:00
sve-streaming-mode-fixed-length-permute-rev.ll [AArch64][SME]: Add streaming-compatible testing files. 2022-12-01 00:52:08 +00:00
sve-streaming-mode-fixed-length-permute-zip-uzp-trn.ll [AArch64][SME]: Add streaming-compatible testing files. 2022-12-01 00:52:08 +00:00
sve-streaming-mode-fixed-length-ptest.ll [AArch64][SME][NFC]: Enable lowering truncate for enhancement. 2022-12-01 03:54:28 +00:00
sve-streaming-mode-fixed-length-reshuffle.ll [AArch64][SVE][NFC] Add streaming mode SVE tests 2022-11-10 13:51:09 +00:00
sve-streaming-mode-fixed-length-rev.ll [TargetLowering][RISCV][ARM][AArch64][Mips] Reduce the number of AND mask constants used by BSWAP expansion. 2022-11-15 14:36:01 -08:00
sve-streaming-mode-fixed-length-sdiv-pow2.ll [AArch64][SVE][NFC] Add streaming mode SVE tests 2022-11-10 13:51:09 +00:00
sve-streaming-mode-fixed-length-shuffle.ll [AArch64] Lower fixed-length vector_shuffle to SVE splat if possible 2022-11-16 11:47:27 +00:00
sve-streaming-mode-fixed-length-splat-vector.ll [AArch64][SVE][NFC] Add streaming mode SVE tests 2022-11-10 13:51:09 +00:00
sve-streaming-mode-fixed-length-stores.ll [AArch64-SVE]: Force generating code compatible to streaming mode. 2022-10-31 11:01:56 +00:00
sve-streaming-mode-fixed-length-subvector.ll [AArch64][SME]: Add streaming-compatible testing files. 2022-12-01 00:52:08 +00:00
sve-streaming-mode-fixed-length-trunc-stores.ll [AArch64][SME][NFC]: Enable lowering truncate for enhancement. 2022-12-01 03:54:28 +00:00
sve-streaming-mode-fixed-length-trunc.ll [AArch64][SME][NFC]: Enable lowering truncate for enhancement. 2022-12-01 03:54:28 +00:00
sve-streaming-mode-fixed-length-vector-shuffle.ll [AArch64][SME]: Add streaming-compatible testing files. 2022-12-01 00:52:08 +00:00
sve-streaming-mode-test-register-mov.ll [AArch64][SME]: Use SVE mov instruction for FPR128 registers in streaming-compatible mode. 2022-11-18 11:18:30 +00:00
sve-tailcall.ll
sve-trunc.ll [AArc64] Legalisation of compares and truncates of nxv1i1 types. 2022-07-07 07:39:27 +00:00
sve-umulo-sdnode.ll Revert "[SDAG] Allow scalable vectors in ComputeKnownBits" 2022-11-18 15:29:14 -08:00
sve-unary-movprfx.ll
sve-uunpklo-load-uzp1-store-combine.ll [AArch64][SVE] Fold target specific ext/trunc nodes into loads/stores 2022-07-25 15:24:05 +00:00
sve-varargs-callee-broken.ll
sve-varargs-caller-broken.ll
sve-varargs.ll [AArch64] Async unwind - function epilogues 2022-04-12 16:50:50 +01:00
sve-vecreduce-fold.ll [AArch64][SVE] Use more flag-setting instructions 2022-10-25 09:02:21 +00:00
sve-vector-splat.ll [SVE] Expand DUPM patterns to handle all integer vector types. 2022-08-05 16:00:08 +00:00
sve-vl-arith.ll
sve-vscale-attr.ll [SchedModels][CortexA55] Add ASIMD integer instructions 2022-02-17 13:41:57 +03:00
sve-vscale-combine.ll [DAGCombiner] Add use check for VSCALE in visitSUB. 2022-08-19 09:46:18 +08:00
sve-vscale.ll
sve-vselect-fold.ll
sve-vselect-imm.ll [SVE] Fix SVEDup0 matching -0.0f 2022-08-30 11:07:17 -07:00
sve-widen-scalable-vectortype.ll
sve-zeroinit.ll [AArch64] Make nxv1i1 types a legal type for SVE. 2022-07-01 15:11:13 +00:00
sve2-bitwise-ternary.ll
sve2-fcopysign.ll [AArch64][SVE] Use SVE for VLS fcopysign for wide vectors 2022-08-10 10:17:19 +00:00
sve2-fixed-length-fcopysign.ll [AArch64][SVE] Use SVE for VLS fcopysign for wide vectors 2022-08-10 10:17:19 +00:00
sve2-int-addsub-long.ll
sve2-int-mul.ll [SVE] Expand DUPM patterns to handle all integer vector types. 2022-08-05 16:00:08 +00:00
sve2-int-mulh.ll
sve2-intrinsics-binary-narrowing-add-sub.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve2-intrinsics-binary-narrowing-shr.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve2-intrinsics-bit-permutation.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve2-intrinsics-character-match.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve2-intrinsics-complex-dot.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve2-intrinsics-contiguous-conflict-detection.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve2-intrinsics-crypto.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve2-intrinsics-fp-converts.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve2-intrinsics-fp-int-binary-logarithm.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve2-intrinsics-fp-widening-mul-acc.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve2-intrinsics-int-arith-imm.ll
sve2-intrinsics-int-mul-lane.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve2-intrinsics-non-widening-pairwise-arith.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve2-intrinsics-nt-gather-loads-32bit-unscaled-offset.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve2-intrinsics-nt-gather-loads-64bit-scaled-offset.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve2-intrinsics-nt-gather-loads-64bit-unscaled-offset.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve2-intrinsics-nt-gather-loads-vector-base-scalar-offset.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve2-intrinsics-nt-scatter-stores-32bit-unscaled-offset.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve2-intrinsics-nt-scatter-stores-64bit-scaled-offset.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve2-intrinsics-nt-scatter-stores-64bit-unscaled-offset.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve2-intrinsics-nt-scatter-stores-vector-base-scalar-offset.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve2-intrinsics-perm-tb.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve2-intrinsics-polynomial-arithmetic-128.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve2-intrinsics-polynomial-arithmetic.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve2-intrinsics-psel.ll [AArch64][SME] Add SVE2 psel, uclamp, sclamp and revd IR intrinsics 2022-06-28 10:25:06 +01:00
sve2-intrinsics-revd.ll [AArch64][SME] Add SVE2 psel, uclamp, sclamp and revd IR intrinsics 2022-06-28 10:25:06 +01:00
sve2-intrinsics-sclamp.ll [AArch64][SME] Add SVE2 psel, uclamp, sclamp and revd IR intrinsics 2022-06-28 10:25:06 +01:00
sve2-intrinsics-uclamp.ll [AArch64][SME] Add SVE2 psel, uclamp, sclamp and revd IR intrinsics 2022-06-28 10:25:06 +01:00
sve2-intrinsics-unary-narrowing.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve2-intrinsics-uniform-complex-arith.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve2-intrinsics-uniform-dsp-zeroing.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve2-intrinsics-uniform-dsp.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve2-intrinsics-vec-hist-count.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve2-intrinsics-while.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve2-intrinsics-widening-complex-int-arith.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve2-intrinsics-widening-dsp.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve2-intrinsics-widening-pairwise-arith.ll [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. 2022-06-27 00:07:00 +01:00
sve2-mla-indexed.ll
sve2-mla-unpredicated.ll
sve2-rsra.ll [AArch64][SVE] Match (add x (urshr/srshr y c)) -> ursra/srsra x y c 2022-06-29 12:10:50 +00:00
sve2-sra.ll [AArch64][SVE] Match (add x (lsr/asr y c)) -> usra/ssra x y c 2022-06-23 14:56:21 +00:00
sve2-unary-movprfx.ll
swap-compare-operands.ll
swift-async-pei.ll AArch64: correct epilogue/prologue emission for swift async 2022-03-09 18:41:10 +00:00
swift-async-reg.ll
swift-async-unwind.ll
swift-async-win.ll AArch64: modify Swift async frame record storage on Windows 2022-04-30 09:01:33 -07:00
swift-async.ll
swift-dynamic-async-frame.ll
swift-error.ll
swift-return.ll [AArch64] Add GPR rr instructions to isAssociativeAndCommutative 2022-11-27 12:53:10 +00:00
swiftcc.ll
swifterror.ll [DAGCombine] Add node in the worklist in topological order in CombineTo 2022-05-07 16:24:31 +00:00
swiftself-scavenger.ll
swiftself.ll Tail calls: look through AssertZExt to find register copy. 2022-04-11 12:24:47 +01:00
swifttail-arm64_32.ll
swifttail-async.ll
swifttail-call.ll [AArch64] Async unwind - Adjust unwind info in AArch64LoadStoreOptimizer 2022-04-18 12:09:44 +01:00
switch-unreachable-default.ll
tagged-globals-pic.ll [CodeGen] Remove unneeded regex escaping in FileCheck patterns. NFC. 2022-02-18 16:10:56 +00:00
tagged-globals-static.ll [CodeGen] Remove unneeded regex escaping in FileCheck patterns. NFC. 2022-02-18 16:10:56 +00:00
tagp.ll
tail-call-unused-zext.ll
tail-call.ll [AArch64] Async unwind - Adjust unwind info in AArch64LoadStoreOptimizer 2022-04-18 12:09:44 +01:00
tail-dup-redundant-phi.mir [SSAUpdaterImpl] Do not generate phi node with all the same incoming values 2022-06-03 12:24:33 +07:00
tailcall-bitcast-memcpy.ll
tailcall-ccmismatch.ll
tailcall-explicit-sret.ll
tailcall-fastisel.ll
tailcall-implicit-sret.ll
tailcall-mem-intrinsics.ll
tailcall-ssp-split-debug.ll Reapply: StackProtector: ignore debug insts when splitting blocks. 2022-02-14 10:58:22 +00:00
tailcall-string-rvo.ll
tailcall_misched_graph.ll
tailcc-notail.ll
tailcc-tail-call.ll [AArch64] Async unwind - function epilogues 2022-04-12 16:50:50 +01:00
taildup-cfi.ll
taildup-inst-dup-loc.mir [AArch64] Mark all instructions that read/write FPCR as doing so 2022-11-16 12:29:50 +00:00
tailmerging_in_mbp.ll
tbi.ll
tbl-loops.ll [AArch64][CodeGen]Fold the mov and lsl into ubfiz 2022-09-09 23:50:29 +08:00
tbz-tbnz.ll
tiny-model-pic.ll
tiny-model-static.ll
tiny_supported.ll
tme.ll
trunc-to-tbl.ll [AArch64] Compare BFI and ORR with left-shifted operand for OR instruction selection. 2022-11-03 12:32:08 -07:00
trunc-v1i64.ll
tst-br.ll
typepromotion-cost.ll [TypePromotionPass] Don't treat phi's as ToPromote 2022-09-13 08:57:15 +01:00
typepromotion-overflow.ll
typepromotion-phisret.ll [TypePromotion] Promote undef by converting to 0. 2022-05-12 09:09:24 -07:00
typepromotion-signed.ll
uadd_sat.ll
uadd_sat_plus.ll
uadd_sat_vec.ll [AArch64] Add `foldCSELOfCSEL` combine. 2022-08-19 01:04:29 +01:00
uaddo.ll
ubsantrap.ll
udivmodei5.ll [llvm/CodeGen] Enable the ExpandLargeDivRem pass for X86, Arm and AArch64 2022-09-06 15:32:04 +01:00
umulo-128-legalisation-lowering.ll Recommit [AArch64] Optimize memcmp when the result is tested for [in]equality with 0 2022-10-30 02:04:02 +08:00
unfold-masked-merge-scalar-constmask-innerouter.ll
unfold-masked-merge-scalar-constmask-interleavedbits.ll
unfold-masked-merge-scalar-constmask-interleavedbytehalves.ll
unfold-masked-merge-scalar-constmask-lowhigh.ll
unfold-masked-merge-scalar-variablemask.ll [DAG] visitXOR - fold XOR(A,B) -> OR(A,B) iff A and B have no common bits 2022-10-28 12:11:12 +01:00
unfold-masked-merge-vector-variablemask-const.ll [DAG] visitXOR - fold XOR(A,B) -> OR(A,B) iff A and B have no common bits 2022-10-28 12:11:12 +01:00
unfold-masked-merge-vector-variablemask.ll
unreachable-emergency-spill-slot.mir
unwind-preserved-from-mir.mir [AArch64] Async unwind - function prologues 2022-03-24 16:16:44 +00:00
unwind-preserved.ll [AArch64] Async unwind - function epilogues 2022-04-12 16:50:50 +01:00
urem-lkk.ll
urem-seteq-illegal-types.ll [SchedModels][CortexA55] Add ASIMD integer instructions 2022-02-17 13:41:57 +03:00
urem-seteq-nonzero.ll [AArch64] Lower multiplication by a constant int to madd 2022-10-07 19:33:47 +08:00
urem-seteq-optsize.ll
urem-seteq-vec-nonsplat.ll [SchedModels][CortexA55] Add ASIMD integer instructions 2022-02-17 13:41:57 +03:00
urem-seteq-vec-nonzero.ll [SchedModels][CortexA55] Add ASIMD integer instructions 2022-02-17 13:41:57 +03:00
urem-seteq-vec-splat.ll [SchedModels][CortexA55] Add ASIMD integer instructions 2022-02-17 13:41:57 +03:00
urem-seteq-vec-tautological.ll [SchedModels][CortexA55] Add ASIMD integer instructions 2022-02-17 13:41:57 +03:00
urem-seteq.ll [AArch64] Compare BFI and ORR with left-shifted operand for OR instruction selection. 2022-11-03 12:32:08 -07:00
urem-vector-lkk.ll
use-cr-result-of-dom-icmp-st.ll
ushl_sat.ll [DAG] Fold (srl (shl x, c1), c2) -> and(shl/srl(x, c3), m) 2022-06-20 08:37:38 +01:00
usub_sat.ll
usub_sat_plus.ll
usub_sat_vec.ll [AArch64] Add `foldCSELOfCSEL` combine. 2022-08-19 01:04:29 +01:00
v3f-to-int.ll
v8.4-atomic-128.ll
v8.5a-neon-frint3264-intrinsic.ll
v8.5a-scalar-frint3264-intrinsic.ll
vararg-tallcall.ll
variant-pcs.ll
vcvt-oversize.ll
vec-extract-branch.ll
vec-libcalls.ll
vec_cttz.ll [SchedModels][CortexA55] Add ASIMD integer instructions 2022-02-17 13:41:57 +03:00
vec_uaddo.ll [AArch64] Compare BFI and ORR with left-shifted operand for OR instruction selection. 2022-11-03 12:32:08 -07:00
vec_umulo.ll [AArch64] Compare BFI and ORR with left-shifted operand for OR instruction selection. 2022-11-03 12:32:08 -07:00
vecreduce-add-legalization.ll [AArch64] Replace `performANDSCombine` with `performFlagSettingCombine`. 2022-05-12 22:17:23 +01:00
vecreduce-add.ll [SchedModels][CortexA55] Add ASIMD integer instructions 2022-02-17 13:41:57 +03:00
vecreduce-and-legalization.ll [AArch64] Add GPR rr instructions to isAssociativeAndCommutative 2022-11-27 12:53:10 +00:00
vecreduce-bool.ll
vecreduce-fadd-legalization-strict.ll
vecreduce-fadd-legalization.ll [AArch64] Use simd mov to materialize big fp constants 2022-03-04 11:34:20 -05:00
vecreduce-fadd.ll [AArch64] Use first op of FADDPv* instead of implicit def. 2022-03-03 13:32:09 +00:00
vecreduce-fmax-legalization-nan.ll
vecreduce-fmax-legalization.ll [SchedModels][CortexA55] Add ASIMD integer instructions 2022-02-17 13:41:57 +03:00
vecreduce-fmin-legalization.ll [SchedModels][CortexA55] Add ASIMD integer instructions 2022-02-17 13:41:57 +03:00
vecreduce-fmul-legalization-strict.ll
vecreduce-propagate-sd-flags.ll [DAG] visitINSERT_VECTOR_ELT - attempt to reconstruct BUILD_VECTOR before other fold interfere 2022-06-13 11:48:18 +01:00
vecreduce-umax-legalization.ll [LegalizeTypes] Replace vecreduce_xor/or/and with vecreduce_add/umax/umin if not legal 2022-07-07 09:33:54 +00:00
vector-fcopysign.ll [SchedModels][CortexA55] Add ASIMD integer instructions 2022-02-17 13:41:57 +03:00
vector-fcvt.ll [DAGCombine] Combine signext_inreg of extract-extend 2022-08-15 10:58:07 +00:00
vector-gep.ll [AArch64] Regenerate more tests. NFC 2022-07-03 15:49:16 +01:00
vector-global-i1.ll [AsmPrinter] Fix bit pattern for i1 vectors. 2022-07-06 12:56:47 -07:00
vector-insert-shuffle-cycle.ll
vector-op-scalarize-strict.ll
vector-popcnt-128-ult-ugt.ll
vector_merge_dep_check.ll
vector_splat-const-shift-of-constmasked.ll
vldn_shuffle.ll [InterleaveAccessPass] Handle multi-use binop shuffles 2022-07-10 17:24:37 +01:00
volatile-combine.ll
vscale-and-sve-cnt-demandedbits.ll [TargetLowering][AArch64] Teach DemandedBits about SVE count intrinsics 2022-11-25 10:15:14 +00:00
vselect-constants.ll [SchedModels][CortexA55] Add ASIMD integer instructions 2022-02-17 13:41:57 +03:00
vselect-ext.ll [CGP,AArch64] Replace zexts with shuffle that can be lowered using tbl. 2022-09-15 19:18:13 +01:00
win-align-chkstk.ll Reapply [AArch64] Fix aligning the stack after calling __chkstk 2022-10-15 00:40:13 +03:00
win-alloca-no-stack-probe.ll
win-alloca.ll [ARM64EC 5/?] Fix names of __chkstk and __security_check_cookie. 2022-09-05 13:19:54 -07:00
win-catchpad-nested-cxx.ll
win-realign.ll Reapply [AArch64] Fix aligning the stack after calling __chkstk 2022-10-15 00:40:13 +03:00
win-tls.ll [CodeGen] Remove unneeded regex escaping in FileCheck patterns. NFC. 2022-02-18 16:10:56 +00:00
win64-jumptable.ll
win64-no-uwtable.ll
win64-nocfi.ll
win64_vararg.ll [AArch64] Use SUBXrx64 for dynamic stack to refer to sp 2022-07-20 11:46:10 +08:00
win64_vararg_float.ll [AArch64] Regenerate more tests. NFC 2022-07-03 15:49:16 +01:00
win64_vararg_float_cc.ll [AArch64] Regenerate more tests. NFC 2022-07-03 15:49:16 +01:00
win64cc-backup-x18.ll
win64cc-darwin-backup-x18.ll [AArch64] Treat x18 as callee-saved in functions with Windows calling convention on Darwin 2022-08-02 20:33:42 +03:00
win_cst_pool.ll [MC] Make MCAsmInfo::isAcceptableChar reflect MCAsmInfo::doesAllowAtInName 2022-03-29 14:01:32 -07:00
windows-SEH-support.ll
windows-extern-weak.ll
windows-trap.ll
wineh-align-stack.ll [AArch64] Exclude instructions after setting the FP from SEH prologues 2022-10-12 12:36:21 +03:00
wineh-bti.ll [AArch64] Add SEH_Nop opcodes for BTI hints 2022-10-11 14:32:01 +03:00
wineh-frame-predecrement.mir
wineh-frame-scavenge.mir
wineh-frame0.mir
wineh-frame1.mir [AArch64] Mark all instructions that read/write FPCR as doing so 2022-11-16 12:29:50 +00:00
wineh-frame2.mir [AArch64] Mark all instructions that read/write FPCR as doing so 2022-11-16 12:29:50 +00:00
wineh-frame3.mir
wineh-frame4.mir [AArch64] Mark all instructions that read/write FPCR as doing so 2022-11-16 12:29:50 +00:00
wineh-frame5.mir
wineh-frame6.mir [AArch64] Exclude instructions after setting the FP from SEH prologues 2022-10-12 12:36:21 +03:00
wineh-frame7.mir
wineh-frame8.mir
wineh-mingw.ll
wineh-pac.ll [AArch64] Generate SEH info for PAC instructions 2022-10-12 22:21:03 +03:00
wineh-save-lrpair1.mir
wineh-save-lrpair2.mir
wineh-save-lrpair3.mir
wineh-try-catch-cbz.ll
wineh-try-catch-nobase.ll
wineh-try-catch-realign.ll
wineh-try-catch-vla.ll
wineh-try-catch.ll [AArch64] Exclude instructions after setting the FP from SEH prologues 2022-10-12 12:36:21 +03:00
wineh-unwindhelp-via-fp.ll
wineh1.mir [MC] [Win64EH] Try writing an ARM64 "packed epilog" even if the epilog doesn't share opcodes with the prolog 2022-05-17 00:41:39 +03:00
wineh2.mir [AArch64] Mark all instructions that read/write FPCR as doing so 2022-11-16 12:29:50 +00:00
wineh3.mir [AArch64] Mark all instructions that read/write FPCR as doing so 2022-11-16 12:29:50 +00:00
wineh4.mir [AArch64] Mark all instructions that read/write FPCR as doing so 2022-11-16 12:29:50 +00:00
wineh5.mir [MC] [Win64EH] Check that ARM64 prologs and epilogs have the right matching number of instructions 2022-10-13 09:47:39 +03:00
wineh6.mir
wineh7.mir
wineh8.mir [AArch64] Mark all instructions that read/write FPCR as doing so 2022-11-16 12:29:50 +00:00
wineh9.mir [AArch64] Don't form paired loads from epilogue operations on Windows 2022-10-04 11:41:59 -07:00
wineh_shrinkwrap.mir
wrong-callee-save-size-after-livedebugvariables.mir [llvm-objdump] Add --no-print-imm-hex to tests depending on it. 2022-10-29 15:40:26 -07:00
wrong_debug_loc_after_regalloc.ll
xbfiz.ll
xor.ll
xray-attribute-instrumentation.ll
xray-omit-function-index.ll
xray-partial-instrumentation-skip-entry.ll
xray-partial-instrumentation-skip-exit.ll
xray-tail-call-sled.ll
zero-call-used-regs.ll [CodeGen] Don't zero callee-save registers with zero-call-used-regs (PR57692) 2022-09-16 11:52:29 +02:00
zero-reg.ll
zext-logic-shift-load.ll
zext-reg-coalesce.mir
zext-to-tbl.ll [AArch64] Add zext test with scalable vectors. 2022-11-22 16:55:08 +00:00

README

++ SVE CodeGen Warnings ++

When the WARN check lines fail in the SVE codegen tests it most likely means you
have introduced a warning due to:
1. Adding an invalid call to VectorType::getNumElements() or EVT::getVectorNumElements()
   when the type is a scalable vector.
2. Relying upon an implicit cast conversion from TypeSize to uint64_t.

For generic code, please modify your code to work with ElementCount and TypeSize directly.
For target-specific code that only deals with fixed-width vectors, use the fixed-size interfaces.
Please refer to the code where those functions live for more details.