forked from OSchip/llvm-project
118 lines
3.8 KiB
LLVM
118 lines
3.8 KiB
LLVM
; RUN: llc -O0 < %s | FileCheck %s --check-prefixes=CHECK,CHECK-UNOPT,DEFCM
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; RUN: llc -O1 < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPT,DEFCM
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; RUN: llc -O2 < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPT,DEFCM
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; RUN: llc -O3 < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPT,DEFCM
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; RUN: llc -O1 -code-model=large < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPT,LARGE
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target triple = "aarch64-unknown-linux-gnu"
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@foo = dso_local global i64 0, align 8
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@bar = dso_local global i64 0, align 8
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define i64 @multiple() !pcsections !0 {
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; CHECK-LABEL: multiple:
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; CHECK: .Lfunc_begin0:
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; CHECK: // %bb.0: // %entry
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; CHECK: .Lpcsection0:
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; CHECK-NEXT: ldr
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; CHECK-NEXT: ret
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; CHECK: .section section_no_aux,"awo",@progbits,.text
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; CHECK-NEXT: .Lpcsection_base0:
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; DEFCM-NEXT: .word .Lfunc_begin0-.Lpcsection_base0
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; LARGE-NEXT: .xword .Lfunc_begin0-.Lpcsection_base0
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; CHECK-NEXT: .word .Lfunc_end0-.Lfunc_begin0
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; CHECK-NEXT: .section section_aux_42,"awo",@progbits,.text
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; CHECK-NEXT: .Lpcsection_base1:
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; DEFCM-NEXT: .word .Lpcsection0-.Lpcsection_base1
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; LARGE-NEXT: .xword .Lpcsection0-.Lpcsection_base1
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; CHECK-NEXT: .word 42
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; CHECK-NEXT: .section section_aux_21264,"awo",@progbits,.text
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; CHECK-NEXT: .Lpcsection_base2:
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; DEFCM-NEXT: .word .Lpcsection0-.Lpcsection_base2
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; LARGE-NEXT: .xword .Lpcsection0-.Lpcsection_base2
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; CHECK-NEXT: .word 21264
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; CHECK-NEXT: .text
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entry:
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%0 = load i64, i64* @bar, align 8, !pcsections !1
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ret i64 %0
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}
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define i64 @test_simple_atomic() {
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; CHECK-LABEL: test_simple_atomic:
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; CHECK: .Lpcsection1:
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; CHECK-NEXT: ldr
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; CHECK-NOT: .Lpcsection2
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; CHECK: ldr
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; CHECK: add
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; CHECK-NEXT: ret
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; CHECK: .section section_no_aux,"awo",@progbits,.text
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; CHECK-NEXT: .Lpcsection_base3:
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; DEFCM-NEXT: .word .Lpcsection1-.Lpcsection_base3
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; LARGE-NEXT: .xword .Lpcsection1-.Lpcsection_base3
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; CHECK-NEXT: .text
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entry:
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%0 = load atomic i64, i64* @foo monotonic, align 8, !pcsections !0
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%1 = load i64, i64* @bar, align 8
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%add = add nsw i64 %1, %0
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ret i64 %add
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}
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define i64 @test_complex_atomic() {
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; CHECK-LABEL: test_complex_atomic:
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; ---
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; CHECK-OPT: .Lpcsection2:
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; CHECK-OPT-NEXT: ldxr
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; CHECK-OPT: .Lpcsection3:
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; CHECK-OPT-NEXT: add
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; CHECK-OPT: .Lpcsection4:
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; CHECK-OPT-NEXT: stxr
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; CHECK-OPT: .Lpcsection5:
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; CHECK-OPT-NEXT: cbnz
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; ---
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; CHECK-UNOPT: .Lpcsection2:
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; CHECK-UNOPT-NEXT: ldr
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; CHECK-UNOPT: .Lpcsection4:
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; CHECK-UNOPT-NEXT: add
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; CHECK-UNOPT: .Lpcsection5:
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; CHECK-UNOPT-NEXT: ldaxr
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; CHECK-UNOPT: .Lpcsection6:
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; CHECK-UNOPT-NEXT: cmp
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; CHECK-UNOPT: .Lpcsection8:
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; CHECK-UNOPT-NEXT: stlxr
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; CHECK-UNOPT: .Lpcsection9:
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; CHECK-UNOPT-NEXT: cbnz
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; CHECK-UNOPT: .Lpcsection13:
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; CHECK-UNOPT-NEXT: b
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; ---
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; CHECK-NOT: .Lpcsection
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; CHECK: ldr
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; CHECK: ret
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; CHECK: .section section_no_aux,"awo",@progbits,.text
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; CHECK-NEXT: .Lpcsection_base4:
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; DEFCM-NEXT: .word .Lpcsection2-.Lpcsection_base4
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; LARGE-NEXT: .xword .Lpcsection2-.Lpcsection_base4
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; CHECK-NEXT: .Lpcsection_base5:
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; DEFCM-NEXT: .word .Lpcsection3-.Lpcsection_base5
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; LARGE-NEXT: .xword .Lpcsection3-.Lpcsection_base5
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; CHECK-NEXT: .Lpcsection_base6:
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; DEFCM-NEXT: .word .Lpcsection4-.Lpcsection_base6
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; LARGE-NEXT: .xword .Lpcsection4-.Lpcsection_base6
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; CHECK-NEXT: .Lpcsection_base7:
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; DEFCM-NEXT: .word .Lpcsection5-.Lpcsection_base7
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; LARGE-NEXT: .xword .Lpcsection5-.Lpcsection_base7
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; CHECK-UNOPT: .word .Lpcsection13-.Lpcsection_base15
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; CHECK-NEXT: .text
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entry:
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%0 = atomicrmw add i64* @foo, i64 1 monotonic, align 8, !pcsections !0
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%1 = load i64, i64* @bar, align 8
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%inc = add nsw i64 %1, 1
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store i64 %inc, i64* @bar, align 8
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%add = add nsw i64 %1, %0
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ret i64 %add
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}
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!0 = !{!"section_no_aux"}
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!1 = !{!"section_aux_42", !2, !"section_aux_21264", !3}
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!2 = !{i32 42}
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!3 = !{i32 21264}
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