Commit Graph

  • aec418622c
    Merge 1b8a513fd6 into 798cf98a9f #175 wenhu1024 2025-04-17 18:05:04 +0800
  • 1b8a513fd6 [Ventus][fix] disable ventus cse pass, move wrong pat #175 wenhu1024 2025-04-17 18:03:10 +0800
  • 8ffa24e240 [Ventus][fix] Fix some errors in atomic builtin functions atomic-builtin Wang Qinfan 2025-01-20 13:15:53 +0800
  • c8e1c3d8cf [Ventus][fix] Add atomic builtin functions (init, load, store) Wang Qinfan 2025-01-16 14:01:55 +0800
  • f69aa543dd [VENTUS][feat] Add VentusAlwaysInlinePass #174 wenhu1024 2025-04-04 19:33:39 +0800
  • 8f2566cb90 [Ventus][fix] Fix constant instructions codegen #173 fix-constant Wang Qinfan 2025-01-16 15:52:44 +0800
  • 798cf98a9f
    Merge pull request #172 from wenhu1024/fix/branch main Jules Kong 2025-04-02 14:00:02 +0800
  • cebe3b1b46 [VENTUS][fix] disable BranchFolderPass, MachineBlockPlacement pass and remove checkJoinMBB from Insert-join-to-VBranch pass #172 wenhu1024 2025-04-01 11:19:59 +0800
  • d1091d9d8f [VENTUS][fix] fix libclc mulf #171 wenhu1024 2025-03-21 11:46:31 +0800
  • 1b098af2cc
    Merge pull request #170 from THU-DSP-LAB/fix-builtin wangqinfan 2025-03-14 15:33:26 +0800
  • 6f23d8d54a [VENTUS][NFC] Removed old implementations of some builtin functions #170 Jules-Kong 2025-03-13 17:32:54 +0800
  • f8c76c62ae
    Merge pull request #169 from wenhu1024/fix/libclc-math Jules Kong 2025-03-14 10:43:18 +0800
  • 641747e8dc [VENTUS][fix] Fix libclc math functions (fmax, fmin, pow, powr, rsqrt) to handle edge cases #169 wenhu1024 2025-03-13 11:12:16 +0800
  • 1409696b87
    Merge pull request #167 from wenhu1024/fix/regexti Jules Kong 2025-03-10 14:18:21 +0800
  • 01f22ac6cf [VENTUS][fix] Fix regexti instruction bug #167 wenhu1024 2025-03-10 11:30:11 +0800
  • a53e30754e
    Merge pull request #166 from THU-DSP-LAB/fix-about-divergence wangqinfan 2025-03-07 15:52:22 +0800
  • 9b1565821d [VENTUS][NFC] Remove invalid code about divergence #166 Jules-Kong 2025-03-06 14:42:06 +0800
  • 4f00fbf8de
    Merge pull request #164 from THU-DSP-LAB/fix-bugs wangqinfan 2025-02-12 18:16:34 +0800
  • 61eafc4714 [VENTUS][Printf] Add opencl printf pass #164 Jules-Kong 2024-12-09 12:25:57 +0800
  • bc96fd8563 [VENTUS][NFC] Add build options Jules-Kong 2024-12-08 13:25:28 +0800
  • c8e4d01ce3
    Merge pull request #162 from wenhu1024/feat/target-cpu ZiliangZhang 2025-02-11 09:47:28 +0800
  • ece1f84498 [ventus][NFC] Pick VentusRISCVABI or RISCVABI conditionally according to target CPU #162 wenhu1024 2025-01-25 16:37:01 +0800
  • 507524feaa
    Merge pull request #163 from wenhu1024/mod/env ZiliangZhang 2025-02-10 15:53:38 +0800
  • fb4ceb78b8 ci: specify ubuntu-22.04 for GitHub Actions runner #163 wenhu1024 2025-02-10 13:56:11 +0800
  • 248085fdbe
    Merge pull request #155 from wenhu1024/fix/readme support-fract ZhouJing(周晶) 2024-12-06 21:21:15 +0800
  • 380a6dcc57 [VENTUS][README] add `--init vectorAdd` to README linking example #155 wenhu1024 2024-12-06 12:25:00 +0800
  • ea97b09f8a
    Merge pull request #153 from THU-DSP-LAB/minor_fix_build_ventus_sh ZhouJing(周晶) 2024-11-18 21:48:34 +0800
  • 39a067c1b8 fix: update shebang in build-ventus.sh to ensure compatibility #153 mingyuan 2024-11-17 13:48:57 +0800
  • 6b6111168a [Ventus][Feature] Add csrr vector version add-metainfo Jules-Kong 2024-11-08 00:54:59 +0800
  • 5032490e31 [Ventus][Work-item] Optimize Work-item built-in functions Jules-Kong 2024-11-04 13:22:18 +0800
  • 0f31d6ca08
    Merge pull request #148 from xlinsist/prepare-setup Jules-Kong 2024-09-30 13:30:56 +0800
  • cc10cbb44c [VENTUS][README] Add pocl example and improve readability. #148 xlinsist 2024-09-30 01:04:47 +0000
  • 0a82f17b0c
    Merge pull request #146 from ziliangzl/double-operation ZhouJing(周晶) 2024-08-21 08:58:11 +0800
  • f89036bf68 [Ventus][fix] Fix flw/fsw related codegen test #146 ziliangzl 2024-08-20 10:57:06 +0800
  • 84b7c666eb [Ventus][fix] Fix flw/fsw instruction pattern ziliangzl 2024-08-20 09:59:25 +0800
  • 593cad12fc
    Merge pull request #144 from THU-DSP-LAB/update-workflow ZhouJing(周晶) 2024-08-16 08:54:35 +0800
  • 030ea4fc53 [ventus][NFC] Update workflow script #144 Jules-Kong 2024-08-15 19:53:06 +0800
  • 64ebe150c6
    Merge pull request #143 from THU-DSP-LAB/fix-something wangqinfan 2024-08-15 14:32:59 +0800
  • 058a3d891d [ventus][NFC] Replace the rodinia's code repository #143 fix-something Jules-Kong 2024-08-15 10:56:07 +0800
  • 4a6b4f5460 [VENTUS][NFC] 1k for each warp Jules-Kong 2024-06-20 11:04:38 +0800
  • 01a9dcb5b6 [VENTUS][NFC] Fix some unreasonable places Jules-Kong 2024-06-12 18:03:09 +0800
  • 6c682d4d14
    Merge pull request #142 from THU-DSP-LAB/fix_centos_dockerfile ZhouJing(周晶) 2024-08-14 15:40:31 +0800
  • 3e46bca67d [ventus][fix] Fix the dockerfile file of centos #142 Jules-Kong 2024-08-14 14:59:52 +0800
  • c9f7a7767b
    Merge pull request #141 from ziliangzl/double-operation ZhouJing(周晶) 2024-08-13 17:50:58 +0800
  • 8328c0d01d [Ventus][fix] Fix #140 complete double type support of smoothstep function #141 ziliangzl 2024-08-13 17:35:20 +0800
  • 18566fcdd2
    Merge pull request #139 from ziliangzl/double-operation ZhouJing(周晶) 2024-08-07 13:40:26 +0800
  • 2f528a1c7b
    Merge branch 'main' into double-operation #139 ZiliangZhang 2024-07-24 10:50:04 +0800
  • 5b1f7d5875 [VENTUS][fix]Fix double add and mul operation Passed test_geometrics in CTS. ziliangzl 2024-07-24 10:32:18 +0800
  • 2a667ac500 [VENTUS][feat] Add analyze convergent block pass vmv zhoujingya 2024-07-12 22:13:03 +0800
  • 51b7f8d11e
    Merge pull request #137 from summersurface/main Jules-Kong 2024-07-09 00:48:16 +0800
  • 5ebf18d031
    Add files via upload #137 马钿雨 2024-07-08 19:13:59 +0800
  • d704c61892
    Merge pull request #133 from ziliangzl/shuffle ZiliangZhang 2024-06-27 16:41:39 +0800
  • 09b59af05a [Ventus][fix]Fix libclc shuffle function Passed OPENCL-CTS shuffle_built_in testcase #133 ziliangzl 2024-06-27 16:25:24 +0800
  • ecddf383ed
    Merge pull request #132 from THU-DSP-LAB/add-some-configuration wangqinfan 2024-06-26 15:15:52 +0800
  • 3581f12d5e [VENTUS][Configuration] Add some configuration #132 Jules-Kong 2024-06-26 11:54:12 +0800
  • 5c5fdd8344 [Ventus][fix]Add LocalStackCapacity in .ventus.resource section The .ventus.resource section layout below: VGPRUsage // The number of VGPRS which has been used SGPRUsage // The number of SGPRS which has been used LocalStackCapacity = 0x400; // Capacity of stack for one wrap LocalMemoryUse // Used local memory size LocalSpill // Size of SGPR spill to local memory PrivateSpill // Size of VGPR spill to private memory terapines-dev ziliangzl 2024-06-26 11:11:24 +0800
  • 3b386c5945 Update python script release zhoujing 2024-06-26 09:21:27 +0800
  • 5e8ee80e2e Do not need hash zhoujingya 2024-06-25 23:34:50 +0800
  • 839f57d912 Run on release zhoujingya 2024-06-25 23:31:50 +0800
  • ffce58147a Add set-release-binary-outputs.sh script zhoujingya 2024-06-25 23:18:49 +0800
  • 7b963d9737 [VENTUS][release] Add release workflow #131 zhoujingya 2024-06-25 23:08:16 +0800
  • ddc7052d4a
    Merge pull request #130 from THU-DSP-LAB/memory zhoujingya 2024-06-25 16:46:33 +0800
  • aeee8ee171 [VENTUS][fix] Fix memory flags set in tablegen #129 In previous logic ,default memory access flag is 0b00, this will cause all no-local/no-private related instructions return true when fall into `RISCVInstrInfo::isUniformMemoryAccess` logic #130 zhoujingya 2024-06-24 23:01:47 +0800
  • d3b22c0d7f [Ventus][fix]Change kernel local arg address ziliangzl 2024-06-24 16:58:00 +0800
  • b35eefb5de [Ventus][fix]Add local memory usage in .ventus.reousrce section ziliangzl 2024-06-24 16:55:47 +0800
  • 86fac10608 Merge branch 'local-mem' into terapines-dev ziliangzl 2024-06-24 16:50:01 +0800
  • a320670f44
    Merge pull request #128 from THU-DSP-LAB/memory zhoujingya 2024-06-14 17:22:26 +0800
  • 625facb350 [VENTUS][fix] Add memory access flags in tablegen In this way, it is better to judge what memory scope is accessed by load/store instructions #128 zhoujing 2024-06-14 09:46:00 +0800
  • c955d0a29c
    Merge pull request #127 from ziliangzl/local-mem ZiliangZhang 2024-06-07 09:38:55 +0800
  • 0b03e6b411 [Ventus][fix]Fix missing vmv instruction for FrameReg in divergent path #127 ziliangzl 2024-06-06 16:16:57 +0800
  • 3fffdc5d16
    Merge pull request #115 from THU-DSP-LAB/workitem zhoujingya 2024-06-04 08:56:25 +0800
  • 492b35de44
    Merge pull request #126 from THU-DSP-LAB/readme zhoujingya 2024-06-03 16:48:18 +0800
  • 3abe6bd242 [NFC][readme] Modify some compiler flags #126 zhoujing 2024-06-03 16:47:28 +0800
  • bdfa4ec6af [VENTUS][fix] Add function sections for workitem functions #115 workitem zhoujing 2024-04-30 14:13:51 +0800
  • 7c78b29815
    Merge pull request #122 from THU-DSP-LAB/compress_instruction_disassemble zhoujingya 2024-05-30 14:38:50 +0800
  • 76ed2fc9e3
    Merge pull request #121 from ziliangzl/vmsle ZiliangZhang 2024-05-23 09:06:58 +0800
  • 11b55acb48 [VENTUS][fix]Fix missing regext instruction for vmsle instruction This bug caused PseudoVMSLT_VI node didn't insert regext. Now OPENCL-CTS relationals test passed. #121 ziliangzl 2024-05-21 17:09:48 +0800
  • 9d966660b6
    Merge pull request #116 from ziliangzl/inline-asm zhoujingya 2024-05-20 09:43:55 +0800
  • c168c442ce
    Merge pull request #118 from THU-DSP-LAB/checkInstr zhoujingya 2024-05-18 14:17:34 +0800
  • 60f388930d [VENTUS][fix]Assign initial value for VastartStoreFrameIndex VastartStoreFrameIndex havn't initial value, caused issue THU-DSP-LAB/llvm-project#117 #118 ziliangzl 2024-05-11 14:47:19 +0800
  • 451062314a
    Merge pull request #119 from ziliangzl/workgroup ziliangzl 2024-05-15 11:36:10 +0800
  • b465e58817 [VENTUS][fix] Add a switch to the C extension #122 qinfan 2024-05-14 17:26:24 +0800
  • 6a8e4d4667 [VENTUS][#119]Fix workgroup function barrier scope #119 ziliangzl 2024-05-14 14:03:20 +0800
  • d977b0bf8b [VENTUS][#119]Complete workgroup function implementation Implement work_group_reduce_<op> functions in wgreduce.cl . Implement work_group_scan_inclusive_<op> work_group_scan_exclusive_<op> functions in wgscan.cl . Passed corresponding OPENCL-CTS tests. ziliangzl 2024-05-14 13:36:09 +0800
  • 408ed74df2 [VENTUS][fix] Modify the disassembly result of a compress instruction error qinfan 2024-05-13 15:57:55 +0800
  • 4789f2096b [VENTUS][#119]Add work_group_broadcast implementation Passed corresponding OPENCL-CTS test. ziliangzl 2024-05-13 11:22:56 +0800
  • d63caa094a [VENTUS][#119]Fix __wg_scratch multiple define 1.Global variable shouldn't define in header. 2.Fix code format. ziliangzl 2024-05-13 11:18:03 +0800
  • 6b70120436 [VENTUS][libclc][feat]Start workgroup function implementation 1.Implement barrier and work_group_barrier function with intrinsics. 2.Implement work_group_all and work_group_any function,passed corresponding OPENCL-CTS test. ziliangzl 2024-05-11 16:38:52 +0800
  • 3267496a27 [VENTUS][NFC]Add inline-asm testcase Add an inline-asm testcase for constraint r Add an inline-asm testcase for branch instruction #116 ziliangzl 2024-05-07 15:33:42 +0800
  • 5816925f3f Merge branch 'compile-guide' into terapines-dev ziliangzl 2024-05-06 14:39:57 +0800
  • 279251d31d
    Merge pull request #114 from ziliangzl/compile-guide ziliangzl 2024-04-29 16:15:33 +0800
  • 5ff2eddbad [VENTUS][NFC]Add compile guide in README 1. Explained how to generate ELF file step-by-step. 2.Add compile assembly code to object file example. #114 ziliangzl 2024-04-26 16:38:57 +0800
  • 42a893c3be
    Merge pull request #113 from THU-DSP-LAB/workaround ziliangzl 2024-04-26 16:12:15 +0800
  • 573ae5e8ee [VENTUS][workaround] Fix flw/fsw assembly errors #113 workaround zhoujing 2024-04-26 15:14:22 +0800
  • 45856f653d
    Merge pull request #112 from ziliangzl/Pseudo-FLW/FSW zhoujingya 2024-04-26 13:28:05 +0800
  • 8be3150696 [#112][fix]Remove flw/fsw InstAlias 1.Removed flw/fsw InstAlias for now,cause flw/fsw could not match correctly. 2.Modified kernel_arg testcase. #112 ziliangzl 2024-04-26 10:59:35 +0800
  • 4354b039f3 [VENTUS][fix]Fix FLW/FSW instruction coding conflict Replace FLW/FSW instruction with PseudoFLW/PseudoFSW ziliangzl 2024-04-25 10:44:57 +0800
  • 968f0c07cd
    Merge pull request #110 from ziliangzl/divergent-analysis zhoujingya 2024-04-23 14:22:12 +0800
  • 47a0946abc [VENTUS][fix]Fix kernel divergent analysis 1.Kernel function argument is not divergent 2.GPRF32 is not divergent 3.Set PHINode is divergent 4.Add flw/fsw instruction for GPRF32 5.Add a floating add kernel function test case #110 ziliangzl 2024-04-16 14:55:49 +0800
  • 1347c06d50
    Merge pull request #109 from ziliangzl/divergent-analyse zhoujingya 2024-04-22 15:58:52 +0800