| .. |
|
AsmParser
|
[llvm] Call *set::insert without checking membership first (NFC)
|
2022-06-18 10:22:05 -07:00 |
|
Disassembler
|
[AMDGPU][MC][GFX11] Correct disassembly of DPP variants of VOPC64 opcodes
|
2022-06-20 14:23:07 +03:00 |
|
MCA
|
[llvm] Use = default (NFC)
|
2022-02-06 22:18:35 -08:00 |
|
MCTargetDesc
|
[AMDGPU] Increase instruction cache line size to 128 bytes for GFX11
|
2022-06-20 14:25:10 +01:00 |
|
TargetInfo
|
Fix shlib builds for all lib/Target/*/TargetInfo libs
|
2021-10-08 15:21:13 -07:00 |
|
Utils
|
[AMDGPU][MC][GFX11] Correct disassembly of DPP variants of VOPC64 opcodes
|
2022-06-20 14:23:07 +03:00 |
|
AMDGPU.h
|
[AMDGPU] Adjust wave priority based on VMEM instructions to avoid duty-cycling.
|
2022-04-27 14:37:18 +01:00 |
|
AMDGPU.td
|
Reland [AMDGPU] gfx11 vop3dpp instructions
|
2022-06-07 14:49:13 -04:00 |
|
AMDGPUAliasAnalysis.cpp
|
[NFC][AMDGPU] Reduce includes dependencies, part 2
|
2021-10-01 17:50:20 +03:00 |
|
AMDGPUAliasAnalysis.h
|
[Target] Remove redundant member initialization (NFC)
|
2022-01-06 22:01:44 -08:00 |
|
AMDGPUAlwaysInlinePass.cpp
|
[HIP] [AlwaysInliner] Disable AlwaysInliner to eliminate undefined symbols
|
2021-10-18 16:53:15 -06:00 |
|
AMDGPUAnnotateKernelFeatures.cpp
|
[AMDGPU][NFC] Correct typos in lib/Target/AMDGPU/AMDGPU*.cpp files. Test commit for new contributor.
|
2021-09-20 14:48:50 -07:00 |
|
AMDGPUAnnotateUniformValues.cpp
|
[AMDGPU] Return better Changed status from AMDGPUAnnotateUniformValues
|
2022-02-17 09:31:42 +00:00 |
|
AMDGPUArgumentUsageInfo.cpp
|
AMDGPU: Remove fixed function ABI option
|
2021-12-10 19:41:19 -05:00 |
|
AMDGPUArgumentUsageInfo.h
|
[AMDGPU] gfx90a support
|
2021-02-17 16:01:32 -08:00 |
|
AMDGPUAsmPrinter.cpp
|
[llvm] Use value_or instead of getValueOr (NFC)
|
2022-06-18 23:07:11 -07:00 |
|
AMDGPUAsmPrinter.h
|
[AMDGPU] Lazily init pal metadata on first function
|
2022-02-04 18:39:35 +01:00 |
|
AMDGPUAtomicOptimizer.cpp
|
[AMDGPU] Add GFX11 llvm.amdgcn.permlane64 intrinsic
|
2022-06-13 21:12:11 +01:00 |
|
AMDGPUAttributes.def
|
AMDGPU: Emit metadata for the hidden_multigrid_sync_arg conditionally
|
2022-04-12 12:36:30 -07:00 |
|
AMDGPUAttributor.cpp
|
[Attributor][NFCI] Introduce AttributorConfig to bundle all options
|
2022-04-15 18:17:19 -05:00 |
|
AMDGPUCallLowering.cpp
|
[NFC] Simplify code
|
2022-06-20 15:15:52 +00:00 |
|
AMDGPUCallLowering.h
|
AMDGPU/GlobalISel: Redo kernel argument load handling
|
2021-07-16 08:56:54 -04:00 |
|
AMDGPUCallingConv.td
|
[AMDGPU][NFC] Refactor AMDGPUCallingConv.td
|
2022-06-01 16:24:09 +00:00 |
|
AMDGPUCodeGenPrepare.cpp
|
[AMDGPU][NFC] Fix typos
|
2022-02-18 15:05:21 +01:00 |
|
AMDGPUCombine.td
|
AMDGPU/GlobalISel: Add clamp combine
|
2021-12-03 12:49:39 +01:00 |
|
AMDGPUCombinerHelper.cpp
|
[AMDGPU][GlobalISel] Fix insert point in FoldableFneg combine
|
2022-02-11 12:09:40 +01:00 |
|
AMDGPUCombinerHelper.h
|
[AMDGPU][GlobalISel] Fold G_FNEG above when users cannot fold mods
|
2021-11-17 14:25:13 +01:00 |
|
AMDGPUCtorDtorLowering.cpp
|
[amdgpu] Don't crash on empty global ctor/dtor
|
2021-11-16 14:36:08 +00:00 |
|
AMDGPUExportClustering.cpp
|
[llvm] Use = default (NFC)
|
2022-02-06 22:18:35 -08:00 |
|
AMDGPUExportClustering.h
|
[llvm] Add missing header guards (NFC)
|
2021-01-30 09:53:42 -08:00 |
|
AMDGPUFeatures.td
|
AMDGPU: Remove FeatureLocalMemorySize0
|
2021-09-02 22:43:01 -04:00 |
|
AMDGPUFrameLowering.cpp
|
…
|
|
|
AMDGPUFrameLowering.h
|
…
|
|
|
AMDGPUGISel.td
|
[AMDGPU] gfx11 VINTERP intrinsics and ISel support
|
2022-06-17 09:16:59 -04:00 |
|
AMDGPUGenRegisterBankInfo.def
|
…
|
|
|
AMDGPUGlobalISelUtils.cpp
|
[AMDGPU][GlobalISel] Handle G_PTR_ADD when looking for constant offset
|
2021-01-28 11:20:09 +01:00 |
|
AMDGPUGlobalISelUtils.h
|
[ADT] Move DenseMapInfo for ArrayRef/StringRef into respective headers (NFC)
|
2021-06-03 18:34:36 +02:00 |
|
AMDGPUHSAMetadataStreamer.cpp
|
AMDGPU: Emit metadata for the hidden_multigrid_sync_arg conditionally
|
2022-04-12 12:36:30 -07:00 |
|
AMDGPUHSAMetadataStreamer.h
|
[llvm] Use = default (NFC)
|
2022-02-06 22:18:35 -08:00 |
|
AMDGPUIGroupLP.cpp
|
Don't use Optional::hasValue (NFC)
|
2022-06-20 20:05:16 -07:00 |
|
AMDGPUIGroupLP.h
|
[AMDGPU] Add more expressive sched_barrier controls
|
2022-06-14 22:03:05 -07:00 |
|
AMDGPUISelDAGToDAG.cpp
|
[AMDGPU] gfx11 VINTERP intrinsics and ISel support
|
2022-06-17 09:16:59 -04:00 |
|
AMDGPUISelDAGToDAG.h
|
[AMDGPU] gfx11 VINTERP intrinsics and ISel support
|
2022-06-17 09:16:59 -04:00 |
|
AMDGPUISelLowering.cpp
|
[NFC][Alignment] Remove max functions between Align and MaybeAlign
|
2022-06-20 08:37:48 +00:00 |
|
AMDGPUISelLowering.h
|
AMDGPU: Use the implicit kernargs for code object version 5
|
2022-03-17 14:12:36 -07:00 |
|
AMDGPUInstCombineIntrinsic.cpp
|
[AMDGPU] Add new GFX11 intrinsic llvm.amdgcn.exp.row
|
2022-06-16 18:23:14 +01:00 |
|
AMDGPUInstrInfo.cpp
|
[NFC][AMDGPU] Reduce include files dependency.
|
2021-01-07 22:22:05 +03:00 |
|
AMDGPUInstrInfo.h
|
[AMDGPU] Fix LOD bias in A16 combine
|
2022-01-21 12:09:06 +01:00 |
|
AMDGPUInstrInfo.td
|
[AMDGPU] Move call clobbered return address registers s[30:31] to callee saved range
|
2022-03-09 12:18:02 +05:30 |
|
AMDGPUInstructionSelector.cpp
|
[AMDGPU] gfx11 VINTERP intrinsics and ISel support
|
2022-06-17 09:16:59 -04:00 |
|
AMDGPUInstructionSelector.h
|
[AMDGPU] gfx11 VINTERP intrinsics and ISel support
|
2022-06-17 09:16:59 -04:00 |
|
AMDGPUInstructions.td
|
Reland [AMDGPU] gfx11 vop3dpp instructions
|
2022-06-07 14:49:13 -04:00 |
|
AMDGPULateCodeGenPrepare.cpp
|
[AArch64, AMDGPU] Use make_early_inc_range (NFC)
|
2021-11-03 09:22:51 -07:00 |
|
AMDGPULegalizerInfo.cpp
|
[AMDGPU][GlobalISel] Legalize G_FSUB for s16
|
2022-06-20 12:25:49 +02:00 |
|
AMDGPULegalizerInfo.h
|
AMDGPU/GISel: Introduce custom legalization of G_MUL
|
2022-06-09 13:38:56 +02:00 |
|
AMDGPULibCalls.cpp
|
[AMDGPU] Pull out repeated getVecSize() calls. NFC.
|
2022-02-10 16:31:36 +00:00 |
|
AMDGPULibFunc.cpp
|
Revert "Rename llvm::array_lengthof into llvm::size to match std::size from C++17"
|
2022-01-26 16:55:53 +01:00 |
|
AMDGPULibFunc.h
|
[llvm] Use = default (NFC)
|
2022-02-06 22:18:35 -08:00 |
|
AMDGPULowerIntrinsics.cpp
|
[iwyu] Handle regressions in libLLVM header include
|
2022-05-04 08:32:38 +02:00 |
|
AMDGPULowerKernelArguments.cpp
|
[NFC] Simplify code
|
2022-06-20 15:15:52 +00:00 |
|
AMDGPULowerKernelAttributes.cpp
|
AMDGPU: Update reqd-work-group-size optimization for umin intrinsic
|
2022-04-12 20:03:02 -04:00 |
|
AMDGPULowerModuleLDSPass.cpp
|
[amdgpu] Elide module lds allocation in kernels with no callees
|
2022-05-04 22:42:07 +01:00 |
|
AMDGPUMCInstLower.cpp
|
[AMDGPU] Add llvm.amdgcn.sched.barrier intrinsic
|
2022-05-11 13:22:51 -07:00 |
|
AMDGPUMCInstLower.h
|
AMDGPU: Fix missing c++ mode comment
|
2022-06-01 21:14:48 -04:00 |
|
AMDGPUMIRFormatter.cpp
|
CodeGen: Move getAddressSpaceForPseudoSourceKind into TargetMachine
|
2022-06-01 09:45:40 -04:00 |
|
AMDGPUMIRFormatter.h
|
[llvm] Use = default (NFC)
|
2022-02-06 22:18:35 -08:00 |
|
AMDGPUMachineCFGStructurizer.cpp
|
[AMDGPU][NFC] Fix typos
|
2022-02-18 15:05:21 +01:00 |
|
AMDGPUMachineFunction.cpp
|
[amdgpu] Elide module lds allocation in kernels with no callees
|
2022-05-04 22:42:07 +01:00 |
|
AMDGPUMachineFunction.h
|
[iwyu] Handle regressions in libLLVM header include
|
2022-05-26 08:12:34 +02:00 |
|
AMDGPUMachineModuleInfo.cpp
|
Cleanup codegen includes
|
2022-03-16 08:43:00 +01:00 |
|
AMDGPUMachineModuleInfo.h
|
[NFC][AMDGPU] Reduce include files dependency.
|
2021-01-07 22:22:05 +03:00 |
|
AMDGPUMacroFusion.cpp
|
[NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets
|
2021-01-20 22:22:45 +03:00 |
|
AMDGPUMacroFusion.h
|
[llvm] Add missing header guards (NFC)
|
2021-01-30 09:53:42 -08:00 |
|
AMDGPUOpenCLEnqueuedBlockLowering.cpp
|
[NFC] Remove unnecessary "#include"s from header files
|
2022-02-23 01:20:48 -08:00 |
|
AMDGPUPTNote.h
|
[NFC] Fix endif comments to match with include guard
|
2022-01-07 15:52:59 +08:00 |
|
AMDGPUPerfHintAnalysis.cpp
|
[AMDGPU][NFC] Remove isConstantAddr
|
2022-06-17 08:49:29 +08:00 |
|
AMDGPUPerfHintAnalysis.h
|
[AMDGPU] Tune perfhint analysis to account access width
|
2021-07-21 12:46:10 -07:00 |
|
AMDGPUPostLegalizerCombiner.cpp
|
Code quality: Combine V_RSQ
|
2021-11-30 17:17:15 +01:00 |
|
AMDGPUPreLegalizerCombiner.cpp
|
AMDGPU: Remove redundant call to MachineInstrBuilder::setMBB
|
2022-05-03 07:49:20 -05:00 |
|
AMDGPUPrintfRuntimeBinding.cpp
|
[NFC] format InstructionSimplify & lowerCaseFunctionNames
|
2022-06-09 16:10:08 +02:00 |
|
AMDGPUPromoteAlloca.cpp
|
Use llvm::less_second (NFC)
|
2022-06-04 22:48:32 -07:00 |
|
AMDGPUPromoteKernelArguments.cpp
|
[AMDGPU] Set noclobber metadata on loads instead of cast to constant
|
2022-03-07 23:13:02 -08:00 |
|
AMDGPUPropagateAttributes.cpp
|
AMDGPU: Use attributor to propagate amdgpu-flat-work-group-size
|
2021-10-22 16:23:50 -04:00 |
|
AMDGPURegBankCombiner.cpp
|
AMDGPU/GlobalISel: Fix introducing f16 fmed3 for gfx8
|
2022-01-19 10:43:21 -05:00 |
|
AMDGPURegisterBankInfo.cpp
|
[AMDGPU] Reorder cases. NFC.
|
2022-06-20 14:30:17 +01:00 |
|
AMDGPURegisterBankInfo.h
|
AMDGPU: Add G_AMDGPU_MAD_64_32 instructions
|
2022-05-27 12:36:17 -05:00 |
|
AMDGPURegisterBanks.td
|
[AMDGPU] Add 224-bit vector types and link 192-bit types to MVTs
|
2021-06-24 12:41:22 +09:00 |
|
AMDGPUReplaceLDSUseWithPointer.cpp
|
[llvm] Don't use Optional::getValue (NFC)
|
2022-06-20 22:45:45 -07:00 |
|
AMDGPUResourceUsageAnalysis.cpp
|
[AMDGPU] Define SGPR_NULL64 register. NFCI.
|
2022-06-13 13:23:33 -07:00 |
|
AMDGPUResourceUsageAnalysis.h
|
AMDGPU: Convert AMDGPUResourceUsageAnalysis to a Module pass
|
2022-02-04 15:56:04 -05:00 |
|
AMDGPURewriteOutArguments.cpp
|
[AMDGPURewriteOutArguments] Don't use pointer element type
|
2022-02-08 16:10:41 +01:00 |
|
AMDGPUSearchableTables.td
|
[AMDGPU] gfx11 ldsdir intrinsics and ISel
|
2022-06-17 09:03:16 -04:00 |
|
AMDGPUSetWavePriority.cpp
|
[AMDGPU] Adjust wave priority based on VMEM instructions to avoid duty-cycling.
|
2022-04-27 14:37:18 +01:00 |
|
AMDGPUSubtarget.cpp
|
[NFC][Alignment] Remove max functions between Align and MaybeAlign
|
2022-06-20 08:37:48 +00:00 |
|
AMDGPUSubtarget.h
|
[AMDGPU] gfx11 subtarget features & early tests
|
2022-05-11 10:31:49 -04:00 |
|
AMDGPUTargetMachine.cpp
|
[llvm] Don't use Optional::getValue (NFC)
|
2022-06-20 22:45:45 -07:00 |
|
AMDGPUTargetMachine.h
|
CodeGen: Move getAddressSpaceForPseudoSourceKind into TargetMachine
|
2022-06-01 09:45:40 -04:00 |
|
AMDGPUTargetObjectFile.cpp
|
[NFC][AMDGPU] Reduce include files dependency.
|
2021-01-07 22:22:05 +03:00 |
|
AMDGPUTargetObjectFile.h
|
…
|
|
|
AMDGPUTargetTransformInfo.cpp
|
Recommit "[SLP][TTI] Refactoring of `getShuffleCost` `Args` to work like `getArithmeticInstrCost`"
|
2022-04-26 14:02:40 -07:00 |
|
AMDGPUTargetTransformInfo.h
|
Recommit "[SLP][TTI] Refactoring of `getShuffleCost` `Args` to work like `getArithmeticInstrCost`"
|
2022-04-26 14:02:40 -07:00 |
|
AMDGPUUnifyDivergentExitNodes.cpp
|
[Analysis, Target, Transforms] Construct SmallVector with iterator ranges (NFC)
|
2021-09-07 09:19:33 -07:00 |
|
AMDGPUUnifyMetadata.cpp
|
[NFC][AMDGPU] Reduce include files dependency.
|
2021-01-07 22:22:05 +03:00 |
|
AMDKernelCodeT.h
|
[AMDGPU][NFC] Fix typos
|
2022-02-18 15:05:21 +01:00 |
|
BUFInstructions.td
|
[AMDGPU] Remove a duplicate atomic fadd pattern
|
2022-06-20 14:08:57 +01:00 |
|
CMakeLists.txt
|
[AMDGPU] Add more expressive sched_barrier controls
|
2022-06-14 22:03:05 -07:00 |
|
CaymanInstructions.td
|
Code quality: Combine V_RSQ
|
2021-11-30 17:17:15 +01:00 |
|
DSInstructions.td
|
[AMDGPU] Add GFX11 llvm.amdgcn.ds.add.gs.reg.rtn / llvm.amdgcn.ds.sub.gs.reg.rtn intrinsics
|
2022-06-16 18:23:14 +01:00 |
|
EXPInstructions.td
|
[AMDGPU] Add new GFX11 intrinsic llvm.amdgcn.exp.row
|
2022-06-16 18:23:14 +01:00 |
|
EvergreenInstructions.td
|
Code quality: Combine V_RSQ
|
2021-11-30 17:17:15 +01:00 |
|
FLATInstructions.td
|
[AMDGPU] gfx11 FLAT Instructions
|
2022-05-25 15:29:39 -04:00 |
|
GCNDPPCombine.cpp
|
[AMDGPU] Combine DPP mov even if old reg def is in different BB
|
2022-05-05 11:30:31 +01:00 |
|
GCNHazardRecognizer.cpp
|
[AMDGPU] Add support for GFX11 LDSDIR hazards
|
2022-06-20 21:58:12 +01:00 |
|
GCNHazardRecognizer.h
|
[AMDGPU] Add support for GFX11 LDSDIR hazards
|
2022-06-20 21:58:12 +01:00 |
|
GCNILPSched.cpp
|
[NFC][AMDGPU] Reduce include files dependency.
|
2021-01-07 22:22:05 +03:00 |
|
GCNIterativeScheduler.cpp
|
[AMDGPU][NFC] Fix typos
|
2021-11-12 11:37:21 +01:00 |
|
GCNIterativeScheduler.h
|
[NFC][AMDGPU] Reduce include files dependency.
|
2021-01-07 22:22:05 +03:00 |
|
GCNMinRegStrategy.cpp
|
[AMDGPU][NFC] Fix typos
|
2021-11-12 11:37:21 +01:00 |
|
GCNNSAReassign.cpp
|
[AMDGPU] GFX11 CodeGen support for MIMG instructions
|
2022-06-16 18:23:14 +01:00 |
|
GCNPreRAOptimizations.cpp
|
[AMDGPU][NFC] Fix typos
|
2021-11-12 11:37:21 +01:00 |
|
GCNProcessors.td
|
[AMDGPU] gfx11 subtarget features & early tests
|
2022-05-11 10:31:49 -04:00 |
|
GCNRegPressure.cpp
|
[NFC] Use Register instead of unsigned
|
2022-01-19 20:17:04 +08:00 |
|
GCNRegPressure.h
|
[AMDGPU][NFC] Fix typos
|
2022-02-18 15:05:21 +01:00 |
|
GCNSchedStrategy.cpp
|
[AMDGPU] Enable PreRARematerialize scheduling pass with multiple high RP regions
|
2022-04-08 13:08:32 -07:00 |
|
GCNSchedStrategy.h
|
[AMDGPU] Enable PreRARematerialize scheduling pass with multiple high RP regions
|
2022-04-08 13:08:32 -07:00 |
|
GCNSubtarget.h
|
[AMDGPU] Work around GFX11 flat scratch SVS swizzling bug
|
2022-06-13 21:00:42 +01:00 |
|
InstCombineTables.td
|
…
|
|
|
LDSDIRInstructions.td
|
[AMDGPU] gfx11 ldsdir intrinsics and ISel
|
2022-06-17 09:03:16 -04:00 |
|
MIMGInstructions.td
|
[AMDGPU][MC][GFX1013] Enable image_msaa_load
|
2022-06-10 13:42:05 +03:00 |
|
R600.h
|
[AMDGPU] Rename AMDGPUCFGStructurizer to R600MachineCFGStructurizer
|
2022-02-18 15:08:25 +00:00 |
|
R600.td
|
[NFC][AMDGPU] Reduce includes dependencies.
|
2021-08-25 12:01:55 +03:00 |
|
R600AsmPrinter.cpp
|
[MC] De-capitalize SwitchSection. NFC
|
2022-06-10 22:50:55 -07:00 |
|
R600AsmPrinter.h
|
…
|
|
|
R600ClauseMergePass.cpp
|
Cleanup codegen includes
|
2022-03-16 08:43:00 +01:00 |
|
R600ControlFlowFinalizer.cpp
|
Cleanup codegen includes
|
2022-03-16 08:43:00 +01:00 |
|
R600Defines.h
|
[NFC][AMDGPU] Reduce include files dependency.
|
2021-01-07 22:22:05 +03:00 |
|
R600EmitClauseMarkers.cpp
|
Cleanup codegen includes
|
2022-03-16 08:43:00 +01:00 |
|
R600ExpandSpecialInstrs.cpp
|
Cleanup codegen includes
|
2022-03-16 08:43:00 +01:00 |
|
R600FrameLowering.cpp
|
Cleanup codegen includes
|
2022-03-16 08:43:00 +01:00 |
|
R600FrameLowering.h
|
[NFC][AMDGPU] Reduce include files dependency.
|
2021-01-07 22:22:05 +03:00 |
|
R600ISelDAGToDAG.cpp
|
[NFC][AMDGPU] Reduce includes dependencies, part 2
|
2021-10-01 17:50:20 +03:00 |
|
R600ISelLowering.cpp
|
[Alignment][NFC] Remove usage of MemSDNode::getAlignment
|
2022-06-07 13:52:20 +00:00 |
|
R600ISelLowering.h
|
[Target] Remove unused forward declarations (NFC)
|
2022-01-02 10:20:15 -08:00 |
|
R600InstrFormats.td
|
…
|
|
|
R600InstrInfo.cpp
|
CodeGen: Move getAddressSpaceForPseudoSourceKind into TargetMachine
|
2022-06-01 09:45:40 -04:00 |
|
R600InstrInfo.h
|
CodeGen: Move getAddressSpaceForPseudoSourceKind into TargetMachine
|
2022-06-01 09:45:40 -04:00 |
|
R600InstrInfo.td
|
[NFC][AMDGPU] Reduce includes dependencies.
|
2021-08-25 12:01:55 +03:00 |
|
R600Instructions.td
|
Code quality: Combine V_RSQ
|
2021-11-30 17:17:15 +01:00 |
|
R600MCInstLower.cpp
|
[NFC][AMDGPU] Reduce includes dependencies, part 2
|
2021-10-01 17:50:20 +03:00 |
|
R600MachineCFGStructurizer.cpp
|
[AMDGPU] Fix -Wunused-variable in -DLLVM_ENABLE_ASSERTIONS=off builds
|
2022-04-19 22:36:58 -07:00 |
|
R600MachineFunctionInfo.cpp
|
…
|
|
|
R600MachineFunctionInfo.h
|
…
|
|
|
R600MachineScheduler.cpp
|
[llvm] Use range-based for loops (NFC)
|
2021-12-11 11:29:12 -08:00 |
|
R600MachineScheduler.h
|
[AMDGPU][NFC] Fix typos
|
2021-11-12 11:37:21 +01:00 |
|
R600OpenCLImageTypeLoweringPass.cpp
|
[llvm] Use range-based for loops (NFC)
|
2021-12-11 11:29:12 -08:00 |
|
R600OptimizeVectorRegisters.cpp
|
[Target] Use range-based for loops (NFC)
|
2021-12-17 10:11:08 -08:00 |
|
R600Packetizer.cpp
|
[AMDGPU][NFC] Fix typos
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2022-02-18 15:05:21 +01:00 |
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R600Processors.td
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AMDGPU: Remove FeatureLocalMemorySize0
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2021-09-02 22:43:01 -04:00 |
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R600RegisterInfo.cpp
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Revert "Rename llvm::array_lengthof into llvm::size to match std::size from C++17"
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2022-01-26 16:55:53 +01:00 |
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R600RegisterInfo.h
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…
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R600RegisterInfo.td
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…
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R600Schedule.td
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…
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R600Subtarget.cpp
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[AMDGPU] Use default member initializers in Subtarget classes
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2022-04-12 16:42:30 +01:00 |
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R600Subtarget.h
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[AMDGPU] Use default member initializers in Subtarget classes
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2022-04-12 16:42:30 +01:00 |
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R600TargetMachine.cpp
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mark getTargetTransformInfo and getTargetIRAnalysis as const
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2022-02-25 14:30:44 -05:00 |
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R600TargetMachine.h
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mark getTargetTransformInfo and getTargetIRAnalysis as const
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2022-02-25 14:30:44 -05:00 |
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R600TargetTransformInfo.cpp
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[NFC][AMDGPU] Reduce includes dependencies, part 2
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2021-10-01 17:50:20 +03:00 |
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R600TargetTransformInfo.h
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[NFC][AMDGPU] Reduce includes dependencies.
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2021-08-25 12:01:55 +03:00 |
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R700Instructions.td
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…
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SIAnnotateControlFlow.cpp
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[AMDGPU] Return better Changed status from SIAnnotateControlFlow
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2022-02-17 09:38:57 +00:00 |
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SIDefines.h
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Update *_TMPRING_SIZE.WAVESIZE for GFX11
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2022-06-10 13:24:00 -04:00 |
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SIFixSGPRCopies.cpp
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[Target] Use range-based for loops (NFC)
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2021-11-26 21:21:17 -08:00 |
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SIFixVGPRCopies.cpp
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[NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets
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2021-01-20 22:22:45 +03:00 |
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SIFoldOperands.cpp
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[AMDGPU] Aggressively fold immediates in SIFoldOperands
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2022-05-18 10:19:35 +01:00 |
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SIFormMemoryClauses.cpp
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[AMDGPU][NFC] Fix typos
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2022-02-18 15:05:21 +01:00 |
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SIFrameLowering.cpp
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AMDGPU: Move SpilledReg from MFI to SIRegisterInfo
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2022-06-02 17:11:24 -04:00 |
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SIFrameLowering.h
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[AMDGPU] On gfx908, reserve VGPR for AGPR copy based on register budget.
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2022-04-21 07:57:26 +05:30 |
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SIISelLowering.cpp
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[AMDGPU] GFX11 CodeGen support for MIMG instructions
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2022-06-16 18:23:14 +01:00 |
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SIISelLowering.h
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[AMDGPU] Basic implementation of isExtractSubvectorCheap
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2022-06-10 14:43:07 +01:00 |
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SIInsertHardClauses.cpp
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[AMDGPU] Update SIInsertHardClauses for GFX11
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2022-06-09 21:29:56 +01:00 |
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SIInsertWaitcnts.cpp
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[AMDGPU] gfx11 waitcnt support for VINTERP and LDSDIR instructions
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2022-06-17 09:30:37 -04:00 |
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SIInstrFormats.td
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Reland [AMDGPU] gfx11 vop3dpp instructions
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2022-06-07 14:49:13 -04:00 |
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SIInstrInfo.cpp
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[AMDGPU] Add isMFMA helper function. NFC
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2022-06-14 22:01:49 -07:00 |
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SIInstrInfo.h
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[AMDGPU] Mark GFX11 dual source blend export as strict-wqm
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2022-06-20 21:58:12 +01:00 |
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SIInstrInfo.td
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[AMDGPU] gfx11 VOP3P instruction MC support
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2022-06-08 13:32:01 -04:00 |
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SIInstructions.td
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AMDGPU: Add G_AMDGPU_MAD_64_32 instructions
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2022-05-27 12:36:17 -05:00 |
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SILateBranchLowering.cpp
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[AArch64, AMDGPU] Use make_early_inc_range (NFC)
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2021-11-03 09:22:51 -07:00 |
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SILoadStoreOptimizer.cpp
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[AMDGPU] Merge flat with global in the SILoadStoreOptimizer
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2022-03-09 10:04:37 -08:00 |
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SILowerControlFlow.cpp
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AMDGPU: Fix LiveVariables error after lowering SI_END_CF
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2022-04-05 21:57:50 -04:00 |
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SILowerI1Copies.cpp
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[AMDGPU] Return better Changed status from SILowerI1Copies
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2022-02-17 09:38:57 +00:00 |
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SILowerSGPRSpills.cpp
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Cleanup codegen includes
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2022-03-16 08:43:00 +01:00 |
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SIMachineFunctionInfo.cpp
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llvm-reduce: Add cloning of target MachineFunctionInfo
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2022-06-07 10:14:48 -04:00 |
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SIMachineFunctionInfo.h
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llvm-reduce: Add cloning of target MachineFunctionInfo
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2022-06-07 10:14:48 -04:00 |
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SIMachineScheduler.cpp
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[AMDGPU]: Fix failing assertion in SIMachineScheduler
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2022-04-21 14:52:29 +01:00 |
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SIMachineScheduler.h
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[AMDGPU][NFC] Fix typos
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2021-11-12 11:37:21 +01:00 |
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SIMemoryLegalizer.cpp
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[llvm] Don't use Optional::getValue (NFC)
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2022-06-20 22:45:45 -07:00 |
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SIModeRegister.cpp
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Cleanup codegen includes
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2022-03-16 08:43:00 +01:00 |
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SIOptimizeExecMasking.cpp
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[AMDGPU] Increase detection range for s_mov, v_cmpx transformation.
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2022-04-08 12:47:24 +02:00 |
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SIOptimizeExecMaskingPreRA.cpp
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[AMDGPU][NFC] Fix typos
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2022-02-18 15:05:21 +01:00 |
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SIOptimizeVGPRLiveRange.cpp
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[AMDGPU] Graceful abort for waterfalls in SIOptimizeVGPRLiveRange
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2022-04-12 14:15:44 +09:00 |
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SIPeepholeSDWA.cpp
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[AMDGPU][NFC] Fix typos
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2022-02-18 15:05:21 +01:00 |
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SIPostRABundler.cpp
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[AMDGPU] Fix SIPostRABundler crash on null register used by dbg value
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2021-11-18 17:01:19 -08:00 |
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SIPreAllocateWWMRegs.cpp
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AMDGPU: Defer creation of WWM VGPR spill slots
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2022-04-19 21:07:13 -04:00 |
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SIPreEmitPeephole.cpp
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[NFC][CodeGen] Rename some functions in MachineInstr.h and remove duplicated comments
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2022-03-16 20:25:42 +08:00 |
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SIProgramInfo.cpp
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[AMDGPU] Set rsrc1 flags for graphics shaders
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2020-11-04 12:25:41 +01:00 |
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SIProgramInfo.h
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[AMDGPU] gfx90a support
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2021-02-17 16:01:32 -08:00 |
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SIRegisterInfo.cpp
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[AMDGPU] Define SGPR_NULL64 register. NFCI.
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2022-06-13 13:23:33 -07:00 |
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SIRegisterInfo.h
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AMDGPU: Move SpilledReg from MFI to SIRegisterInfo
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2022-06-02 17:11:24 -04:00 |
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SIRegisterInfo.td
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[AMDGPU] Define SGPR_NULL64 register. NFCI.
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2022-06-13 13:23:33 -07:00 |
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SISchedule.td
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[AMDGPU] gfx11 subtarget features & early tests
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2022-05-11 10:31:49 -04:00 |
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SIShrinkInstructions.cpp
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[AMDGPU] GFX11 CodeGen support for MIMG instructions
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2022-06-16 18:23:14 +01:00 |
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SIWholeQuadMode.cpp
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[AMDGPU] Mark GFX11 dual source blend export as strict-wqm
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2022-06-20 21:58:12 +01:00 |
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SMInstructions.td
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[AMDGPU][GFX9][GFX10] Support base+soffset+offset SMEM atomics.
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2022-06-10 13:22:41 +01:00 |
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SOPInstructions.td
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[AMDGPU] New GFX11 intrinsic llvm.amdgcn.s.sendmsg.rtn
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2022-06-10 08:15:23 +01:00 |
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VIInstrFormats.td
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[AMDGPU] gfx11 export instructions
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2022-05-25 14:44:09 -04:00 |
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VINTERPInstructions.td
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[AMDGPU] gfx11 VINTERP intrinsics and ISel support
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2022-06-17 09:16:59 -04:00 |
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VOP1Instructions.td
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[AMDGPU] Add GFX11 codegen for llvm.amdgcn.mov.dpp8
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2022-06-16 19:44:28 +01:00 |
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VOP2Instructions.td
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[AMDGPU] gfx11 support add_f16
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2022-06-14 08:59:45 -04:00 |
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VOP3Instructions.td
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[AMDGPU] gfx11 new dot instruction codegen support
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2022-06-16 14:19:34 -04:00 |
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VOP3PInstructions.td
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[AMDGPU] gfx11 new dot instruction codegen support
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2022-06-16 14:19:34 -04:00 |
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VOPCInstructions.td
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[AMDGPU][MC][GFX11] Correct disassembly of DPP variants of VOPC64 opcodes
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2022-06-20 14:23:07 +03:00 |
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VOPInstructions.td
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[AMDGPU][MC][GFX11] Correct disassembly of DPP variants of VOPC64 opcodes
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2022-06-20 14:23:07 +03:00 |
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