llvm-project/llvm/lib/Target/RISCV/Disassembler
Philip Reames 780c539844 [RISCV] Implement assembler support for XVentanaCondOps
This change provides an implementation of the XVentanaCondOps vendor extension. This extension is defined in version 1.0.0 of the VTx-family custom instructions specification (https://github.com/ventanamicro/ventana-custom-extensions/releases/download/v1.0.0/ventana-custom-extensions-v1.0.0.pdf) by Ventana Micro Systems.

In addition to the technical contribution, this change is intended to be a test case for our vendor extension policy.

Once this lands, I plan to use this extension to prototype selection lowering to conditional moves. There's an RVI proposal in flight, and the expectation is that lowering to these and the new RVI instructions is likely to be substantially similar.

Differential Revision: https://reviews.llvm.org/D137350
2022-11-14 09:01:54 -08:00
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CMakeLists.txt
RISCVDisassembler.cpp [RISCV] Implement assembler support for XVentanaCondOps 2022-11-14 09:01:54 -08:00