mirror of https://github.com/ptitSeb/box64.git
[INTERP] More fixes to INSERTQ/EXTRQ opcodes
This commit is contained in:
parent
a19f4b9eca
commit
eee547d50a
|
@ -1705,6 +1705,7 @@ uintptr_t Run660F(x64emu_t *emu, rex_t rex, uintptr_t addr)
|
||||||
EmitSignal(emu, SIGILL, (void*)R_RIP, 0);
|
EmitSignal(emu, SIGILL, (void*)R_RIP, 0);
|
||||||
#endif
|
#endif
|
||||||
} else {
|
} else {
|
||||||
|
//TODO: test /0
|
||||||
GETEX(2);
|
GETEX(2);
|
||||||
tmp8s = F8&0x3f;
|
tmp8s = F8&0x3f;
|
||||||
tmp8u = F8&0x3f;
|
tmp8u = F8&0x3f;
|
||||||
|
@ -1720,12 +1721,13 @@ uintptr_t Run660F(x64emu_t *emu, rex_t rex, uintptr_t addr)
|
||||||
EmitSignal(emu, SIGILL, (void*)R_RIP, 0);
|
EmitSignal(emu, SIGILL, (void*)R_RIP, 0);
|
||||||
#endif
|
#endif
|
||||||
} else {
|
} else {
|
||||||
|
//TODO: test/r
|
||||||
GETGX;
|
GETGX;
|
||||||
GETEX(2);
|
GETEX(2);
|
||||||
tmp8s = GX->ub[0]&0x3f;
|
tmp8s = EX->ub[0]&0x3f;
|
||||||
tmp8u = GX->ub[1]&0x3f;
|
tmp8u = EX->ub[1]&0x3f;
|
||||||
EX->q[0]>>=tmp8u;
|
GX->q[0]>>=tmp8u;
|
||||||
EX->q[0]&=((1<<(tmp8s+1))-1);
|
GX->q[0]&=((1<<(tmp8s+1))-1);
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
|
|
||||||
|
|
|
@ -296,7 +296,7 @@ uintptr_t RunF20F(x64emu_t *emu, rex_t rex, uintptr_t addr, int *step)
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case 0x78: /* INSERTQ Ex, Gx, ib, ib */
|
case 0x78: /* INSERTQ Gx, Ex, ib, ib */
|
||||||
// AMD only
|
// AMD only
|
||||||
nextop = F8;
|
nextop = F8;
|
||||||
if(!BOX64ENV(cputype) || !(MODREG)) {
|
if(!BOX64ENV(cputype) || !(MODREG)) {
|
||||||
|
@ -304,16 +304,17 @@ uintptr_t RunF20F(x64emu_t *emu, rex_t rex, uintptr_t addr, int *step)
|
||||||
EmitSignal(emu, SIGILL, (void*)R_RIP, 0);
|
EmitSignal(emu, SIGILL, (void*)R_RIP, 0);
|
||||||
#endif
|
#endif
|
||||||
} else {
|
} else {
|
||||||
|
//TODO: test /r
|
||||||
GETGX;
|
GETGX;
|
||||||
GETEX(2);
|
GETEX(2);
|
||||||
tmp8u = F8&0x3f;
|
|
||||||
tmp8s = F8&0x3f;
|
tmp8s = F8&0x3f;
|
||||||
|
tmp8u = F8&0x3f;
|
||||||
tmp64u = (1<<(tmp8s+1))-1;
|
tmp64u = (1<<(tmp8s+1))-1;
|
||||||
EX->q[0] &=~(tmp64u<<tmp8u);
|
GX->q[0] &=~(tmp64u<<tmp8u);
|
||||||
EX->q[0] |= (GX->q[0]&tmp64u)<<tmp8u;
|
GX->q[0] |= (EX->q[0]&tmp64u)<<tmp8u;
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
case 0x79: /* INSERTQ Ex, Gx */
|
case 0x79: /* INSERTQ Gx, Ex */
|
||||||
// AMD only
|
// AMD only
|
||||||
nextop = F8;
|
nextop = F8;
|
||||||
if(!BOX64ENV(cputype) || !(MODREG)) {
|
if(!BOX64ENV(cputype) || !(MODREG)) {
|
||||||
|
@ -321,13 +322,14 @@ uintptr_t RunF20F(x64emu_t *emu, rex_t rex, uintptr_t addr, int *step)
|
||||||
EmitSignal(emu, SIGILL, (void*)R_RIP, 0);
|
EmitSignal(emu, SIGILL, (void*)R_RIP, 0);
|
||||||
#endif
|
#endif
|
||||||
} else {
|
} else {
|
||||||
|
//TODO: test /r
|
||||||
GETGX;
|
GETGX;
|
||||||
GETEX(2);
|
GETEX(2);
|
||||||
tmp8u = GX->ub[8]&0x3f;
|
tmp8u = EX->ub[8]&0x3f;
|
||||||
tmp8s = GX->ub[9]&0x3f;
|
tmp8s = EX->ub[9]&0x3f;
|
||||||
tmp64u = (1<<(tmp8s+1))-1;
|
tmp64u = (1<<(tmp8s+1))-1;
|
||||||
EX->q[0] &=~(tmp64u<<tmp8u);
|
GX->q[0] &=~(tmp64u<<tmp8u);
|
||||||
EX->q[0] |= (GX->q[0]&tmp64u)<<tmp8u;
|
GX->q[0] |= (EX->q[0]&tmp64u)<<tmp8u;
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
|
|
||||||
|
|
Loading…
Reference in New Issue