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[RISCV] Simpify operand index calculation in createMIROperandComment [nfc]

This commit is contained in:
Philip Reames 2022-09-13 15:06:11 -07:00 committed by Philip Reames
parent ac05bc0524
commit cc45687e1c
1 changed files with 2 additions and 9 deletions
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11
llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
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@ -1504,18 +1504,11 @@ std::string RISCVInstrInfo::createMIROperandComment(
OpIdx == 2) {
unsigned Imm = MI.getOperand(OpIdx).getImm();
RISCVVType::printVType(Imm, OS);
} else if (RISCVII::hasSEWOp(TSFlags)) {
unsigned NumOperands = MI.getNumExplicitOperands();
bool HasPolicy = RISCVII::hasVecPolicyOp(TSFlags);
// The SEW operand is before any policy operand.
if (OpIdx != NumOperands - HasPolicy - 1)
return std::string();
} else if (RISCVII::hasSEWOp(TSFlags) &&
OpIdx == RISCVII::getSEWOpNum(MI.getDesc())) {
unsigned Log2SEW = MI.getOperand(OpIdx).getImm();
unsigned SEW = Log2SEW ? 1 << Log2SEW : 8;
assert(RISCVVType::isValidSEW(SEW) && "Unexpected SEW");
OS << "e" << SEW;
}