OSchip
/
llvm-project
mirror of https://github.com/THU-DSP-LAB/llvm-project.git
13
0
Fork 2
Code Issues Packages Projects Releases Wiki Activity

[VENTUS][fix] Fix epilog information restoring error

This commit is contained in:
zhoujingya 2023-11-28 17:30:01 +08:00
parent 2ae501e91b
commit 5fb025744a
1 changed files with 9 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

12
llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
View File

@ -457,6 +457,7 @@ void RISCVFrameLowering::emitEpilogue(MachineFunction &MF,
MachineBasicBlock &MBB) const {
const RISCVRegisterInfo *RI = STI.getRegisterInfo();
MachineFrameInfo &MFI = MF.getFrameInfo();
const RISCVInstrInfo *TII = STI.getInstrInfo();
Register SPReg = getSPReg(STI);
Register TPReg = getTPReg(STI);
@ -496,10 +497,15 @@ void RISCVFrameLowering::emitEpilogue(MachineFunction &MF,
RI->adjustReg(MBB, MBBI, DL, SPReg, SPReg,
StackOffset::getFixed(-SPStackSize),
MachineInstr::FrameDestroy, getStackAlign());
if(TPStackSize)
if(TPStackSize) {
RI->adjustReg(MBB, MBBI, DL, TPReg, TPReg,
StackOffset::getFixed(-TPStackSize),
MachineInstr::FrameDestroy, getStackAlign());
StackOffset::getFixed(-TPStackSize),
MachineInstr::FrameDestroy, getStackAlign());
BuildMI(MBB, MBBI, DL, TII->get(RISCV::VMV_V_X),
RI->getPrivateMemoryBaseRegister(MF))
.addReg(TPReg);
}
// Emit epilogue for shadow call stack.
emitSCSEpilogue(MF, MBB, MBBI, DL);