diff --git a/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp b/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
index 23202937f18e..b4bf81734c0b 100644
--- a/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
@@ -457,6 +457,7 @@ void RISCVFrameLowering::emitEpilogue(MachineFunction &MF,
                                       MachineBasicBlock &MBB) const {
   const RISCVRegisterInfo *RI = STI.getRegisterInfo();
   MachineFrameInfo &MFI = MF.getFrameInfo();
+  const RISCVInstrInfo *TII = STI.getInstrInfo();
   Register SPReg = getSPReg(STI);
   Register TPReg = getTPReg(STI);
 
@@ -496,10 +497,15 @@ void RISCVFrameLowering::emitEpilogue(MachineFunction &MF,
     RI->adjustReg(MBB, MBBI, DL, SPReg, SPReg,
                   StackOffset::getFixed(-SPStackSize),
                   MachineInstr::FrameDestroy, getStackAlign());
-  if(TPStackSize)
+  if(TPStackSize) {
     RI->adjustReg(MBB, MBBI, DL, TPReg, TPReg,
-                  StackOffset::getFixed(-TPStackSize),
-                  MachineInstr::FrameDestroy, getStackAlign());
+              StackOffset::getFixed(-TPStackSize),
+              MachineInstr::FrameDestroy, getStackAlign());
+    BuildMI(MBB, MBBI, DL, TII->get(RISCV::VMV_V_X),
+            RI->getPrivateMemoryBaseRegister(MF))
+        .addReg(TPReg);
+  }
+
 
   // Emit epilogue for shadow call stack.
   emitSCSEpilogue(MF, MBB, MBBI, DL);