style

.vscode/settings.json

@@ -1,7 +1,10 @@
 {
-    "files.associations": {
-        "unistd.h": "c",
-        "time.h": "c"
-    },
-    "rust-analyzer.cargo.target": "riscv64gc-unknown-none-elf",
+    // Prevent "can't find crate for `test`" error on no_std
+    // Ref: https://github.com/rust-lang/vscode-rust/issues/729
+    // For vscode-rust plugin users:
+    "rust.target": "riscv64imac-unknown-none-elf",
+    "rust.all_targets": false,
+    // For Rust Analyzer plugin users:
+    "rust-analyzer.cargo.target": "riscv64imac-unknown-none-elf",
+    "rust-analyzer.checkOnSave.allTargets": false
 }

kernel-hal/src/libos/vm.rs

@@ -69,7 +69,7 @@ impl GenericPageTable for PageTable {
 
     fn query(&self, vaddr: VirtAddr) -> PagingResult<(PhysAddr, MMUFlags, PageSize)> {
         debug_assert!(is_aligned(vaddr));
-        if PMEM_MAP_VADDR <= vaddr && vaddr < PMEM_MAP_VADDR + PMEM_SIZE {
+        if (PMEM_MAP_VADDR..PMEM_MAP_VADDR + PMEM_SIZE).contains(&vaddr) {
             Ok((
                 vaddr - PMEM_MAP_VADDR,
                 MMUFlags::READ | MMUFlags::WRITE,

linux-object/src/sync/semaphore.rs

@@ -72,7 +72,7 @@ impl Semaphore {
             inner: Arc<Mutex<SemaphoreInner>>,
         }
 
-        impl<'a> Future for SemaphoreFuture {
+        impl Future for SemaphoreFuture {
             type Output = Result<(), LxError>;
 
             fn poll(mut self: Pin<&mut Self>, cx: &mut Context) -> Poll<Self::Output> {
@@ -157,13 +157,13 @@ impl Semaphore {
     }
 }
 
-impl<'a> Drop for SemaphoreGuard<'a> {
+impl Drop for SemaphoreGuard<'_> {
     fn drop(&mut self) {
         self.sem.release();
     }
 }
 
-impl<'a> Deref for SemaphoreGuard<'a> {
+impl Deref for SemaphoreGuard<'_> {
     type Target = Semaphore;
 
     fn deref(&self) -> &Self::Target {

linux-syscall/src/ipc.rs

@@ -112,11 +112,11 @@ impl Syscall<'_> {
             }
             let sem = &sem_array[num as usize];
 
-            let _result = match op {
+            match op {
                 1 => sem.release(),
                 -1 => sem.acquire().await?,
                 _ => unimplemented!("Semaphore: semop.(Not 1/-1)"),
-            };
+            }
             sem.set_pid(self.zircon_process().id() as usize);
             if flags.contains(SemFlags::SEM_UNDO) {
                 self.linux_process().semaphores_add_undo(id, num, op);

zCore/src/main.rs

@@ -59,7 +59,9 @@ fn primary_main(config: kernel_hal::KernelConfig) {
 
 #[cfg(not(feature = "libos"))]
 fn secondary_main() -> ! {
-    while !STARTED.load(Ordering::SeqCst) {}
+    while !STARTED.load(Ordering::SeqCst) {
+        core::hint::spin_loop();
+    }
     // Don't print anything between previous line and next line.
     // Boot hart has initialized the UART chip, so we will use
     // UART for output instead of SBI, but the current HART is

zircon-syscall/src/channel.rs

@@ -234,15 +234,12 @@ impl Syscall<'_> {
         let mut ret: ZxResult = Ok(());
         for disposition in dispositions.iter_mut() {
             if let Ok((object, src_rights)) = proc.get_dyn_object_and_rights(disposition.handle) {
-                match handle_check(disposition, &object, src_rights, handle) {
-                    Err(e) => {
-                        disposition.result = e as _;
-                        if ret.is_ok() {
-                            ret = Err(e);
-                        }
+                if let Err(e) = handle_check(disposition, &object, src_rights, handle) {
+                    disposition.result = e as _;
+                    if ret.is_ok() {
+                        ret = Err(e);
                     }
-                    Ok(()) => (),
-                };
+                }
                 let new_rights = if disposition.rights != Rights::SAME_RIGHTS.bits() {
                     Rights::from_bits(disposition.rights).unwrap()
                 } else {