fix bugs in shown in 'cargo clippy --all-features'

This commit is contained in:
Yu Chen 2021-07-27 22:11:09 +08:00
parent d9e22795e5
commit 939b63f898
10 changed files with 19 additions and 19 deletions

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@ -189,7 +189,7 @@ impl LinuxProcess {
FileType::SymLink, FileType::SymLink,
))); )));
} }
let (fd_dir_path, fd_name) = split_path(&path); let (fd_dir_path, fd_name) = split_path(path);
if fd_dir_path == "/proc/self/fd" { if fd_dir_path == "/proc/self/fd" {
let fd = FileDesc::try_from(fd_name)?; let fd = FileDesc::try_from(fd_name)?;
let fd_path = &self.get_file(fd)?.path; let fd_path = &self.get_file(fd)?.path;

2
rboot

@ -1 +1 @@
Subproject commit 00416ef505784e88e56cf08d6e9f7c7a2a00be16 Subproject commit cea94e5c8f600ac86366539bd683bb17df993cfe

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@ -10,7 +10,7 @@ description = "Zircon kernel objects"
[features] [features]
aspace-separate = [] aspace-separate = []
elf = ["xmas-elf"] elf = ["xmas-elf"]
hypervisor = ["rvm"] #hypervisor = ["rvm"]
[dependencies] [dependencies]
bitflags = "1.2" bitflags = "1.2"
@ -25,7 +25,7 @@ xmas-elf = { version = "0.7", optional = true }
region-alloc = { git = "https://github.com/rzswh/region-allocator", rev = "122c7a71" } region-alloc = { git = "https://github.com/rzswh/region-allocator", rev = "122c7a71" }
lazy_static = { version = "1.4", features = ["spin_no_std" ] } lazy_static = { version = "1.4", features = ["spin_no_std" ] }
acpi = "1.1" acpi = "1.1"
rvm = { git = "https://github.com/rcore-os/RVM", rev = "382fc60", optional = true } #rvm = { git = "https://github.com/rcore-os/RVM", rev = "382fc60", optional = true }
[dev-dependencies] [dev-dependencies]
kernel-hal-unix = { path = "../kernel-hal-unix" } kernel-hal-unix = { path = "../kernel-hal-unix" }

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@ -177,7 +177,7 @@ impl PCIeBusDriver {
)?; )?;
self.foreach_root( self.foreach_root(
|root, _c| { |root, _c| {
root.base_upstream.scan_downstream(&self); root.base_upstream.scan_downstream(self);
true true
}, },
(), (),

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@ -404,7 +404,7 @@ impl PcieDeviceInner {
for c in self.caps.iter() { for c in self.caps.iter() {
if let PciCapability::Msi(std, msi) = c { if let PciCapability::Msi(std, msi) = c {
if std.is_valid() { if std.is_valid() {
return Some((&std, &msi)); return Some((std, msi));
} }
} }
} }
@ -414,7 +414,7 @@ impl PcieDeviceInner {
for c in self.caps.iter() { for c in self.caps.iter() {
if let PciCapability::Pcie(std, pcie) = c { if let PciCapability::Pcie(std, pcie) = c {
if std.is_valid() { if std.is_valid() {
return Some((&std, &pcie)); return Some((std, pcie));
} }
} }
} }
@ -647,7 +647,7 @@ impl PcieDevice {
pub fn allocate_bars(&self) -> ZxResult { pub fn allocate_bars(&self) -> ZxResult {
let mut inner = self.inner.lock(); let mut inner = self.inner.lock();
assert_eq!(inner.plugged_in, true); assert!(inner.plugged_in);
for i in 0..self.bar_count { for i in 0..self.bar_count {
let bar_info = &inner.bars[i]; let bar_info = &inner.bars[i];
if bar_info.size == 0 || bar_info.allocation.is_some() { if bar_info.size == 0 || bar_info.allocation.is_some() {
@ -1387,7 +1387,7 @@ impl PciBridge {
.set_super(Arc::downgrade(&(node.clone() as _))); .set_super(Arc::downgrade(&(node.clone() as _)));
node.base_upstream node.base_upstream
.set_super(Arc::downgrade(&(node.clone() as _))); .set_super(Arc::downgrade(&(node.clone() as _)));
node.init(&driver); node.init(driver);
node node
}) })
} }

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@ -162,7 +162,7 @@ impl Futex {
if !inner.woken { if !inner.woken {
let futex = inner.futex.clone(); let futex = inner.futex.clone();
let queue = &mut futex.inner.lock().waiter_queue; let queue = &mut futex.inner.lock().waiter_queue;
if let Some(pos) = queue.iter().position(|x| Arc::ptr_eq(&x, &self.waiter)) { if let Some(pos) = queue.iter().position(|x| Arc::ptr_eq(x, &self.waiter)) {
// Nobody cares about the order of queue, so just remove faster // Nobody cares about the order of queue, so just remove faster
queue.swap_remove_back(pos); queue.swap_remove_back(pos);
} }
@ -258,7 +258,7 @@ impl FutexInner {
.waiter_queue .waiter_queue
.iter() .iter()
.filter_map(|waiter| waiter.thread.as_ref()) .filter_map(|waiter| waiter.thread.as_ref())
.any(|thread| Arc::ptr_eq(&thread, new_owner)) .any(|thread| Arc::ptr_eq(thread, new_owner))
{ {
return false; return false;
} }

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@ -24,7 +24,7 @@ impl VmarExt for VmAddressRegion {
if ph.get_type().unwrap() != Type::Load { if ph.get_type().unwrap() != Type::Load {
continue; continue;
} }
let vmo = make_vmo(&elf, ph)?; let vmo = make_vmo(elf, ph)?;
let offset = ph.virtual_addr() as usize / PAGE_SIZE * PAGE_SIZE; let offset = ph.virtual_addr() as usize / PAGE_SIZE * PAGE_SIZE;
let flags = ph.flags().to_mmu_flags(); let flags = ph.flags().to_mmu_flags();
self.map_at(offset, vmo.clone(), 0, vmo.len(), flags)?; self.map_at(offset, vmo.clone(), 0, vmo.len(), flags)?;
@ -72,7 +72,7 @@ fn make_vmo(elf: &ElfFile, ph: ProgramHeader) -> ZxResult<Arc<VmObject>> {
let page_offset = ph.virtual_addr() as usize % PAGE_SIZE; let page_offset = ph.virtual_addr() as usize % PAGE_SIZE;
let pages = pages(ph.mem_size() as usize + page_offset); let pages = pages(ph.mem_size() as usize + page_offset);
let vmo = VmObject::new_paged(pages); let vmo = VmObject::new_paged(pages);
let data = match ph.get_data(&elf).unwrap() { let data = match ph.get_data(elf).unwrap() {
SegmentData::Undefined(data) => data, SegmentData::Undefined(data) => data,
_ => return Err(ZxError::INVALID_ARGS), _ => return Err(ZxError::INVALID_ARGS),
}; };

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@ -407,7 +407,7 @@ impl VmAddressRegion {
if !check_aligned(len, align) { if !check_aligned(len, align) {
Err(ZxError::INVALID_ARGS) Err(ZxError::INVALID_ARGS)
} else if let Some(offset) = offset { } else if let Some(offset) = offset {
if check_aligned(offset, align) && self.test_map(&inner, offset, len, align) { if check_aligned(offset, align) && self.test_map(inner, offset, len, align) {
Ok(offset) Ok(offset)
} else { } else {
Err(ZxError::INVALID_ARGS) Err(ZxError::INVALID_ARGS)
@ -415,7 +415,7 @@ impl VmAddressRegion {
} else if len > self.size { } else if len > self.size {
Err(ZxError::INVALID_ARGS) Err(ZxError::INVALID_ARGS)
} else { } else {
match self.find_free_area(&inner, 0, len, align) { match self.find_free_area(inner, 0, len, align) {
Some(offset) => Ok(offset), Some(offset) => Ok(offset),
None => Err(ZxError::NO_MEMORY), None => Err(ZxError::NO_MEMORY),
} }

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@ -280,7 +280,7 @@ fn handle_check(
Err(ZxError::ACCESS_DENIED) Err(ZxError::ACCESS_DENIED)
} else if disposition.handle == handle_value { } else if disposition.handle == handle_value {
Err(ZxError::NOT_SUPPORTED) Err(ZxError::NOT_SUPPORTED)
} else if disposition.type_ != 0 && disposition.type_ != obj_type(&object) { } else if disposition.type_ != 0 && disposition.type_ != obj_type(object) {
Err(ZxError::WRONG_TYPE) Err(ZxError::WRONG_TYPE)
} else if disposition.op != ZX_HANDLE_OP_MOVE && disposition.op != ZX_HANDLE_OP_DUP } else if disposition.op != ZX_HANDLE_OP_MOVE && disposition.op != ZX_HANDLE_OP_DUP
|| disposition.rights != Rights::SAME_RIGHTS.bits() || disposition.rights != Rights::SAME_RIGHTS.bits()
@ -326,7 +326,7 @@ static TESTS_ARGS: spin::Mutex<String> = spin::Mutex::new(String::new());
#[allow(clippy::naive_bytecount)] #[allow(clippy::naive_bytecount)]
fn hack_core_tests(handle: HandleValue, thread_name: &str, data: &mut Vec<u8>) { fn hack_core_tests(handle: HandleValue, thread_name: &str, data: &mut Vec<u8>) {
if handle == 3 && thread_name == "userboot" { if handle == 3 && thread_name == "userboot" {
let cmdline = core::str::from_utf8(&data).unwrap(); let cmdline = core::str::from_utf8(data).unwrap();
for kv in cmdline.split('\0') { for kv in cmdline.split('\0') {
if let Some(v) = kv.strip_prefix("core-tests=") { if let Some(v) = kv.strip_prefix("core-tests=") {
*TESTS_ARGS.lock() = format!("test\0-f\0{}\0", v.replace(',', ":")); *TESTS_ARGS.lock() = format!("test\0-f\0{}\0", v.replace(',', ":"));

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@ -91,7 +91,7 @@ impl Syscall<'_> {
let proc = self.thread.proc(); let proc = self.thread.proc();
let process = proc.get_object_with_rights::<Process>(proc_handle, Rights::WRITE)?; let process = proc.get_object_with_rights::<Process>(proc_handle, Rights::WRITE)?;
let thread = proc.get_object_with_rights::<Thread>(thread_handle, Rights::WRITE)?; let thread = proc.get_object_with_rights::<Thread>(thread_handle, Rights::WRITE)?;
if !Arc::ptr_eq(&thread.proc(), &process) { if !Arc::ptr_eq(thread.proc(), &process) {
return Err(ZxError::ACCESS_DENIED); return Err(ZxError::ACCESS_DENIED);
} }
let arg1 = if arg1_handle != INVALID_HANDLE { let arg1 = if arg1_handle != INVALID_HANDLE {
@ -222,7 +222,7 @@ impl Syscall<'_> {
info!("task.suspend_token: handle={:?}, token={:?}", handle, token); info!("task.suspend_token: handle={:?}, token={:?}", handle, token);
let proc = self.thread.proc(); let proc = self.thread.proc();
if let Ok(thread) = proc.get_object_with_rights::<Thread>(handle, Rights::WRITE) { if let Ok(thread) = proc.get_object_with_rights::<Thread>(handle, Rights::WRITE) {
if Arc::ptr_eq(&thread, &self.thread) { if Arc::ptr_eq(&thread, self.thread) {
return Err(ZxError::NOT_SUPPORTED); return Err(ZxError::NOT_SUPPORTED);
} }
if thread.state() == ThreadState::Dying || thread.state() == ThreadState::Dead { if thread.state() == ThreadState::Dying || thread.state() == ThreadState::Dead {