diff --git a/zircon-object/Cargo.toml b/zircon-object/Cargo.toml index 9f595da9..ff972e24 100644 --- a/zircon-object/Cargo.toml +++ b/zircon-object/Cargo.toml @@ -25,6 +25,7 @@ xmas-elf = { version = "0.7", optional = true } region-alloc = { git = "https://github.com/rzswh/region-allocator", rev = "122c7a71" } lazy_static = { version = "1.4", features = ["spin_no_std" ] } acpi = "1.1" +cfg-if = "1.0" #rvm = { git = "https://github.com/rcore-os/RVM", rev = "382fc60", optional = true } [dev-dependencies] diff --git a/zircon-object/src/dev/interrupt/mod.rs b/zircon-object/src/dev/interrupt/mod.rs index 4ce087ef..066a03f9 100644 --- a/zircon-object/src/dev/interrupt/mod.rs +++ b/zircon-object/src/dev/interrupt/mod.rs @@ -2,7 +2,7 @@ use { self::event_interrupt::*, self::pci_interrupt::*, self::virtual_interrupt::*, - super::IPciNode, + crate::dev::pci::IPciNode, crate::object::*, crate::signal::*, alloc::{boxed::Box, sync::Arc}, diff --git a/zircon-object/src/dev/interrupt/pci_interrupt.rs b/zircon-object/src/dev/interrupt/pci_interrupt.rs index 7c837cb3..0229f57d 100644 --- a/zircon-object/src/dev/interrupt/pci_interrupt.rs +++ b/zircon-object/src/dev/interrupt/pci_interrupt.rs @@ -1,4 +1,9 @@ -use {super::super::pci::PCIE_IRQRET_MASK, super::super::IPciNode, super::*, spin::Mutex}; +use alloc::{boxed::Box, sync::Arc}; +use spin::Mutex; + +use super::InterruptTrait; +use crate::dev::pci::{constants::PCIE_IRQRET_MASK, IPciNode}; +use crate::{ZxError, ZxResult}; pub struct PciInterrupt { device: Arc, diff --git a/zircon-object/src/dev/mod.rs b/zircon-object/src/dev/mod.rs index 5e55a74c..426e36af 100644 --- a/zircon-object/src/dev/mod.rs +++ b/zircon-object/src/dev/mod.rs @@ -1,11 +1,10 @@ //! Objects for Device Drivers. -use super::*; mod bti; mod interrupt; mod iommu; -mod pci; +pub mod pci; mod pmt; mod resource; -pub use self::{bti::*, interrupt::*, iommu::*, pci::*, pmt::*, resource::*}; +pub use self::{bti::*, interrupt::*, iommu::*, pmt::*, resource::*}; diff --git a/zircon-object/src/dev/pci/bus.rs b/zircon-object/src/dev/pci/bus.rs index 2798b0b3..8857bfb7 100644 --- a/zircon-object/src/dev/pci/bus.rs +++ b/zircon-object/src/dev/pci/bus.rs @@ -1,9 +1,18 @@ -use super::super::*; -use super::config::*; -use super::*; +use super::nodes::{ + IPciNode, PciNodeType, PciRoot, PcieBarInfo, PcieIrqMode, PcieIrqModeCaps, + SharedLegacyIrqHandler, +}; +use super::{ + config::PciConfig, constants::*, pci_init_args::PciIrqSwizzleLut, pio::pci_bdf_raw_addr, + MappedEcamRegion, PciAddrSpace, PciEcamRegion, +}; +use crate::dev::Interrupt; use crate::object::*; use crate::vm::{kernel_allocate_physical, CachePolicy, MMUFlags, PhysAddr, VirtAddr}; -use alloc::{collections::BTreeMap, sync::Arc, vec::Vec}; +use crate::ZxResult; + +use alloc::sync::{Arc, Weak}; +use alloc::{collections::BTreeMap, vec::Vec}; use core::cmp::min; use core::marker::{Send, Sync}; use lazy_static::*; diff --git a/zircon-object/src/dev/pci/caps.rs b/zircon-object/src/dev/pci/caps.rs index 1be86796..e0bf5847 100644 --- a/zircon-object/src/dev/pci/caps.rs +++ b/zircon-object/src/dev/pci/caps.rs @@ -1,6 +1,6 @@ -use super::super::{ZxError, ZxResult}; -use super::config::PciConfig; -use super::nodes::PcieDeviceType; +use super::{config::PciConfig, nodes::PcieDeviceType}; +use crate::{ZxError, ZxResult}; + use alloc::boxed::Box; use core::convert::TryFrom; use kernel_hal::InterruptManager; diff --git a/zircon-object/src/dev/pci/config.rs b/zircon-object/src/dev/pci/config.rs index ec1ec1fb..af08a9d3 100644 --- a/zircon-object/src/dev/pci/config.rs +++ b/zircon-object/src/dev/pci/config.rs @@ -1,5 +1,6 @@ -use super::*; -use numeric_enum_macro::*; +use super::pio::{pio_config_read_addr, pio_config_write_addr}; +use super::PciAddrSpace; +use numeric_enum_macro::numeric_enum; #[derive(Debug)] pub struct PciConfig { diff --git a/zircon-object/src/dev/pci/mod.rs b/zircon-object/src/dev/pci/mod.rs index 94a3608b..fdda451e 100644 --- a/zircon-object/src/dev/pci/mod.rs +++ b/zircon-object/src/dev/pci/mod.rs @@ -1,3 +1,5 @@ +#![allow(missing_docs)] + mod bus; mod caps; mod config; @@ -5,17 +7,11 @@ mod nodes; pub mod pci_init_args; mod pio; -use super::*; -use alloc::sync::*; -pub(crate) use nodes::*; -use pci_init_args::*; -use pio::*; - pub use self::bus::{ MmioPcieAddressProvider, PCIeBusDriver, PcieDeviceInfo, PcieDeviceKObject, PioPcieAddressProvider, }; -pub use self::nodes::PcieIrqMode; +pub use self::nodes::{IPciNode, PcieIrqMode}; pub use self::pio::{pio_config_read, pio_config_write}; /// Type of PCI address space. @@ -46,10 +42,8 @@ pub struct MappedEcamRegion { vaddr: u64, } -pub use constants::*; - #[allow(missing_docs)] -mod constants { +pub mod constants { pub const PCI_MAX_DEVICES_PER_BUS: usize = 32; pub const PCI_MAX_FUNCTIONS_PER_DEVICE: usize = 8; pub const PCI_MAX_LEGACY_IRQ_PINS: usize = 4; diff --git a/zircon-object/src/dev/pci/nodes.rs b/zircon-object/src/dev/pci/nodes.rs index 3232cd23..a6f4268a 100644 --- a/zircon-object/src/dev/pci/nodes.rs +++ b/zircon-object/src/dev/pci/nodes.rs @@ -1,12 +1,22 @@ #![allow(dead_code)] +#![allow(missing_docs)] -use super::{caps::*, config::*, *}; -use crate::vm::PAGE_SIZE; -use alloc::{boxed::Box, sync::*, vec::Vec}; +use super::caps::{ + PciCapAdvFeatures, PciCapPcie, PciCapability, PciCapabilityMsi, PciCapabilityStd, PciMsiBlock, +}; +use super::config::{ + PciConfig, PciReg16, PciReg32, PciReg8, PCIE_BASE_CONFIG_SIZE, PCIE_EXTENDED_CONFIG_SIZE, +}; +use super::constants::*; +use super::{bus::PCIeBusDriver, pci_init_args::PciIrqSwizzleLut}; +use crate::{vm::PAGE_SIZE, ZxError, ZxResult}; + +use alloc::sync::{Arc, Weak}; +use alloc::{boxed::Box, vec::Vec}; use kernel_hal::InterruptManager; -use numeric_enum_macro::*; +use numeric_enum_macro::numeric_enum; use region_alloc::RegionAllocator; -use spin::*; +use spin::{Mutex, MutexGuard}; numeric_enum! { #[repr(u8)] @@ -953,7 +963,7 @@ impl PcieDevice { })) } } - fn enable_msi_irq_mode(&self, inner: &mut MutexGuard, irq: u32) -> ZxResult { + fn enter_msi_irq_mode(&self, inner: &mut MutexGuard, irq: u32) -> ZxResult { let (_std, msi) = inner.msi().ok_or(ZxError::NOT_SUPPORTED)?; let initially_masked = if msi.has_pvm { self.cfg @@ -1134,7 +1144,7 @@ impl PcieDevice { inner.irq.legacy.shared_handler.add_device(inner.arc_self()); Ok(()) } - PcieIrqMode::Msi => self.enable_msi_irq_mode(&mut inner, irq_count), + PcieIrqMode::Msi => self.enter_msi_irq_mode(&mut inner, irq_count), PcieIrqMode::MsiX => Err(ZxError::NOT_SUPPORTED), _ => Err(ZxError::INVALID_ARGS), } diff --git a/zircon-object/src/dev/pci/pci_init_args.rs b/zircon-object/src/dev/pci/pci_init_args.rs index 56ce17eb..419d744e 100644 --- a/zircon-object/src/dev/pci/pci_init_args.rs +++ b/zircon-object/src/dev/pci/pci_init_args.rs @@ -3,6 +3,9 @@ //! //! reference: zircon/system/public/zircon/syscalls/pci.h +use super::constants::*; +use crate::{ZxError, ZxResult}; + #[repr(transparent)] #[derive(Clone, Copy)] pub struct PciIrqSwizzleLut( @@ -42,7 +45,6 @@ pub const PCI_INIT_ARG_MAX_SIZE: usize = core::mem::size_of::(); -use super::*; use kernel_hal::InterruptManager; impl PciInitArgsHeader { diff --git a/zircon-object/src/dev/pci/pio.rs b/zircon-object/src/dev/pci/pio.rs index f4fd9fde..75c4b5af 100644 --- a/zircon-object/src/dev/pci/pio.rs +++ b/zircon-object/src/dev/pci/pio.rs @@ -1,12 +1,6 @@ #![allow(missing_docs)] -use super::super::*; -use kernel_hal::{inpd, outpd}; -use spin::Mutex; -static PIO_LOCK: Mutex<()> = Mutex::new(()); -const PCI_CONFIG_ADDR: u16 = 0xcf8; -const PCI_CONFIG_DATA: u16 = 0xcfc; -const PCI_CONFIG_ENABLE: u32 = 1 << 31; +use crate::{ZxError, ZxResult}; /// Returns the BDF address without the bottom two bits masked off. pub fn pci_bdf_raw_addr(bus: u8, dev: u8, func: u8, offset: u8) -> u32 { @@ -16,21 +10,57 @@ pub fn pci_bdf_raw_addr(bus: u8, dev: u8, func: u8, offset: u8) -> u32 { | (offset as u32 & 0xff) // bits 7-2 reg, with bottom 2 bits as well } +cfg_if::cfg_if! { +if #[cfg(all(target_arch = "x86_64", target_os = "none"))] { + use kernel_hal::{inpd, outpd}; + use spin::Mutex; + + static PIO_LOCK: Mutex<()> = Mutex::new(()); + const PCI_CONFIG_ADDR: u16 = 0xcf8; + const PCI_CONFIG_DATA: u16 = 0xcfc; + const PCI_CONFIG_ENABLE: u32 = 1 << 31; + + pub fn pio_config_read_addr(addr: u32, width: usize) -> ZxResult { + let _lock = PIO_LOCK.lock(); + let shift = ((addr & 0x3) << 3) as usize; + if shift + width > 32 { + return Err(ZxError::INVALID_ARGS); + } + outpd(PCI_CONFIG_ADDR, (addr & !0x3) | PCI_CONFIG_ENABLE); + let tmp_val = u32::from_le(inpd(PCI_CONFIG_DATA)); + Ok((tmp_val >> shift) & (((1u64 << width) - 1) as u32)) + } + pub fn pio_config_write_addr(addr: u32, val: u32, width: usize) -> ZxResult { + let _lock = PIO_LOCK.lock(); + let shift = ((addr & 0x3) << 3) as usize; + if shift + width > 32 { + return Err(ZxError::INVALID_ARGS); + } + outpd(PCI_CONFIG_ADDR, (addr & !0x3) | PCI_CONFIG_ENABLE); + let width_mask = ((1u64 << width) - 1) as u32; + let val = val & width_mask; + let tmp_val = if width < 32 { + (u32::from_le(inpd(PCI_CONFIG_DATA)) & !(width_mask << shift)) | (val << shift) + } else { + val + }; + outpd(PCI_CONFIG_DATA, u32::to_le(tmp_val)); + Ok(()) + } +} else { + pub fn pio_config_read_addr(_addr: u32, _width: usize) -> ZxResult { + Err(ZxError::NOT_SUPPORTED) + } + pub fn pio_config_write_addr(_addr: u32, _val: u32, _width: usize) -> ZxResult { + Err(ZxError::NOT_SUPPORTED) + } +} +} // cfg_if! + pub fn pio_config_read(bus: u8, dev: u8, func: u8, offset: u8, width: usize) -> ZxResult { pio_config_read_addr(pci_bdf_raw_addr(bus, dev, func, offset), width) } -pub fn pio_config_read_addr(addr: u32, width: usize) -> ZxResult { - let _lock = PIO_LOCK.lock(); - let shift = ((addr & 0x3) << 3) as usize; - if shift + width > 32 { - return Err(ZxError::INVALID_ARGS); - } - outpd(PCI_CONFIG_ADDR, (addr & !0x3) | PCI_CONFIG_ENABLE); - let tmp_val = u32::from_le(inpd(PCI_CONFIG_DATA)); - Ok((tmp_val >> shift) & (((1u64 << width) - 1) as u32)) -} - pub fn pio_config_write( bus: u8, dev: u8, @@ -41,21 +71,3 @@ pub fn pio_config_write( ) -> ZxResult { pio_config_write_addr(pci_bdf_raw_addr(bus, dev, func, offset), val, width) } - -pub fn pio_config_write_addr(addr: u32, val: u32, width: usize) -> ZxResult { - let _lock = PIO_LOCK.lock(); - let shift = ((addr & 0x3) << 3) as usize; - if shift + width > 32 { - return Err(ZxError::INVALID_ARGS); - } - outpd(PCI_CONFIG_ADDR, (addr & !0x3) | PCI_CONFIG_ENABLE); - let width_mask = ((1u64 << width) - 1) as u32; - let val = val & width_mask; - let tmp_val = if width < 32 { - (u32::from_le(inpd(PCI_CONFIG_DATA)) & !(width_mask << shift)) | (val << shift) - } else { - val - }; - outpd(PCI_CONFIG_DATA, u32::to_le(tmp_val)); - Ok(()) -} diff --git a/zircon-syscall/Cargo.toml b/zircon-syscall/Cargo.toml index 6699d22f..59a7187a 100644 --- a/zircon-syscall/Cargo.toml +++ b/zircon-syscall/Cargo.toml @@ -22,4 +22,4 @@ numeric-enum-macro = "0.2" zircon-object = { path = "../zircon-object" } kernel-hal = { path = "../kernel-hal" } futures = { version = "0.3", default-features = false, features = ["alloc", "async-await"] } - +cfg-if = "1.0" diff --git a/zircon-syscall/src/ddk.rs b/zircon-syscall/src/ddk.rs index c2488b4f..3064a1b8 100644 --- a/zircon-syscall/src/ddk.rs +++ b/zircon-syscall/src/ddk.rs @@ -132,6 +132,7 @@ impl Syscall<'_> { } /// + #[allow(unused_variables, unused_mut)] pub fn sys_pc_firmware_tables( &self, resource: HandleValue, @@ -142,10 +143,16 @@ impl Syscall<'_> { let proc = self.thread.proc(); proc.get_object::(resource)? .validate(ResourceKind::ROOT)?; - let (acpi_rsdp, smbios) = kernel_hal::pc_firmware_tables(); - acpi_rsdp_ptr.write(acpi_rsdp)?; - smbios_ptr.write(smbios)?; - Ok(()) + cfg_if::cfg_if! { + if #[cfg(all(target_arch = "x86_64", target_os = "none"))] { + let (acpi_rsdp, smbios) = kernel_hal::pc_firmware_tables(); + acpi_rsdp_ptr.write(acpi_rsdp)?; + smbios_ptr.write(smbios)?; + Ok(()) + } else { + Err(ZxError::NOT_SUPPORTED) + } + } } /// Creates an interrupt object which represents a physical or virtual interrupt. diff --git a/zircon-syscall/src/lib.rs b/zircon-syscall/src/lib.rs index f1f83065..7a38f14d 100644 --- a/zircon-syscall/src/lib.rs +++ b/zircon-syscall/src/lib.rs @@ -322,7 +322,6 @@ impl Syscall<'_> { Sys::PCI_ADD_SUBTRACT_IO_RANGE => { self.sys_pci_add_subtract_io_range(a0 as _, a1 != 0, a2 as _, a3 as _, a4 != 0) } - #[cfg(target_arch = "x86_64")] Sys::PCI_CFG_PIO_RW => self.sys_pci_cfg_pio_rw( a0 as _, a1 as _, diff --git a/zircon-syscall/src/pci.rs b/zircon-syscall/src/pci.rs index 65ea8d81..df0866ab 100644 --- a/zircon-syscall/src/pci.rs +++ b/zircon-syscall/src/pci.rs @@ -1,7 +1,14 @@ use super::*; +use alloc::sync::Arc; use core::convert::TryFrom; use zircon_object::{ - dev::{pci_init_args::*, *}, + dev::pci::{ + constants::*, + pci_init_args::{PciInitArgsAddrWindows, PciInitArgsHeader, PCI_INIT_ARG_MAX_SIZE}, + MmioPcieAddressProvider, PCIeBusDriver, PciAddrSpace, PciEcamRegion, PcieDeviceInfo, + PcieDeviceKObject, PcieIrqMode, PioPcieAddressProvider, + }, + dev::{Resource, ResourceKind}, vm::{pages, VmObject}, }; @@ -33,8 +40,7 @@ impl Syscall<'_> { } } - #[allow(clippy::too_many_arguments)] - #[cfg(target_arch = "x86_64")] + #[allow(clippy::too_many_arguments, unused_variables, unused_mut)] pub fn sys_pci_cfg_pio_rw( &self, handle: HandleValue, @@ -50,17 +56,24 @@ impl Syscall<'_> { "pci.cfg_pio_rw: handle={:#x}, addr={:x}:{:x}:{:x}, offset={:#x}, width={:#x}, write={:#}", handle, bus, dev, func, offset, width, write ); - let proc = self.thread.proc(); - proc.get_object::(handle)? - .validate(ResourceKind::ROOT)?; - if write { - let value = value_ptr.read()?; - pio_config_write(bus, dev, func, offset, value, width)?; - } else { - let value = pio_config_read(bus, dev, func, offset, width)?; - value_ptr.write(value)?; + cfg_if::cfg_if! { + if #[cfg(all(target_arch = "x86_64", target_os = "none"))] { + use zircon_object::dev::pci::{pio_config_read, pio_config_write}; + let proc = self.thread.proc(); + proc.get_object::(handle)? + .validate(ResourceKind::ROOT)?; + if write { + let value = value_ptr.read()?; + pio_config_write(bus, dev, func, offset, value, width)?; + } else { + let value = pio_config_read(bus, dev, func, offset, width)?; + value_ptr.write(value)?; + } + Ok(()) + } else { + Err(ZxError::NOT_SUPPORTED) + } } - Ok(()) } // TODO: review