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Use multiclock mode in formal verification

This commit is contained in:
Jan Schiefer 2024-02-19 01:42:59 +01:00
parent 3b84555158
commit 4a441dd47a
1 changed files with 1 additions and 1 deletions
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2
hw/spinal/projectname/MyTopLevelFormal.scala
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@ -6,7 +6,7 @@ import spinal.core.formal._
// You need SymbiYosys to be installed. // You need SymbiYosys to be installed.
// See https://spinalhdl.github.io/SpinalDoc-RTD/master/SpinalHDL/Formal%20verification/index.html#installing-requirements // See https://spinalhdl.github.io/SpinalDoc-RTD/master/SpinalHDL/Formal%20verification/index.html#installing-requirements
object MyTopLevelFormal extends App { object MyTopLevelFormal extends App {
FormalConfig SpinalFormalConfig( _hasAsync = true )
.withBMC(10) .withBMC(10)
.doVerify(new Component { .doVerify(new Component {
val dut = FormalDut(MyTopLevel()) val dut = FormalDut(MyTopLevel())