Alexey Bataev 2f49163b33 [DAG]Introduce llvm::processShuffleMasks and use it for shuffles in DAG Type Legalizer. ... We can process the long shuffles (working across several actual vector registers) in the best way if we take the actual register represantion into account. We can build more correct representation of register shuffles, improve number of recognised buildvector sequences. Also, same function can be used to improve the cost model for the shuffles. in future patches. Part of D100486 Differential Revision: https://reviews.llvm.org/D115653		2022-04-20 05:32:56 -07:00
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Analysis	[IRSim] Ignore debug instructions when creating canonical numbering	2022-04-19 13:18:28 -05:00
Assembler	[DebugInfo] Add a TargetFuncName field in DISubprogram for	2022-04-15 16:38:23 -04:00
Bindings	[OCaml] Fix pass builder test	2022-04-19 18:34:53 +02:00
Bitcode	[AutoUpgrade] Don't lose attributes when upgrading mem intrinsics	2022-04-13 09:30:10 +00:00
BugPoint	…
CodeGen	[DAG]Introduce llvm::processShuffleMasks and use it for shuffles in DAG Type Legalizer.	2022-04-20 05:32:56 -07:00
DebugInfo	MachineModuleInfo: Don't allow dynamically setting DbgInfoAvailable	2022-04-19 21:08:37 -04:00
Demangle	…
Examples	…
ExecutionEngine	[JITLink] Suppress "symbols not found" errors for testcase.	2022-04-17 08:34:22 -07:00
Feature	[llvm-lto] Remove support for legacy pass manager	2022-04-11 09:40:17 +02:00
FileCheck	…
Instrumentation	[DFSan] Print an error before calling null extern_weak functions, incase dfsan instrumentation optimized out a null check.	2022-04-19 17:01:41 -07:00
Integer	…
JitListener	…
LTO	Support the min of module flags when linking, use for AArch64 BTI/PAC-RET	2022-04-13 09:31:51 +02:00
Linker	[Bitcode] materialize Functions early when BlockAddress taken	2022-04-12 11:38:35 -07:00
MC	[AMDGPU][MC] Corrected error message "image data size does not match dmask and tfe"	2022-04-19 13:52:58 +03:00
MachineVerifier	GlobalISel: Verify atomic load/store ordering restriction	2022-04-11 20:12:22 -04:00
Object	[AIX][XCOFF] print unsupported message for llvm-ar big archive write operation	2022-04-01 11:55:11 -04:00
ObjectYAML	…
Other	[Pipelines] Hoist CoroEarly as a module pass	2022-04-19 11:04:24 +08:00
SafepointIRVerifier	…
Support	…
SymbolRewriter	…
TableGen	…
ThinLTO/X86	[llvm-lto] Remove support for legacy pass manager	2022-04-11 09:40:17 +02:00
Transforms	[Test] One more test with potentially malformed phis	2022-04-20 15:50:27 +07:00
Unit	…
Verifier	Intrinsics: Mark llvm.eh.sjlj.callsite argument as immarg	2022-04-19 21:04:33 -04:00
YAMLParser	…
tools	TargetRegistry: Don't add "error" to error messages	2022-04-19 22:29:16 -04:00
.clang-format	…
CMakeLists.txt	Add DXIL Bitcode Writer and DXIL testing	2022-04-15 18:50:26 -05:00
TestRunner.sh	…
lit.cfg.py	Add DXIL Bitcode Writer and DXIL testing	2022-04-15 18:50:26 -05:00
lit.site.cfg.py.in	Add DXIL Bitcode Writer and DXIL testing	2022-04-15 18:50:26 -05:00