forked from OSchip/llvm-project
195 lines
11 KiB
LLVM
195 lines
11 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; This is the loop in c++ being vectorize in this file with
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;experimental.vector.reverse
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; #pragma clang loop vectorize_width(8, scalable)
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; for (int i = N-1; i >= 0; --i)
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; a[i] = b[i] + 1.0;
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; RUN: opt -loop-vectorize -dce -instcombine -mtriple aarch64-linux-gnu -S \
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; RUN: -prefer-predicate-over-epilogue=scalar-epilogue < %s | FileCheck %s
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define void @vector_reverse_f64(i64 %N, double* noalias %a, double* noalias %b) #0{
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; CHECK-LABEL: @vector_reverse_f64(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[CMP7:%.*]] = icmp sgt i64 [[N:%.*]], 0
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; CHECK-NEXT: br i1 [[CMP7]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_COND_CLEANUP:%.*]]
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; CHECK: for.body.preheader:
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; CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64()
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; CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[TMP0]], 3
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; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ugt i64 [[TMP1]], [[N]]
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; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
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; CHECK: vector.ph:
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; CHECK-NEXT: [[TMP2:%.*]] = call i64 @llvm.vscale.i64()
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; CHECK-NEXT: [[TMP3:%.*]] = shl i64 [[TMP2]], 3
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; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N]], [[TMP3]]
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; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[N]], [[N_MOD_VF]]
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; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
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; CHECK: vector.body:
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; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
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; CHECK-NEXT: [[TMP4:%.*]] = xor i64 [[INDEX]], -1
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; CHECK-NEXT: [[TMP5:%.*]] = add i64 [[TMP4]], [[N]]
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; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds double, double* [[B:%.*]], i64 [[TMP5]]
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; CHECK-NEXT: [[TMP7:%.*]] = call i32 @llvm.vscale.i32()
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; CHECK-NEXT: [[TMP8:%.*]] = shl i32 [[TMP7]], 3
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; CHECK-NEXT: [[TMP9:%.*]] = sub i32 1, [[TMP8]]
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; CHECK-NEXT: [[TMP10:%.*]] = sext i32 [[TMP9]] to i64
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; CHECK-NEXT: [[TMP11:%.*]] = getelementptr inbounds double, double* [[TMP6]], i64 [[TMP10]]
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; CHECK-NEXT: [[TMP12:%.*]] = bitcast double* [[TMP11]] to <vscale x 8 x double>*
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; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <vscale x 8 x double>, <vscale x 8 x double>* [[TMP12]], align 8
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; CHECK-NEXT: [[TMP13:%.*]] = getelementptr inbounds double, double* [[A:%.*]], i64 [[TMP5]]
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; CHECK-NEXT: [[TMP14:%.*]] = fadd <vscale x 8 x double> [[WIDE_LOAD]], shufflevector (<vscale x 8 x double> insertelement (<vscale x 8 x double> poison, double 1.000000e+00, i32 0), <vscale x 8 x double> poison, <vscale x 8 x i32> zeroinitializer)
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; CHECK-NEXT: [[TMP15:%.*]] = call i32 @llvm.vscale.i32()
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; CHECK-NEXT: [[TMP16:%.*]] = shl i32 [[TMP15]], 3
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; CHECK-NEXT: [[TMP17:%.*]] = sub i32 1, [[TMP16]]
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; CHECK-NEXT: [[TMP18:%.*]] = sext i32 [[TMP17]] to i64
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; CHECK-NEXT: [[TMP19:%.*]] = getelementptr inbounds double, double* [[TMP13]], i64 [[TMP18]]
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; CHECK-NEXT: [[TMP20:%.*]] = bitcast double* [[TMP19]] to <vscale x 8 x double>*
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; CHECK-NEXT: store <vscale x 8 x double> [[TMP14]], <vscale x 8 x double>* [[TMP20]], align 8
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; CHECK-NEXT: [[TMP21:%.*]] = call i64 @llvm.vscale.i64()
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; CHECK-NEXT: [[TMP22:%.*]] = shl i64 [[TMP21]], 3
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; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP22]]
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; CHECK-NEXT: [[TMP23:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
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; CHECK-NEXT: br i1 [[TMP23]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
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; CHECK: middle.block:
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; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N_MOD_VF]], 0
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; CHECK-NEXT: br i1 [[CMP_N]], label [[FOR_COND_CLEANUP_LOOPEXIT:%.*]], label [[SCALAR_PH]]
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; CHECK: scalar.ph:
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; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_MOD_VF]], [[MIDDLE_BLOCK]] ], [ [[N]], [[FOR_BODY_PREHEADER]] ]
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; CHECK-NEXT: br label [[FOR_BODY:%.*]]
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; CHECK: for.cond.cleanup.loopexit:
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; CHECK-NEXT: br label [[FOR_COND_CLEANUP]]
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; CHECK: for.cond.cleanup:
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; CHECK-NEXT: ret void
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; CHECK: for.body:
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; CHECK-NEXT: [[I_08_IN:%.*]] = phi i64 [ [[I_08:%.*]], [[FOR_BODY]] ], [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ]
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; CHECK-NEXT: [[I_08]] = add nsw i64 [[I_08_IN]], -1
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; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[B]], i64 [[I_08]]
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; CHECK-NEXT: [[TMP24:%.*]] = load double, double* [[ARRAYIDX]], align 8
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; CHECK-NEXT: [[ADD:%.*]] = fadd double [[TMP24]], 1.000000e+00
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; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds double, double* [[A]], i64 [[I_08]]
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; CHECK-NEXT: store double [[ADD]], double* [[ARRAYIDX1]], align 8
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; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i64 [[I_08_IN]], 1
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; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP_LOOPEXIT]], !llvm.loop [[LOOP3:![0-9]+]]
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;
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entry:
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%cmp7 = icmp sgt i64 %N, 0
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br i1 %cmp7, label %for.body, label %for.cond.cleanup
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for.cond.cleanup: ; preds = %for.body
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ret void
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for.body: ; preds = %entry, %for.body
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%i.08.in = phi i64 [ %i.08, %for.body ], [ %N, %entry ]
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%i.08 = add nsw i64 %i.08.in, -1
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%arrayidx = getelementptr inbounds double, double* %b, i64 %i.08
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%0 = load double, double* %arrayidx, align 8
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%add = fadd double %0, 1.000000e+00
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%arrayidx1 = getelementptr inbounds double, double* %a, i64 %i.08
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store double %add, double* %arrayidx1, align 8
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%cmp = icmp sgt i64 %i.08.in, 1
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br i1 %cmp, label %for.body, label %for.cond.cleanup, !llvm.loop !0
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}
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define void @vector_reverse_i64(i64 %N, i64* %a, i64* %b) #0 {
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; CHECK-LABEL: @vector_reverse_i64(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[A2:%.*]] = ptrtoint i64* [[A:%.*]] to i64
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; CHECK-NEXT: [[B1:%.*]] = ptrtoint i64* [[B:%.*]] to i64
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; CHECK-NEXT: [[CMP8:%.*]] = icmp sgt i64 [[N:%.*]], 0
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; CHECK-NEXT: br i1 [[CMP8]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_COND_CLEANUP:%.*]]
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; CHECK: for.body.preheader:
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; CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64()
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; CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[TMP0]], 3
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; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ugt i64 [[TMP1]], [[N]]
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; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_MEMCHECK:%.*]]
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; CHECK: vector.memcheck:
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; CHECK-NEXT: [[TMP2:%.*]] = call i64 @llvm.vscale.i64()
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; CHECK-NEXT: [[TMP3:%.*]] = shl i64 [[TMP2]], 6
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; CHECK-NEXT: [[TMP4:%.*]] = shl i64 [[N]], 3
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; CHECK-NEXT: [[TMP5:%.*]] = add i64 [[TMP4]], [[B1]]
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; CHECK-NEXT: [[TMP6:%.*]] = add i64 [[TMP4]], [[A2]]
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; CHECK-NEXT: [[TMP7:%.*]] = sub i64 [[TMP5]], [[TMP6]]
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; CHECK-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP7]], [[TMP3]]
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; CHECK-NEXT: br i1 [[DIFF_CHECK]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]]
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; CHECK: vector.ph:
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; CHECK-NEXT: [[TMP8:%.*]] = call i64 @llvm.vscale.i64()
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; CHECK-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 3
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; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N]], [[TMP9]]
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; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[N]], [[N_MOD_VF]]
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; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
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; CHECK: vector.body:
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; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
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; CHECK-NEXT: [[TMP10:%.*]] = xor i64 [[INDEX]], -1
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; CHECK-NEXT: [[TMP11:%.*]] = add i64 [[TMP10]], [[N]]
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; CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds i64, i64* [[B]], i64 [[TMP11]]
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; CHECK-NEXT: [[TMP13:%.*]] = call i32 @llvm.vscale.i32()
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; CHECK-NEXT: [[TMP14:%.*]] = shl i32 [[TMP13]], 3
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; CHECK-NEXT: [[TMP15:%.*]] = sub i32 1, [[TMP14]]
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; CHECK-NEXT: [[TMP16:%.*]] = sext i32 [[TMP15]] to i64
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; CHECK-NEXT: [[TMP17:%.*]] = getelementptr inbounds i64, i64* [[TMP12]], i64 [[TMP16]]
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; CHECK-NEXT: [[TMP18:%.*]] = bitcast i64* [[TMP17]] to <vscale x 8 x i64>*
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; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <vscale x 8 x i64>, <vscale x 8 x i64>* [[TMP18]], align 8
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; CHECK-NEXT: [[TMP19:%.*]] = getelementptr inbounds i64, i64* [[A]], i64 [[TMP11]]
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; CHECK-NEXT: [[TMP20:%.*]] = add <vscale x 8 x i64> [[WIDE_LOAD]], shufflevector (<vscale x 8 x i64> insertelement (<vscale x 8 x i64> poison, i64 1, i32 0), <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer)
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; CHECK-NEXT: [[TMP21:%.*]] = call i32 @llvm.vscale.i32()
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; CHECK-NEXT: [[TMP22:%.*]] = shl i32 [[TMP21]], 3
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; CHECK-NEXT: [[TMP23:%.*]] = sub i32 1, [[TMP22]]
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; CHECK-NEXT: [[TMP24:%.*]] = sext i32 [[TMP23]] to i64
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; CHECK-NEXT: [[TMP25:%.*]] = getelementptr inbounds i64, i64* [[TMP19]], i64 [[TMP24]]
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; CHECK-NEXT: [[TMP26:%.*]] = bitcast i64* [[TMP25]] to <vscale x 8 x i64>*
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; CHECK-NEXT: store <vscale x 8 x i64> [[TMP20]], <vscale x 8 x i64>* [[TMP26]], align 8
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; CHECK-NEXT: [[TMP27:%.*]] = call i64 @llvm.vscale.i64()
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; CHECK-NEXT: [[TMP28:%.*]] = shl i64 [[TMP27]], 3
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; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP28]]
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; CHECK-NEXT: [[TMP29:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
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; CHECK-NEXT: br i1 [[TMP29]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]]
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; CHECK: middle.block:
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; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N_MOD_VF]], 0
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; CHECK-NEXT: br i1 [[CMP_N]], label [[FOR_COND_CLEANUP_LOOPEXIT:%.*]], label [[SCALAR_PH]]
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; CHECK: scalar.ph:
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; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_MOD_VF]], [[MIDDLE_BLOCK]] ], [ [[N]], [[FOR_BODY_PREHEADER]] ], [ [[N]], [[VECTOR_MEMCHECK]] ]
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; CHECK-NEXT: br label [[FOR_BODY:%.*]]
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; CHECK: for.cond.cleanup.loopexit:
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; CHECK-NEXT: br label [[FOR_COND_CLEANUP]]
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; CHECK: for.cond.cleanup:
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; CHECK-NEXT: ret void
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; CHECK: for.body:
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; CHECK-NEXT: [[I_09_IN:%.*]] = phi i64 [ [[I_09:%.*]], [[FOR_BODY]] ], [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ]
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; CHECK-NEXT: [[I_09]] = add nsw i64 [[I_09_IN]], -1
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; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i64, i64* [[B]], i64 [[I_09]]
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; CHECK-NEXT: [[TMP30:%.*]] = load i64, i64* [[ARRAYIDX]], align 8
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; CHECK-NEXT: [[ADD:%.*]] = add i64 [[TMP30]], 1
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; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i64, i64* [[A]], i64 [[I_09]]
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; CHECK-NEXT: store i64 [[ADD]], i64* [[ARRAYIDX2]], align 8
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; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i64 [[I_09_IN]], 1
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; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP_LOOPEXIT]], !llvm.loop [[LOOP6:![0-9]+]]
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;
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entry:
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%cmp8 = icmp sgt i64 %N, 0
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br i1 %cmp8, label %for.body, label %for.cond.cleanup
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for.cond.cleanup: ; preds = %for.body
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ret void
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for.body: ; preds = %entry, %for.body
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%i.09.in = phi i64 [ %i.09, %for.body ], [ %N, %entry ]
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%i.09 = add nsw i64 %i.09.in, -1
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%arrayidx = getelementptr inbounds i64, i64* %b, i64 %i.09
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%0 = load i64, i64* %arrayidx, align 8
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%add = add i64 %0, 1
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%arrayidx2 = getelementptr inbounds i64, i64* %a, i64 %i.09
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store i64 %add, i64* %arrayidx2, align 8
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%cmp = icmp sgt i64 %i.09.in, 1
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br i1 %cmp, label %for.body, label %for.cond.cleanup, !llvm.loop !0
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}
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attributes #0 = { "target-cpu"="generic" "target-features"="+neon,+sve" }
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!0 = distinct !{!0, !1, !2, !3, !4}
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!1 = !{!"llvm.loop.mustprogress"}
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!2 = !{!"llvm.loop.vectorize.width", i32 8}
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!3 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
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!4 = !{!"llvm.loop.vectorize.enable", i1 true}
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