forked from OSchip/llvm-project
431 lines
11 KiB
LLVM
431 lines
11 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -verify-machineinstrs -csky-no-aliases -mattr=+e2 -mattr=+2e3 < %s -mtriple=csky | FileCheck %s
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; RUN: llc -verify-machineinstrs -csky-no-aliases < %s -mtriple=csky | FileCheck %s --check-prefix=GENERIC
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; i32/i16/i8/i1 --> i64
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define i64 @zextR_i64_0(i32 %x) {
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; CHECK-LABEL: zextR_i64_0:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: movi16 a1, 0
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; CHECK-NEXT: rts16
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;
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; GENERIC-LABEL: zextR_i64_0:
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; GENERIC: # %bb.0: # %entry
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; GENERIC-NEXT: .cfi_def_cfa_offset 0
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; GENERIC-NEXT: subi16 sp, sp, 4
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; GENERIC-NEXT: .cfi_def_cfa_offset 4
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; GENERIC-NEXT: movi16 a1, 0
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; GENERIC-NEXT: addi16 sp, sp, 4
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; GENERIC-NEXT: rts16
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entry:
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%zext = zext i32 %x to i64
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ret i64 %zext
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}
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define i64 @zextR_i64_1(i16 %x) {
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; CHECK-LABEL: zextR_i64_1:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: zexth16 a0, a0
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; CHECK-NEXT: movi16 a1, 0
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; CHECK-NEXT: rts16
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;
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; GENERIC-LABEL: zextR_i64_1:
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; GENERIC: # %bb.0: # %entry
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; GENERIC-NEXT: .cfi_def_cfa_offset 0
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; GENERIC-NEXT: subi16 sp, sp, 4
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; GENERIC-NEXT: .cfi_def_cfa_offset 4
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; GENERIC-NEXT: movi16 a1, 0
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; GENERIC-NEXT: lsli16 a2, a1, 24
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; GENERIC-NEXT: lsli16 a1, a1, 16
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; GENERIC-NEXT: or16 a1, a2
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; GENERIC-NEXT: movi16 a2, 255
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; GENERIC-NEXT: lsli16 a3, a2, 8
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; GENERIC-NEXT: or16 a3, a1
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; GENERIC-NEXT: or16 a3, a2
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; GENERIC-NEXT: and16 a0, a3
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; GENERIC-NEXT: movi16 a1, 0
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; GENERIC-NEXT: addi16 sp, sp, 4
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; GENERIC-NEXT: rts16
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entry:
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%zext = zext i16 %x to i64
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ret i64 %zext
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}
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define i64 @zextR_i64_2(i8 %x) {
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; CHECK-LABEL: zextR_i64_2:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: zextb16 a0, a0
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; CHECK-NEXT: movi16 a1, 0
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; CHECK-NEXT: rts16
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;
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; GENERIC-LABEL: zextR_i64_2:
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; GENERIC: # %bb.0: # %entry
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; GENERIC-NEXT: .cfi_def_cfa_offset 0
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; GENERIC-NEXT: subi16 sp, sp, 4
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; GENERIC-NEXT: .cfi_def_cfa_offset 4
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; GENERIC-NEXT: movi16 a1, 255
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; GENERIC-NEXT: and16 a0, a1
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; GENERIC-NEXT: movi16 a1, 0
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; GENERIC-NEXT: addi16 sp, sp, 4
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; GENERIC-NEXT: rts16
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entry:
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%zext = zext i8 %x to i64
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ret i64 %zext
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}
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define i64 @zextR_i64_3(i1 %x) {
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; CHECK-LABEL: zextR_i64_3:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: andi32 a0, a0, 1
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; CHECK-NEXT: movi16 a1, 0
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; CHECK-NEXT: rts16
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;
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; GENERIC-LABEL: zextR_i64_3:
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; GENERIC: # %bb.0: # %entry
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; GENERIC-NEXT: .cfi_def_cfa_offset 0
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; GENERIC-NEXT: subi16 sp, sp, 4
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; GENERIC-NEXT: .cfi_def_cfa_offset 4
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; GENERIC-NEXT: movi16 a1, 1
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; GENERIC-NEXT: and16 a0, a1
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; GENERIC-NEXT: movi16 a1, 0
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; GENERIC-NEXT: addi16 sp, sp, 4
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; GENERIC-NEXT: rts16
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entry:
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%zext = zext i1 %x to i64
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ret i64 %zext
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}
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; i16/i8/i1 --> i32
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define i32 @zextR_i32_1(i16 %x) {
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; CHECK-LABEL: zextR_i32_1:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: zexth16 a0, a0
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; CHECK-NEXT: rts16
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;
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; GENERIC-LABEL: zextR_i32_1:
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; GENERIC: # %bb.0: # %entry
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; GENERIC-NEXT: .cfi_def_cfa_offset 0
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; GENERIC-NEXT: subi16 sp, sp, 4
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; GENERIC-NEXT: .cfi_def_cfa_offset 4
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; GENERIC-NEXT: movi16 a1, 0
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; GENERIC-NEXT: lsli16 a2, a1, 24
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; GENERIC-NEXT: lsli16 a1, a1, 16
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; GENERIC-NEXT: or16 a1, a2
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; GENERIC-NEXT: movi16 a2, 255
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; GENERIC-NEXT: lsli16 a3, a2, 8
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; GENERIC-NEXT: or16 a3, a1
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; GENERIC-NEXT: or16 a3, a2
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; GENERIC-NEXT: and16 a0, a3
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; GENERIC-NEXT: addi16 sp, sp, 4
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; GENERIC-NEXT: rts16
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entry:
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%zext = zext i16 %x to i32
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ret i32 %zext
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}
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define i32 @zextR_i32_2(i8 %x) {
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; CHECK-LABEL: zextR_i32_2:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: zextb16 a0, a0
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; CHECK-NEXT: rts16
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;
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; GENERIC-LABEL: zextR_i32_2:
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; GENERIC: # %bb.0: # %entry
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; GENERIC-NEXT: .cfi_def_cfa_offset 0
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; GENERIC-NEXT: subi16 sp, sp, 4
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; GENERIC-NEXT: .cfi_def_cfa_offset 4
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; GENERIC-NEXT: movi16 a1, 255
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; GENERIC-NEXT: and16 a0, a1
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; GENERIC-NEXT: addi16 sp, sp, 4
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; GENERIC-NEXT: rts16
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entry:
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%zext = zext i8 %x to i32
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ret i32 %zext
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}
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define i32 @zextR_i32_3(i1 %x) {
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; CHECK-LABEL: zextR_i32_3:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: andi32 a0, a0, 1
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; CHECK-NEXT: rts16
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;
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; GENERIC-LABEL: zextR_i32_3:
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; GENERIC: # %bb.0: # %entry
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; GENERIC-NEXT: .cfi_def_cfa_offset 0
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; GENERIC-NEXT: subi16 sp, sp, 4
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; GENERIC-NEXT: .cfi_def_cfa_offset 4
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; GENERIC-NEXT: movi16 a1, 1
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; GENERIC-NEXT: and16 a0, a1
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; GENERIC-NEXT: addi16 sp, sp, 4
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; GENERIC-NEXT: rts16
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entry:
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%zext = zext i1 %x to i32
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ret i32 %zext
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}
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; i8/i1 --> i16
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define i16 @zextR_i16_2(i8 %x) {
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; CHECK-LABEL: zextR_i16_2:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: zextb16 a0, a0
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; CHECK-NEXT: rts16
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;
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; GENERIC-LABEL: zextR_i16_2:
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; GENERIC: # %bb.0: # %entry
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; GENERIC-NEXT: .cfi_def_cfa_offset 0
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; GENERIC-NEXT: subi16 sp, sp, 4
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; GENERIC-NEXT: .cfi_def_cfa_offset 4
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; GENERIC-NEXT: movi16 a1, 255
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; GENERIC-NEXT: and16 a0, a1
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; GENERIC-NEXT: addi16 sp, sp, 4
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; GENERIC-NEXT: rts16
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entry:
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%zext = zext i8 %x to i16
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ret i16 %zext
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}
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define i16 @zextR_i16_3(i1 %x) {
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; CHECK-LABEL: zextR_i16_3:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: andi32 a0, a0, 1
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; CHECK-NEXT: rts16
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;
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; GENERIC-LABEL: zextR_i16_3:
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; GENERIC: # %bb.0: # %entry
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; GENERIC-NEXT: .cfi_def_cfa_offset 0
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; GENERIC-NEXT: subi16 sp, sp, 4
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; GENERIC-NEXT: .cfi_def_cfa_offset 4
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; GENERIC-NEXT: movi16 a1, 1
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; GENERIC-NEXT: and16 a0, a1
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; GENERIC-NEXT: addi16 sp, sp, 4
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; GENERIC-NEXT: rts16
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entry:
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%zext = zext i1 %x to i16
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ret i16 %zext
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}
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;i1 --> i8
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define i8 @zextR_i8_3(i1 %x) {
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; CHECK-LABEL: zextR_i8_3:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: andi32 a0, a0, 1
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; CHECK-NEXT: rts16
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;
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; GENERIC-LABEL: zextR_i8_3:
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; GENERIC: # %bb.0: # %entry
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; GENERIC-NEXT: .cfi_def_cfa_offset 0
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; GENERIC-NEXT: subi16 sp, sp, 4
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; GENERIC-NEXT: .cfi_def_cfa_offset 4
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; GENERIC-NEXT: movi16 a1, 1
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; GENERIC-NEXT: and16 a0, a1
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; GENERIC-NEXT: addi16 sp, sp, 4
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; GENERIC-NEXT: rts16
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entry:
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%zext = zext i1 %x to i8
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ret i8 %zext
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}
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; i32/i16/i8/i1 --> i64
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define i64 @sextR_i64_0(i32 %x) {
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; CHECK-LABEL: sextR_i64_0:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: asri16 a1, a0, 31
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; CHECK-NEXT: rts16
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;
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; GENERIC-LABEL: sextR_i64_0:
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; GENERIC: # %bb.0: # %entry
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; GENERIC-NEXT: .cfi_def_cfa_offset 0
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; GENERIC-NEXT: subi16 sp, sp, 4
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; GENERIC-NEXT: .cfi_def_cfa_offset 4
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; GENERIC-NEXT: asri16 a1, a0, 31
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; GENERIC-NEXT: addi16 sp, sp, 4
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; GENERIC-NEXT: rts16
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entry:
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%sext = sext i32 %x to i64
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ret i64 %sext
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}
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define i64 @sextR_i64_1(i16 %x) {
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; CHECK-LABEL: sextR_i64_1:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: sexth16 a0, a0
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; CHECK-NEXT: asri16 a1, a0, 31
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; CHECK-NEXT: rts16
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;
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; GENERIC-LABEL: sextR_i64_1:
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; GENERIC: # %bb.0: # %entry
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; GENERIC-NEXT: .cfi_def_cfa_offset 0
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; GENERIC-NEXT: subi16 sp, sp, 4
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; GENERIC-NEXT: .cfi_def_cfa_offset 4
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; GENERIC-NEXT: sexth16 a0, a0
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; GENERIC-NEXT: asri16 a1, a0, 31
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; GENERIC-NEXT: addi16 sp, sp, 4
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; GENERIC-NEXT: rts16
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entry:
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%sext = sext i16 %x to i64
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ret i64 %sext
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}
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define i64 @sextR_i64_2(i8 %x) {
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; CHECK-LABEL: sextR_i64_2:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: sextb16 a0, a0
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; CHECK-NEXT: asri16 a1, a0, 31
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; CHECK-NEXT: rts16
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;
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; GENERIC-LABEL: sextR_i64_2:
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; GENERIC: # %bb.0: # %entry
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; GENERIC-NEXT: .cfi_def_cfa_offset 0
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; GENERIC-NEXT: subi16 sp, sp, 4
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; GENERIC-NEXT: .cfi_def_cfa_offset 4
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; GENERIC-NEXT: sextb16 a0, a0
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; GENERIC-NEXT: asri16 a1, a0, 31
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; GENERIC-NEXT: addi16 sp, sp, 4
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; GENERIC-NEXT: rts16
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entry:
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%sext = sext i8 %x to i64
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ret i64 %sext
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}
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define i64 @sextR_i64_3(i1 %x) {
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; CHECK-LABEL: sextR_i64_3:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: sext32 a0, a0, 0, 0
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; CHECK-NEXT: mov16 a1, a0
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; CHECK-NEXT: rts16
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;
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; GENERIC-LABEL: sextR_i64_3:
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; GENERIC: # %bb.0: # %entry
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; GENERIC-NEXT: .cfi_def_cfa_offset 0
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; GENERIC-NEXT: subi16 sp, sp, 4
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; GENERIC-NEXT: .cfi_def_cfa_offset 4
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; GENERIC-NEXT: lsli16 a0, a0, 7
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; GENERIC-NEXT: asri16 a0, a0, 7
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; GENERIC-NEXT: mov16 a1, a0
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; GENERIC-NEXT: addi16 sp, sp, 4
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; GENERIC-NEXT: rts16
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entry:
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%sext = sext i1 %x to i64
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ret i64 %sext
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}
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; i16/i8/i1 --> i32
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define i32 @sextR_i32_1(i16 %x) {
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; CHECK-LABEL: sextR_i32_1:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: sexth16 a0, a0
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; CHECK-NEXT: rts16
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;
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; GENERIC-LABEL: sextR_i32_1:
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; GENERIC: # %bb.0: # %entry
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; GENERIC-NEXT: .cfi_def_cfa_offset 0
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; GENERIC-NEXT: subi16 sp, sp, 4
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; GENERIC-NEXT: .cfi_def_cfa_offset 4
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; GENERIC-NEXT: sexth16 a0, a0
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; GENERIC-NEXT: addi16 sp, sp, 4
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; GENERIC-NEXT: rts16
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entry:
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%sext = sext i16 %x to i32
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ret i32 %sext
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}
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define i32 @sextR_i32_2(i8 %x) {
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; CHECK-LABEL: sextR_i32_2:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: sextb16 a0, a0
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; CHECK-NEXT: rts16
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;
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; GENERIC-LABEL: sextR_i32_2:
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; GENERIC: # %bb.0: # %entry
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; GENERIC-NEXT: .cfi_def_cfa_offset 0
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; GENERIC-NEXT: subi16 sp, sp, 4
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; GENERIC-NEXT: .cfi_def_cfa_offset 4
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; GENERIC-NEXT: sextb16 a0, a0
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; GENERIC-NEXT: addi16 sp, sp, 4
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; GENERIC-NEXT: rts16
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entry:
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%sext = sext i8 %x to i32
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ret i32 %sext
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}
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define i32 @sextR_i32_3(i1 %x) {
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; CHECK-LABEL: sextR_i32_3:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: sext32 a0, a0, 0, 0
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; CHECK-NEXT: rts16
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;
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; GENERIC-LABEL: sextR_i32_3:
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; GENERIC: # %bb.0: # %entry
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; GENERIC-NEXT: .cfi_def_cfa_offset 0
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; GENERIC-NEXT: subi16 sp, sp, 4
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; GENERIC-NEXT: .cfi_def_cfa_offset 4
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; GENERIC-NEXT: lsli16 a0, a0, 7
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; GENERIC-NEXT: asri16 a0, a0, 7
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; GENERIC-NEXT: addi16 sp, sp, 4
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; GENERIC-NEXT: rts16
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entry:
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%sext = sext i1 %x to i32
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ret i32 %sext
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}
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; i8/i1 --> i16
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define i16 @sextR_i16_2(i8 %x) {
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; CHECK-LABEL: sextR_i16_2:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: sextb16 a0, a0
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; CHECK-NEXT: rts16
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;
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; GENERIC-LABEL: sextR_i16_2:
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; GENERIC: # %bb.0: # %entry
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; GENERIC-NEXT: .cfi_def_cfa_offset 0
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; GENERIC-NEXT: subi16 sp, sp, 4
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; GENERIC-NEXT: .cfi_def_cfa_offset 4
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; GENERIC-NEXT: sextb16 a0, a0
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; GENERIC-NEXT: addi16 sp, sp, 4
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; GENERIC-NEXT: rts16
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entry:
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%sext = sext i8 %x to i16
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ret i16 %sext
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}
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define i16 @sextR_i16_3(i1 %x) {
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; CHECK-LABEL: sextR_i16_3:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: sext32 a0, a0, 0, 0
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; CHECK-NEXT: rts16
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;
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; GENERIC-LABEL: sextR_i16_3:
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; GENERIC: # %bb.0: # %entry
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; GENERIC-NEXT: .cfi_def_cfa_offset 0
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; GENERIC-NEXT: subi16 sp, sp, 4
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; GENERIC-NEXT: .cfi_def_cfa_offset 4
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; GENERIC-NEXT: lsli16 a0, a0, 7
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; GENERIC-NEXT: asri16 a0, a0, 7
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; GENERIC-NEXT: addi16 sp, sp, 4
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; GENERIC-NEXT: rts16
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entry:
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%sext = sext i1 %x to i16
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ret i16 %sext
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}
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;i1 --> i8
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define i8 @sextR_i8_3(i1 %x) {
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; CHECK-LABEL: sextR_i8_3:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: sext32 a0, a0, 0, 0
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; CHECK-NEXT: rts16
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;
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; GENERIC-LABEL: sextR_i8_3:
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; GENERIC: # %bb.0: # %entry
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; GENERIC-NEXT: .cfi_def_cfa_offset 0
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; GENERIC-NEXT: subi16 sp, sp, 4
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; GENERIC-NEXT: .cfi_def_cfa_offset 4
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; GENERIC-NEXT: lsli16 a0, a0, 7
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; GENERIC-NEXT: asri16 a0, a0, 7
|
|
; GENERIC-NEXT: addi16 sp, sp, 4
|
|
; GENERIC-NEXT: rts16
|
|
entry:
|
|
%sext = sext i1 %x to i8
|
|
ret i8 %sext
|
|
}
|