forked from OSchip/llvm-project
22 lines
943 B
LLVM
22 lines
943 B
LLVM
; RUN: llc -global-isel=0 -march=amdgcn -mcpu=bonaire -stop-before=machine-scheduler < %s | FileCheck -enable-var-scope -check-prefixes=MIR %s
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; RUN: llc -global-isel=1 -march=amdgcn -mcpu=bonaire -stop-before=machine-scheduler < %s | FileCheck -enable-var-scope -check-prefixes=MIR %s
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; Make sure !noalias metadata is passed through from target intrinsics
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; MIR-LABEL: name: ds_append_noalias
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; MIR: DS_APPEND {{.*}} :: (load store (s32) on %{{.*}}, !noalias !{{[0-9]+}}, addrspace 3)
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define amdgpu_kernel void @ds_append_noalias() {
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%lds = load ptr addrspace(3), ptr addrspace(1) null
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%val = call i32 @llvm.amdgcn.ds.append.p3(ptr addrspace(3) %lds, i1 false), !noalias !0
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store i32 %val, ptr addrspace(1) null, align 4
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ret void
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}
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declare i32 @llvm.amdgcn.ds.append.p3(ptr addrspace(3) nocapture, i1 immarg) #0
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attributes #0 = { argmemonly convergent nounwind willreturn }
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!0 = !{!1}
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!1 = distinct !{!1, !2}
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!2 = distinct !{!2}
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