forked from OSchip/llvm-project
181 lines
11 KiB
C++
181 lines
11 KiB
C++
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --check-globals
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// RUN: %clang_cc1 -no-opaque-pointers -fopenmp-enable-irbuilder -verify -fopenmp -fopenmp-version=50 -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s
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// expected-no-diagnostics
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struct S {
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int a, b;
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};
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struct P {
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int a, b;
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};
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//
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#define N 32
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// CHECK-LABEL: @_Z6simplePfS_Pi(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[A_ADDR:%.*]] = alloca float*, align 8
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// CHECK-NEXT: [[B_ADDR:%.*]] = alloca float*, align 8
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// CHECK-NEXT: [[C_ADDR:%.*]] = alloca i32*, align 8
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// CHECK-NEXT: [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 4
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// CHECK-NEXT: [[P:%.*]] = alloca %struct.S*, align 8
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// CHECK-NEXT: [[D:%.*]] = alloca [32 x i32], align 16
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// CHECK-NEXT: [[I:%.*]] = alloca i32, align 4
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// CHECK-NEXT: [[PP:%.*]] = alloca [[STRUCT_P:%.*]], align 4
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// CHECK-NEXT: [[I1:%.*]] = alloca i32, align 4
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// CHECK-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON:%.*]], align 8
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// CHECK-NEXT: [[AGG_CAPTURED2:%.*]] = alloca [[STRUCT_ANON_0:%.*]], align 4
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// CHECK-NEXT: [[DOTCOUNT_ADDR:%.*]] = alloca i32, align 4
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// CHECK-NEXT: [[J:%.*]] = alloca i32, align 4
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// CHECK-NEXT: [[AGG_CAPTURED15:%.*]] = alloca [[STRUCT_ANON_1:%.*]], align 8
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// CHECK-NEXT: [[AGG_CAPTURED16:%.*]] = alloca [[STRUCT_ANON_2:%.*]], align 4
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// CHECK-NEXT: [[DOTCOUNT_ADDR17:%.*]] = alloca i32, align 4
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// CHECK-NEXT: store float* [[A:%.*]], float** [[A_ADDR]], align 8
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// CHECK-NEXT: store float* [[B:%.*]], float** [[B_ADDR]], align 8
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// CHECK-NEXT: store i32* [[C:%.*]], i32** [[C_ADDR]], align 8
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// CHECK-NEXT: store i32 0, i32* [[I]], align 4
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// CHECK-NEXT: br label [[FOR_COND:%.*]]
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// CHECK: for.cond:
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// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4
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// CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 32
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// CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
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// CHECK: for.body:
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// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4
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// CHECK-NEXT: [[TMP2:%.*]] = load i32, i32* [[I]], align 4
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// CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP2]] to i64
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// CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [32 x i32], [32 x i32]* [[D]], i64 0, i64 [[IDXPROM]]
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// CHECK-NEXT: store i32 [[TMP1]], i32* [[ARRAYIDX]], align 4
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// CHECK-NEXT: br label [[FOR_INC:%.*]]
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// CHECK: for.inc:
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// CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[I]], align 4
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// CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP3]], 1
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// CHECK-NEXT: store i32 [[INC]], i32* [[I]], align 4
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// CHECK-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
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// CHECK: for.end:
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// CHECK-NEXT: [[TMP4:%.*]] = load float*, float** [[A_ADDR]], align 8
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// CHECK-NEXT: [[TMP5:%.*]] = load %struct.S*, %struct.S** [[P]], align 8
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// CHECK-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [32 x i32], [32 x i32]* [[D]], i64 0, i64 0
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// CHECK-NEXT: store i32 3, i32* [[I1]], align 4
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// CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[AGG_CAPTURED]], i32 0, i32 0
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// CHECK-NEXT: store i32* [[I1]], i32** [[TMP6]], align 8
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// CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[AGG_CAPTURED2]], i32 0, i32 0
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// CHECK-NEXT: [[TMP8:%.*]] = load i32, i32* [[I1]], align 4
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// CHECK-NEXT: store i32 [[TMP8]], i32* [[TMP7]], align 4
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// CHECK-NEXT: call void @__captured_stmt(i32* [[DOTCOUNT_ADDR]], %struct.anon* [[AGG_CAPTURED]])
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// CHECK-NEXT: [[DOTCOUNT:%.*]] = load i32, i32* [[DOTCOUNT_ADDR]], align 4
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// CHECK-NEXT: br label [[OMP_LOOP_PREHEADER:%.*]]
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// CHECK: omp_loop.preheader:
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// CHECK-NEXT: call void @llvm.assume(i1 true) [ "align"(float* [[TMP4]], i64 128) ]
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// CHECK-NEXT: call void @llvm.assume(i1 true) [ "align"(%struct.S* [[TMP5]], i64 64) ]
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// CHECK-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i64 16) ]
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// CHECK-NEXT: br label [[OMP_LOOP_HEADER:%.*]]
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// CHECK: omp_loop.header:
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// CHECK-NEXT: [[OMP_LOOP_IV:%.*]] = phi i32 [ 0, [[OMP_LOOP_PREHEADER]] ], [ [[OMP_LOOP_NEXT:%.*]], [[OMP_LOOP_INC:%.*]] ]
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// CHECK-NEXT: br label [[OMP_LOOP_COND:%.*]]
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// CHECK: omp_loop.cond:
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// CHECK-NEXT: [[OMP_LOOP_CMP:%.*]] = icmp ult i32 [[OMP_LOOP_IV]], [[DOTCOUNT]]
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// CHECK-NEXT: br i1 [[OMP_LOOP_CMP]], label [[OMP_LOOP_BODY:%.*]], label [[OMP_LOOP_EXIT:%.*]]
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// CHECK: omp_loop.body:
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// CHECK-NEXT: call void @__captured_stmt.1(i32* [[I1]], i32 [[OMP_LOOP_IV]], %struct.anon.0* [[AGG_CAPTURED2]]), !llvm.access.group [[ACC_GRP5:![0-9]+]]
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// CHECK-NEXT: [[TMP9:%.*]] = load float*, float** [[B_ADDR]], align 8, !llvm.access.group [[ACC_GRP5]]
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// CHECK-NEXT: [[TMP10:%.*]] = load i32, i32* [[I1]], align 4, !llvm.access.group [[ACC_GRP5]]
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// CHECK-NEXT: [[IDXPROM3:%.*]] = sext i32 [[TMP10]] to i64
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// CHECK-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds float, float* [[TMP9]], i64 [[IDXPROM3]]
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// CHECK-NEXT: [[TMP11:%.*]] = load float, float* [[ARRAYIDX4]], align 4, !llvm.access.group [[ACC_GRP5]]
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// CHECK-NEXT: [[A5:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i32 0, i32 0
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// CHECK-NEXT: [[TMP12:%.*]] = load i32, i32* [[A5]], align 4, !llvm.access.group [[ACC_GRP5]]
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// CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP12]] to float
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// CHECK-NEXT: [[ADD:%.*]] = fadd float [[TMP11]], [[CONV]]
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// CHECK-NEXT: [[TMP13:%.*]] = load %struct.S*, %struct.S** [[P]], align 8, !llvm.access.group [[ACC_GRP5]]
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// CHECK-NEXT: [[A6:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[TMP13]], i32 0, i32 0
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// CHECK-NEXT: [[TMP14:%.*]] = load i32, i32* [[A6]], align 4, !llvm.access.group [[ACC_GRP5]]
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// CHECK-NEXT: [[CONV7:%.*]] = sitofp i32 [[TMP14]] to float
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// CHECK-NEXT: [[ADD8:%.*]] = fadd float [[ADD]], [[CONV7]]
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// CHECK-NEXT: [[TMP15:%.*]] = load i32, i32* [[I1]], align 4, !llvm.access.group [[ACC_GRP5]]
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// CHECK-NEXT: [[IDXPROM9:%.*]] = sext i32 [[TMP15]] to i64
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// CHECK-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds [32 x i32], [32 x i32]* [[D]], i64 0, i64 [[IDXPROM9]]
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// CHECK-NEXT: [[TMP16:%.*]] = load i32, i32* [[ARRAYIDX10]], align 4, !llvm.access.group [[ACC_GRP5]]
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// CHECK-NEXT: [[CONV11:%.*]] = sitofp i32 [[TMP16]] to float
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// CHECK-NEXT: [[ADD12:%.*]] = fadd float [[ADD8]], [[CONV11]]
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// CHECK-NEXT: [[TMP17:%.*]] = load float*, float** [[A_ADDR]], align 8, !llvm.access.group [[ACC_GRP5]]
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// CHECK-NEXT: [[TMP18:%.*]] = load i32, i32* [[I1]], align 4, !llvm.access.group [[ACC_GRP5]]
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// CHECK-NEXT: [[IDXPROM13:%.*]] = sext i32 [[TMP18]] to i64
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// CHECK-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds float, float* [[TMP17]], i64 [[IDXPROM13]]
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// CHECK-NEXT: store float [[ADD12]], float* [[ARRAYIDX14]], align 4, !llvm.access.group [[ACC_GRP5]]
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// CHECK-NEXT: br label [[OMP_LOOP_INC]]
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// CHECK: omp_loop.inc:
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// CHECK-NEXT: [[OMP_LOOP_NEXT]] = add nuw i32 [[OMP_LOOP_IV]], 1
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// CHECK-NEXT: br label [[OMP_LOOP_HEADER]], !llvm.loop [[LOOP6:![0-9]+]]
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// CHECK: omp_loop.exit:
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// CHECK-NEXT: br label [[OMP_LOOP_AFTER:%.*]]
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// CHECK: omp_loop.after:
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// CHECK-NEXT: store i32 3, i32* [[J]], align 4
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// CHECK-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[AGG_CAPTURED15]], i32 0, i32 0
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// CHECK-NEXT: store i32* [[J]], i32** [[TMP19]], align 8
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// CHECK-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[AGG_CAPTURED16]], i32 0, i32 0
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// CHECK-NEXT: [[TMP21:%.*]] = load i32, i32* [[J]], align 4
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// CHECK-NEXT: store i32 [[TMP21]], i32* [[TMP20]], align 4
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// CHECK-NEXT: call void @__captured_stmt.2(i32* [[DOTCOUNT_ADDR17]], %struct.anon.1* [[AGG_CAPTURED15]])
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// CHECK-NEXT: [[DOTCOUNT18:%.*]] = load i32, i32* [[DOTCOUNT_ADDR17]], align 4
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// CHECK-NEXT: br label [[OMP_LOOP_PREHEADER19:%.*]]
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// CHECK: omp_loop.preheader19:
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// CHECK-NEXT: br label [[OMP_LOOP_HEADER20:%.*]]
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// CHECK: omp_loop.header20:
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// CHECK-NEXT: [[OMP_LOOP_IV26:%.*]] = phi i32 [ 0, [[OMP_LOOP_PREHEADER19]] ], [ [[OMP_LOOP_NEXT28:%.*]], [[OMP_LOOP_INC23:%.*]] ]
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// CHECK-NEXT: br label [[OMP_LOOP_COND21:%.*]]
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// CHECK: omp_loop.cond21:
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// CHECK-NEXT: [[OMP_LOOP_CMP27:%.*]] = icmp ult i32 [[OMP_LOOP_IV26]], [[DOTCOUNT18]]
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// CHECK-NEXT: br i1 [[OMP_LOOP_CMP27]], label [[OMP_LOOP_BODY22:%.*]], label [[OMP_LOOP_EXIT24:%.*]]
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// CHECK: omp_loop.body22:
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// CHECK-NEXT: call void @__captured_stmt.3(i32* [[J]], i32 [[OMP_LOOP_IV26]], %struct.anon.2* [[AGG_CAPTURED16]]), !llvm.access.group [[ACC_GRP9:![0-9]+]]
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// CHECK-NEXT: [[A29:%.*]] = getelementptr inbounds [[STRUCT_P]], %struct.P* [[PP]], i32 0, i32 0
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// CHECK-NEXT: [[TMP22:%.*]] = load i32, i32* [[A29]], align 4, !llvm.access.group [[ACC_GRP9]]
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// CHECK-NEXT: [[TMP23:%.*]] = load i32*, i32** [[C_ADDR]], align 8, !llvm.access.group [[ACC_GRP9]]
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// CHECK-NEXT: [[TMP24:%.*]] = load i32, i32* [[J]], align 4, !llvm.access.group [[ACC_GRP9]]
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// CHECK-NEXT: [[IDXPROM30:%.*]] = sext i32 [[TMP24]] to i64
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// CHECK-NEXT: [[ARRAYIDX31:%.*]] = getelementptr inbounds i32, i32* [[TMP23]], i64 [[IDXPROM30]]
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// CHECK-NEXT: store i32 [[TMP22]], i32* [[ARRAYIDX31]], align 4, !llvm.access.group [[ACC_GRP9]]
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// CHECK-NEXT: br label [[OMP_LOOP_INC23]]
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// CHECK: omp_loop.inc23:
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// CHECK-NEXT: [[OMP_LOOP_NEXT28]] = add nuw i32 [[OMP_LOOP_IV26]], 1
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// CHECK-NEXT: br label [[OMP_LOOP_HEADER20]], !llvm.loop [[LOOP10:![0-9]+]]
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// CHECK: omp_loop.exit24:
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// CHECK-NEXT: br label [[OMP_LOOP_AFTER25:%.*]]
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// CHECK: omp_loop.after25:
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// CHECK-NEXT: ret void
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//
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void simple(float *a, float *b, int *c) {
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S s, *p;
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int D[N];
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for (int i = 0; i <N; ++i)
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D[i] = i;
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P pp;
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#pragma omp simd aligned (a:128) aligned(p:64) aligned(D)
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for (int i = 3; i < N; i += 5) {
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a[i] = b[i] + s.a + p->a + D[i];
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}
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#pragma omp simd
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for (int j = 3; j < N; j += 5) {
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c[j] = pp.a;
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}
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}
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//.
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// CHECK: attributes #0 = { mustprogress noinline nounwind optnone "frame-pointer"="none" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+cx8,+mmx,+sse,+sse2,+x87" }
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// CHECK: attributes #1 = { noinline nounwind optnone "frame-pointer"="none" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+cx8,+mmx,+sse,+sse2,+x87" }
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// CHECK: attributes #2 = { nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: readwrite) }
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//.
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// CHECK: !0 = !{i32 1, !"wchar_size", i32 4}
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// CHECK: !1 = !{i32 7, !"openmp", i32 50}
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// CHECK: !3 = distinct !{!3, !4}
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// CHECK: !4 = !{!"llvm.loop.mustprogress"}
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// CHECK: !5 = distinct !{}
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// CHECK: !6 = distinct !{!6, !7, !8}
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// CHECK: !7 = !{!"llvm.loop.parallel_accesses", !5}
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// CHECK: !8 = !{!"llvm.loop.vectorize.enable", i1 true}
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// CHECK: !9 = distinct !{}
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// CHECK: !10 = distinct !{!10, !11, !8}
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// CHECK: !11 = !{!"llvm.loop.parallel_accesses", !9}
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//.
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