forked from OSchip/llvm-project
58 lines
3.2 KiB
Plaintext
58 lines
3.2 KiB
Plaintext
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --check-globals --global-value-regex ".omp_offloading.entry.*"
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// RUN: %clang_cc1 -std=c++11 -triple x86_64-unknown-linux-gnu -fgpu-rdc \
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// RUN: --offload-new-driver -emit-llvm -o - -x cuda %s | FileCheck \
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// RUN: --check-prefix=CUDA %s
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// RUN: %clang_cc1 -std=c++11 -triple x86_64-unknown-linux-gnu -fgpu-rdc \
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// RUN: --offload-new-driver -emit-llvm -o - -x hip %s | FileCheck \
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// RUN: --check-prefix=HIP %s
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#include "Inputs/cuda.h"
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//.
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// CUDA: @.omp_offloading.entry_name = internal unnamed_addr constant [8 x i8] c"_Z3foov\00"
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// CUDA: @.omp_offloading.entry._Z3foov = weak constant %struct.__tgt_offload_entry { ptr @_Z18__device_stub__foov, ptr @.omp_offloading.entry_name, i64 0, i32 0, i32 0 }, section "cuda_offloading_entries", align 1
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// CUDA: @.omp_offloading.entry_name.1 = internal unnamed_addr constant [8 x i8] c"_Z3barv\00"
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// CUDA: @.omp_offloading.entry._Z3barv = weak constant %struct.__tgt_offload_entry { ptr @_Z18__device_stub__barv, ptr @.omp_offloading.entry_name.1, i64 0, i32 0, i32 0 }, section "cuda_offloading_entries", align 1
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// CUDA: @.omp_offloading.entry_name.2 = internal unnamed_addr constant [2 x i8] c"x\00"
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// CUDA: @.omp_offloading.entry.x = weak constant %struct.__tgt_offload_entry { ptr @x, ptr @.omp_offloading.entry_name.2, i64 4, i32 0, i32 0 }, section "cuda_offloading_entries", align 1
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//.
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// HIP: @.omp_offloading.entry_name = internal unnamed_addr constant [8 x i8] c"_Z3foov\00"
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// HIP: @.omp_offloading.entry._Z3foov = weak constant %struct.__tgt_offload_entry { ptr @_Z3foov, ptr @.omp_offloading.entry_name, i64 0, i32 0, i32 0 }, section "hip_offloading_entries", align 1
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// HIP: @.omp_offloading.entry_name.1 = internal unnamed_addr constant [8 x i8] c"_Z3barv\00"
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// HIP: @.omp_offloading.entry._Z3barv = weak constant %struct.__tgt_offload_entry { ptr @_Z3barv, ptr @.omp_offloading.entry_name.1, i64 0, i32 0, i32 0 }, section "hip_offloading_entries", align 1
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// HIP: @.omp_offloading.entry_name.2 = internal unnamed_addr constant [2 x i8] c"x\00"
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// HIP: @.omp_offloading.entry.x = weak constant %struct.__tgt_offload_entry { ptr @x, ptr @.omp_offloading.entry_name.2, i64 4, i32 0, i32 0 }, section "hip_offloading_entries", align 1
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//.
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// CUDA-LABEL: @_Z18__device_stub__foov(
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// CUDA-NEXT: entry:
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// CUDA-NEXT: [[TMP0:%.*]] = call i32 @cudaLaunch(ptr @_Z18__device_stub__foov)
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// CUDA-NEXT: br label [[SETUP_END:%.*]]
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// CUDA: setup.end:
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// CUDA-NEXT: ret void
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//
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// HIP-LABEL: @_Z18__device_stub__foov(
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// HIP-NEXT: entry:
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// HIP-NEXT: [[TMP0:%.*]] = call i32 @hipLaunchByPtr(ptr @_Z3foov)
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// HIP-NEXT: br label [[SETUP_END:%.*]]
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// HIP: setup.end:
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// HIP-NEXT: ret void
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//
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__global__ void foo() {}
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// CUDA-LABEL: @_Z18__device_stub__barv(
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// CUDA-NEXT: entry:
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// CUDA-NEXT: [[TMP0:%.*]] = call i32 @cudaLaunch(ptr @_Z18__device_stub__barv)
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// CUDA-NEXT: br label [[SETUP_END:%.*]]
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// CUDA: setup.end:
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// CUDA-NEXT: ret void
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//
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// HIP-LABEL: @_Z18__device_stub__barv(
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// HIP-NEXT: entry:
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// HIP-NEXT: [[TMP0:%.*]] = call i32 @hipLaunchByPtr(ptr @_Z3barv)
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// HIP-NEXT: br label [[SETUP_END:%.*]]
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// HIP: setup.end:
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// HIP-NEXT: ret void
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//
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__global__ void bar() {}
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__device__ int x = 1;
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