forked from OSchip/llvm-project
[AArch64] Regenerate more tests. NFC
Also includes some adjustments for asm.py to handle updating more cases successfully.
This commit is contained in:
David Green
parent
53dc0f1078
commit
d100a30a54
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@ -1,4 +1,5 @@
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; RUN: llc -mtriple=aarch64-apple-ios -asm-verbose=false \
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=aarch64-apple-ios \
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; RUN: -aarch64-enable-collect-loh=false -aarch64-enable-global-merge \
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; RUN: -global-merge-group-by-use -global-merge-ignore-single-use=false %s \
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; RUN: -o - | FileCheck %s
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@ -11,10 +12,11 @@
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@m1 = internal global i32 0, align 4
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@n1 = internal global i32 0, align 4
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; CHECK-LABEL: f1:
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define void @f1(i32 %a1, i32 %a2) #0 {
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; CHECK-NEXT: adrp x8, [[SET1:__MergedGlobals.[0-9]*]]@PAGE
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; CHECK-NEXT: add x8, x8, [[SET1]]@PAGEOFF
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; CHECK-LABEL: f1:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: adrp x8, __MergedGlobals.2@PAGE
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; CHECK-NEXT: add x8, x8, __MergedGlobals.2@PAGEOFF
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; CHECK-NEXT: stp w0, w1, [x8]
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; CHECK-NEXT: ret
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store i32 %a1, i32* @m1, align 4
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@ -26,10 +28,11 @@ define void @f1(i32 %a1, i32 %a2) #0 {
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@n2 = internal global i32 0, align 4
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@o2 = internal global i32 0, align 4
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; CHECK-LABEL: f2:
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define void @f2(i32 %a1, i32 %a2, i32 %a3) #0 {
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; CHECK-NEXT: adrp x8, [[SET2:__MergedGlobals.[0-9]*]]@PAGE
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; CHECK-NEXT: add x8, x8, [[SET2]]@PAGEOFF
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; CHECK-LABEL: f2:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: adrp x8, __MergedGlobals.1@PAGE
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; CHECK-NEXT: add x8, x8, __MergedGlobals.1@PAGEOFF
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; CHECK-NEXT: stp w0, w1, [x8]
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; CHECK-NEXT: str w2, [x8, #8]
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; CHECK-NEXT: ret
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@ -46,12 +49,13 @@ define void @f2(i32 %a1, i32 %a2, i32 %a3) #0 {
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@m3 = internal global i32 0, align 4
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@n3 = internal global i32 0, align 4
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; CHECK-LABEL: f3:
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define void @f3(i32 %a1, i32 %a2) #0 {
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; CHECK-LABEL: f3:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: adrp x8, _m3@PAGE
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; CHECK-NEXT: adrp x9, [[SET3:__MergedGlobals[0-9]*]]@PAGE
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; CHECK-NEXT: adrp x9, __MergedGlobals@PAGE
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; CHECK-NEXT: str w0, [x8, _m3@PAGEOFF]
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; CHECK-NEXT: str w1, [x9, [[SET3]]@PAGEOFF]
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; CHECK-NEXT: str w1, [x9, __MergedGlobals@PAGEOFF]
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; CHECK-NEXT: ret
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store i32 %a1, i32* @m3, align 4
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store i32 %a2, i32* @n3, align 4
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@ -61,10 +65,11 @@ define void @f3(i32 %a1, i32 %a2) #0 {
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@m4 = internal global i32 0, align 4
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@n4 = internal global i32 0, align 4
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; CHECK-LABEL: f4:
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define void @f4(i32 %a1, i32 %a2, i32 %a3) #0 {
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; CHECK-NEXT: adrp x8, [[SET3]]@PAGE
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; CHECK-NEXT: add x8, x8, [[SET3]]@PAGEOFF
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; CHECK-LABEL: f4:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: adrp x8, __MergedGlobals@PAGE
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; CHECK-NEXT: add x8, x8, __MergedGlobals@PAGEOFF
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; CHECK-NEXT: stp w0, w1, [x8, #4]
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; CHECK-NEXT: str w2, [x8]
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; CHECK-NEXT: ret
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@ -77,8 +82,9 @@ define void @f4(i32 %a1, i32 %a2, i32 %a3) #0 {
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; Finally, check that we don't do anything with one-element global sets.
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@o5 = internal global i32 0, align 4
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; CHECK-LABEL: f5:
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define void @f5(i32 %a1) #0 {
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; CHECK-LABEL: f5:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: adrp x8, _o5@PAGE
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; CHECK-NEXT: str w0, [x8, _o5@PAGEOFF]
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; CHECK-NEXT: ret
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@ -88,8 +94,8 @@ define void @f5(i32 %a1) #0 {
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; CHECK-DAG: .zerofill __DATA,__bss,_o5,4,2
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; CHECK-DAG: .zerofill __DATA,__bss,[[SET1]],8,2
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; CHECK-DAG: .zerofill __DATA,__bss,[[SET2]],12,2
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; CHECK-DAG: .zerofill __DATA,__bss,[[SET3]],12,2
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; CHECK-DAG: .zerofill __DATA,__bss,__MergedGlobals.2,8,2
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; CHECK-DAG: .zerofill __DATA,__bss,__MergedGlobals.1,12,2
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; CHECK-DAG: .zerofill __DATA,__bss,__MergedGlobals,12,2
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attributes #0 = { nounwind }
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@ -1,15 +1,17 @@
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; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve -aarch64-sve-vector-bits-min=512 -o - -asm-verbose=0 < %s | FileCheck %s
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve -aarch64-sve-vector-bits-min=512 -o - < %s | FileCheck %s
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define void @vls_sve_and_64xi8(<64 x i8>* %ap, <64 x i8>* %out) nounwind {
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; CHECK-LABEL: vls_sve_and_64xi8:
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; CHECK-NEXT: adrp x[[ONE:[0-9]+]], .LCPI0_0
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; CHECK-NEXT: add x[[TWO:[0-9]+]], x[[ONE]], :lo12:.LCPI0_0
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; CHECK: // %bb.0:
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; CHECK-NEXT: adrp x8, .LCPI0_0
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; CHECK-NEXT: add x8, x8, :lo12:.LCPI0_0
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; CHECK-NEXT: ptrue p0.b, vl64
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; CHECK-NEXT: ld1b { z0.b }, p0/z, [x0]
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; CHECK-NEXT: ld1b { z1.b }, p0/z, [x[[TWO]]]
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; CHECK-NEXT: ld1b { z1.b }, p0/z, [x8]
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; CHECK-NEXT: and z0.d, z0.d, z1.d
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; CHECK-NEXT: st1b { z0.b }, p0, [x1]
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; CHECK-NEXT: ret
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define void @vls_sve_and_64xi8(<64 x i8>* %ap, <64 x i8>* %out) nounwind {
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%a = load <64 x i8>, <64 x i8>* %ap
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%b = and <64 x i8> %a, <i8 0, i8 255, i8 0, i8 255, i8 0, i8 255, i8 0, i8 255, i8 0, i8 255, i8 0, i8 255, i8 0, i8 255, i8 0, i8 255,
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i8 0, i8 255, i8 0, i8 255, i8 0, i8 255, i8 0, i8 255, i8 0, i8 255, i8 0, i8 255, i8 0, i8 255, i8 0, i8 255,
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@ -19,18 +21,20 @@ define void @vls_sve_and_64xi8(<64 x i8>* %ap, <64 x i8>* %out) nounwind {
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ret void
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}
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define <16 x i8> @vls_sve_and_16xi8(<16 x i8> %b, <16 x i8>* %out) nounwind {
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; CHECK-LABEL: vls_sve_and_16xi8:
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; CHECK: // %bb.0:
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; CHECK-NEXT: bic v0.8h, #255
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; CHECK-NEXT: ret
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define <16 x i8> @vls_sve_and_16xi8(<16 x i8> %b, <16 x i8>* %out) nounwind {
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%c = and <16 x i8> %b, <i8 0, i8 255, i8 0, i8 255, i8 0, i8 255, i8 0, i8 255, i8 0, i8 255, i8 0, i8 255, i8 0, i8 255, i8 0, i8 255>
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ret <16 x i8> %c
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}
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define <8 x i8> @vls_sve_and_8xi8(<8 x i8> %b, <8 x i8>* %out) nounwind {
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; CHECK-LABEL: vls_sve_and_8xi8:
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; CHECK: // %bb.0:
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; CHECK-NEXT: bic v0.4h, #255
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; CHECK-NEXT: ret
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define <8 x i8> @vls_sve_and_8xi8(<8 x i8> %b, <8 x i8>* %out) nounwind {
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%c = and <8 x i8> %b, <i8 0, i8 255, i8 0, i8 255, i8 0, i8 255, i8 0, i8 255>
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ret <8 x i8> %c
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}
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@ -1,11 +1,15 @@
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; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve -asm-verbose=0 < %s | FileCheck %s
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s | FileCheck %s
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; FADD
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define half @fadda_nxv2f16(half %init, <vscale x 2 x half> %a) {
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; CHECK-LABEL: fadda_nxv2f16:
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; CHECK: ptrue p0.d
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; CHECK: // %bb.0:
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; CHECK-NEXT: // kill: def $h0 killed $h0 def $z0
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; CHECK-NEXT: ptrue p0.d
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; CHECK-NEXT: fadda h0, p0, h0, z1.h
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; CHECK-NEXT: // kill: def $h0 killed $h0 killed $z0
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; CHECK-NEXT: ret
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%res = call half @llvm.vector.reduce.fadd.nxv2f16(half %init, <vscale x 2 x half> %a)
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ret half %res
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@ -13,8 +17,11 @@ define half @fadda_nxv2f16(half %init, <vscale x 2 x half> %a) {
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define half @fadda_nxv4f16(half %init, <vscale x 4 x half> %a) {
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; CHECK-LABEL: fadda_nxv4f16:
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; CHECK: ptrue p0.s
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; CHECK: // %bb.0:
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; CHECK-NEXT: // kill: def $h0 killed $h0 def $z0
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; CHECK-NEXT: ptrue p0.s
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; CHECK-NEXT: fadda h0, p0, h0, z1.h
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; CHECK-NEXT: // kill: def $h0 killed $h0 killed $z0
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; CHECK-NEXT: ret
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%res = call half @llvm.vector.reduce.fadd.nxv4f16(half %init, <vscale x 4 x half> %a)
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ret half %res
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@ -22,8 +29,11 @@ define half @fadda_nxv4f16(half %init, <vscale x 4 x half> %a) {
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define half @fadda_nxv8f16(half %init, <vscale x 8 x half> %a) {
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; CHECK-LABEL: fadda_nxv8f16:
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; CHECK: ptrue p0.h
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; CHECK: // %bb.0:
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; CHECK-NEXT: // kill: def $h0 killed $h0 def $z0
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; CHECK-NEXT: ptrue p0.h
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; CHECK-NEXT: fadda h0, p0, h0, z1.h
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; CHECK-NEXT: // kill: def $h0 killed $h0 killed $z0
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; CHECK-NEXT: ret
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%res = call half @llvm.vector.reduce.fadd.nxv8f16(half %init, <vscale x 8 x half> %a)
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ret half %res
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@ -31,11 +41,12 @@ define half @fadda_nxv8f16(half %init, <vscale x 8 x half> %a) {
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define half @fadda_nxv6f16(<vscale x 6 x half> %v, half %s) {
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; CHECK-LABEL: fadda_nxv6f16:
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; CHECK: str x29, [sp, #-16]!
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; CHECK: // %bb.0:
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; CHECK-NEXT: str x29, [sp, #-16]! // 8-byte Folded Spill
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; CHECK-NEXT: .cfi_def_cfa_offset 16
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; CHECK-NEXT: .cfi_offset w29, -16
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; CHECK-NEXT: addvl sp, sp, #-1
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; CHECK-NEXT: .cfi_escape 0x0f, 0x0c, 0x8f, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0x2e, 0x00, 0x1e, 0x22
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; CHECK-NEXT: .cfi_escape 0x0f, 0x0c, 0x8f, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0x2e, 0x00, 0x1e, 0x22 // sp + 16 + 8 * VG
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; CHECK-NEXT: adrp x8, .LCPI3_0
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; CHECK-NEXT: add x8, x8, :lo12:.LCPI3_0
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; CHECK-NEXT: ptrue p0.h
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@ -46,8 +57,9 @@ define half @fadda_nxv6f16(<vscale x 6 x half> %v, half %s) {
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; CHECK-NEXT: fmov s0, s1
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; CHECK-NEXT: ld1h { z2.h }, p0/z, [sp]
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; CHECK-NEXT: fadda h0, p0, h0, z2.h
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; CHECK-NEXT: // kill: def $h0 killed $h0 killed $z0
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; CHECK-NEXT: addvl sp, sp, #1
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; CHECK-NEXT: ldr x29, [sp], #16
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; CHECK-NEXT: ldr x29, [sp], #16 // 8-byte Folded Reload
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; CHECK-NEXT: ret
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%res = call half @llvm.vector.reduce.fadd.nxv6f16(half %s, <vscale x 6 x half> %v)
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ret half %res
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@ -55,16 +67,18 @@ define half @fadda_nxv6f16(<vscale x 6 x half> %v, half %s) {
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define half @fadda_nxv10f16(<vscale x 10 x half> %v, half %s) {
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; CHECK-LABEL: fadda_nxv10f16:
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; CHECK: str x29, [sp, #-16]!
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; CHECK: // %bb.0:
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; CHECK-NEXT: str x29, [sp, #-16]! // 8-byte Folded Spill
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; CHECK-NEXT: .cfi_def_cfa_offset 16
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; CHECK-NEXT: .cfi_offset w29, -16
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; CHECK-NEXT: addvl sp, sp, #-3
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; CHECK-NEXT: .cfi_escape 0x0f, 0x0c, 0x8f, 0x00, 0x11, 0x10, 0x22, 0x11, 0x18, 0x92, 0x2e, 0x00, 0x1e, 0x22
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; CHECK-NEXT: .cfi_escape 0x0f, 0x0c, 0x8f, 0x00, 0x11, 0x10, 0x22, 0x11, 0x18, 0x92, 0x2e, 0x00, 0x1e, 0x22 // sp + 16 + 24 * VG
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; CHECK-NEXT: adrp x8, .LCPI4_0
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; CHECK-NEXT: add x8, x8, :lo12:.LCPI4_0
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; CHECK-NEXT: ptrue p0.h
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; CHECK-NEXT: ptrue p1.d
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; CHECK-NEXT: st1h { z1.h }, p0, [sp]
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; CHECK-NEXT: // kill: def $h2 killed $h2 def $z2
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; CHECK-NEXT: ld1rh { z1.d }, p1/z, [x8]
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; CHECK-NEXT: addvl x8, sp, #1
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; CHECK-NEXT: fadda h2, p0, h2, z0.h
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@ -79,7 +93,7 @@ define half @fadda_nxv10f16(<vscale x 10 x half> %v, half %s) {
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; CHECK-NEXT: fadda h2, p0, h2, z1.h
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; CHECK-NEXT: fmov s0, s2
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; CHECK-NEXT: addvl sp, sp, #3
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; CHECK-NEXT: ldr x29, [sp], #16
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; CHECK-NEXT: ldr x29, [sp], #16 // 8-byte Folded Reload
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; CHECK-NEXT: ret
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%res = call half @llvm.vector.reduce.fadd.nxv10f16(half %s, <vscale x 10 x half> %v)
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ret half %res
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@ -87,9 +101,11 @@ define half @fadda_nxv10f16(<vscale x 10 x half> %v, half %s) {
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define half @fadda_nxv12f16(<vscale x 12 x half> %v, half %s) {
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; CHECK-LABEL: fadda_nxv12f16:
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; CHECK: adrp x8, .LCPI5_0
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; CHECK: // %bb.0:
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; CHECK-NEXT: adrp x8, .LCPI5_0
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; CHECK-NEXT: add x8, x8, :lo12:.LCPI5_0
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; CHECK-NEXT: ptrue p0.s
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; CHECK-NEXT: // kill: def $h2 killed $h2 def $z2
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; CHECK-NEXT: uunpklo z1.s, z1.h
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; CHECK-NEXT: ld1rh { z3.s }, p0/z, [x8]
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; CHECK-NEXT: ptrue p0.h
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@ -104,8 +120,11 @@ define half @fadda_nxv12f16(<vscale x 12 x half> %v, half %s) {
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define float @fadda_nxv2f32(float %init, <vscale x 2 x float> %a) {
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; CHECK-LABEL: fadda_nxv2f32:
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; CHECK: ptrue p0.d
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; CHECK: // %bb.0:
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; CHECK-NEXT: // kill: def $s0 killed $s0 def $z0
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; CHECK-NEXT: ptrue p0.d
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; CHECK-NEXT: fadda s0, p0, s0, z1.s
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; CHECK-NEXT: // kill: def $s0 killed $s0 killed $z0
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; CHECK-NEXT: ret
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%res = call float @llvm.vector.reduce.fadd.nxv2f32(float %init, <vscale x 2 x float> %a)
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ret float %res
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@ -113,8 +132,11 @@ define float @fadda_nxv2f32(float %init, <vscale x 2 x float> %a) {
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define float @fadda_nxv4f32(float %init, <vscale x 4 x float> %a) {
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; CHECK-LABEL: fadda_nxv4f32:
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; CHECK: ptrue p0.s
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; CHECK: // %bb.0:
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; CHECK-NEXT: // kill: def $s0 killed $s0 def $z0
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; CHECK-NEXT: ptrue p0.s
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; CHECK-NEXT: fadda s0, p0, s0, z1.s
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; CHECK-NEXT: // kill: def $s0 killed $s0 killed $z0
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; CHECK-NEXT: ret
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%res = call float @llvm.vector.reduce.fadd.nxv4f32(float %init, <vscale x 4 x float> %a)
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ret float %res
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@ -122,8 +144,11 @@ define float @fadda_nxv4f32(float %init, <vscale x 4 x float> %a) {
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define double @fadda_nxv2f64(double %init, <vscale x 2 x double> %a) {
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; CHECK-LABEL: fadda_nxv2f64:
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; CHECK: ptrue p0.d
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; CHECK: // %bb.0:
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; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0
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; CHECK-NEXT: ptrue p0.d
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; CHECK-NEXT: fadda d0, p0, d0, z1.d
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; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0
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; CHECK-NEXT: ret
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%res = call double @llvm.vector.reduce.fadd.nxv2f64(double %init, <vscale x 2 x double> %a)
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ret double %res
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||||
|
|
@ -133,7 +158,8 @@ define double @fadda_nxv2f64(double %init, <vscale x 2 x double> %a) {
|
|||
|
||||
define half @faddv_nxv2f16(half %init, <vscale x 2 x half> %a) {
|
||||
; CHECK-LABEL: faddv_nxv2f16:
|
||||
; CHECK: ptrue p0.d
|
||||
; CHECK: // %bb.0:
|
||||
; CHECK-NEXT: ptrue p0.d
|
||||
; CHECK-NEXT: faddv h1, p0, z1.h
|
||||
; CHECK-NEXT: fadd h0, h0, h1
|
||||
; CHECK-NEXT: ret
|
||||
|
|
@ -143,7 +169,8 @@ define half @faddv_nxv2f16(half %init, <vscale x 2 x half> %a) {
|
|||
|
||||
define half @faddv_nxv4f16(half %init, <vscale x 4 x half> %a) {
|
||||
; CHECK-LABEL: faddv_nxv4f16:
|
||||
; CHECK: ptrue p0.s
|
||||
; CHECK: // %bb.0:
|
||||
; CHECK-NEXT: ptrue p0.s
|
||||
; CHECK-NEXT: faddv h1, p0, z1.h
|
||||
; CHECK-NEXT: fadd h0, h0, h1
|
||||
; CHECK-NEXT: ret
|
||||
|
|
@ -153,7 +180,8 @@ define half @faddv_nxv4f16(half %init, <vscale x 4 x half> %a) {
|
|||
|
||||
define half @faddv_nxv8f16(half %init, <vscale x 8 x half> %a) {
|
||||
; CHECK-LABEL: faddv_nxv8f16:
|
||||
; CHECK: ptrue p0.h
|
||||
; CHECK: // %bb.0:
|
||||
; CHECK-NEXT: ptrue p0.h
|
||||
; CHECK-NEXT: faddv h1, p0, z1.h
|
||||
; CHECK-NEXT: fadd h0, h0, h1
|
||||
; CHECK-NEXT: ret
|
||||
|
|
@ -163,7 +191,8 @@ define half @faddv_nxv8f16(half %init, <vscale x 8 x half> %a) {
|
|||
|
||||
define float @faddv_nxv2f32(float %init, <vscale x 2 x float> %a) {
|
||||
; CHECK-LABEL: faddv_nxv2f32:
|
||||
; CHECK: ptrue p0.d
|
||||
; CHECK: // %bb.0:
|
||||
; CHECK-NEXT: ptrue p0.d
|
||||
; CHECK-NEXT: faddv s1, p0, z1.s
|
||||
; CHECK-NEXT: fadd s0, s0, s1
|
||||
; CHECK-NEXT: ret
|
||||
|
|
@ -173,7 +202,8 @@ define float @faddv_nxv2f32(float %init, <vscale x 2 x float> %a) {
|
|||
|
||||
define float @faddv_nxv4f32(float %init, <vscale x 4 x float> %a) {
|
||||
; CHECK-LABEL: faddv_nxv4f32:
|
||||
; CHECK: ptrue p0.s
|
||||
; CHECK: // %bb.0:
|
||||
; CHECK-NEXT: ptrue p0.s
|
||||
; CHECK-NEXT: faddv s1, p0, z1.s
|
||||
; CHECK-NEXT: fadd s0, s0, s1
|
||||
; CHECK-NEXT: ret
|
||||
|
|
@ -183,7 +213,8 @@ define float @faddv_nxv4f32(float %init, <vscale x 4 x float> %a) {
|
|||
|
||||
define double @faddv_nxv2f64(double %init, <vscale x 2 x double> %a) {
|
||||
; CHECK-LABEL: faddv_nxv2f64:
|
||||
; CHECK: ptrue p0.d
|
||||
; CHECK: // %bb.0:
|
||||
; CHECK-NEXT: ptrue p0.d
|
||||
; CHECK-NEXT: faddv d1, p0, z1.d
|
||||
; CHECK-NEXT: fadd d0, d0, d1
|
||||
; CHECK-NEXT: ret
|
||||
|
|
@ -195,8 +226,10 @@ define double @faddv_nxv2f64(double %init, <vscale x 2 x double> %a) {
|
|||
|
||||
define half @fmaxv_nxv2f16(<vscale x 2 x half> %a) {
|
||||
; CHECK-LABEL: fmaxv_nxv2f16:
|
||||
; CHECK: ptrue p0.d
|
||||
; CHECK: // %bb.0:
|
||||
; CHECK-NEXT: ptrue p0.d
|
||||
; CHECK-NEXT: fmaxnmv h0, p0, z0.h
|
||||
; CHECK-NEXT: // kill: def $h0 killed $h0 killed $z0
|
||||
; CHECK-NEXT: ret
|
||||
%res = call half @llvm.vector.reduce.fmax.nxv2f16(<vscale x 2 x half> %a)
|
||||
ret half %res
|
||||
|
|
@ -204,8 +237,10 @@ define half @fmaxv_nxv2f16(<vscale x 2 x half> %a) {
|
|||
|
||||
define half @fmaxv_nxv4f16(<vscale x 4 x half> %a) {
|
||||
; CHECK-LABEL: fmaxv_nxv4f16:
|
||||
; CHECK: ptrue p0.s
|
||||
; CHECK: // %bb.0:
|
||||
; CHECK-NEXT: ptrue p0.s
|
||||
; CHECK-NEXT: fmaxnmv h0, p0, z0.h
|
||||
; CHECK-NEXT: // kill: def $h0 killed $h0 killed $z0
|
||||
; CHECK-NEXT: ret
|
||||
%res = call half @llvm.vector.reduce.fmax.nxv4f16(<vscale x 4 x half> %a)
|
||||
ret half %res
|
||||
|
|
@ -213,8 +248,10 @@ define half @fmaxv_nxv4f16(<vscale x 4 x half> %a) {
|
|||
|
||||
define half @fmaxv_nxv8f16(<vscale x 8 x half> %a) {
|
||||
; CHECK-LABEL: fmaxv_nxv8f16:
|
||||
; CHECK: ptrue p0.h
|
||||
; CHECK: // %bb.0:
|
||||
; CHECK-NEXT: ptrue p0.h
|
||||
; CHECK-NEXT: fmaxnmv h0, p0, z0.h
|
||||
; CHECK-NEXT: // kill: def $h0 killed $h0 killed $z0
|
||||
; CHECK-NEXT: ret
|
||||
%res = call half @llvm.vector.reduce.fmax.nxv8f16(<vscale x 8 x half> %a)
|
||||
ret half %res
|
||||
|
|
@ -222,8 +259,10 @@ define half @fmaxv_nxv8f16(<vscale x 8 x half> %a) {
|
|||
|
||||
define float @fmaxv_nxv2f32(<vscale x 2 x float> %a) {
|
||||
; CHECK-LABEL: fmaxv_nxv2f32:
|
||||
; CHECK: ptrue p0.d
|
||||
; CHECK: // %bb.0:
|
||||
; CHECK-NEXT: ptrue p0.d
|
||||
; CHECK-NEXT: fmaxnmv s0, p0, z0.s
|
||||
; CHECK-NEXT: // kill: def $s0 killed $s0 killed $z0
|
||||
; CHECK-NEXT: ret
|
||||
%res = call float @llvm.vector.reduce.fmax.nxv2f32(<vscale x 2 x float> %a)
|
||||
ret float %res
|
||||
|
|
@ -231,8 +270,10 @@ define float @fmaxv_nxv2f32(<vscale x 2 x float> %a) {
|
|||
|
||||
define float @fmaxv_nxv4f32(<vscale x 4 x float> %a) {
|
||||
; CHECK-LABEL: fmaxv_nxv4f32:
|
||||
; CHECK: ptrue p0.s
|
||||
; CHECK: // %bb.0:
|
||||
; CHECK-NEXT: ptrue p0.s
|
||||
; CHECK-NEXT: fmaxnmv s0, p0, z0.s
|
||||
; CHECK-NEXT: // kill: def $s0 killed $s0 killed $z0
|
||||
; CHECK-NEXT: ret
|
||||
%res = call float @llvm.vector.reduce.fmax.nxv4f32(<vscale x 4 x float> %a)
|
||||
ret float %res
|
||||
|
|
@ -240,8 +281,10 @@ define float @fmaxv_nxv4f32(<vscale x 4 x float> %a) {
|
|||
|
||||
define double @fmaxv_nxv2f64(<vscale x 2 x double> %a) {
|
||||
; CHECK-LABEL: fmaxv_nxv2f64:
|
||||
; CHECK: ptrue p0.d
|
||||
; CHECK: // %bb.0:
|
||||
; CHECK-NEXT: ptrue p0.d
|
||||
; CHECK-NEXT: fmaxnmv d0, p0, z0.d
|
||||
; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0
|
||||
; CHECK-NEXT: ret
|
||||
%res = call double @llvm.vector.reduce.fmax.nxv2f64(<vscale x 2 x double> %a)
|
||||
ret double %res
|
||||
|
|
@ -251,8 +294,10 @@ define double @fmaxv_nxv2f64(<vscale x 2 x double> %a) {
|
|||
|
||||
define half @fminv_nxv2f16(<vscale x 2 x half> %a) {
|
||||
; CHECK-LABEL: fminv_nxv2f16:
|
||||
; CHECK: ptrue p0.d
|
||||
; CHECK: // %bb.0:
|
||||
; CHECK-NEXT: ptrue p0.d
|
||||
; CHECK-NEXT: fminnmv h0, p0, z0.h
|
||||
; CHECK-NEXT: // kill: def $h0 killed $h0 killed $z0
|
||||
; CHECK-NEXT: ret
|
||||
%res = call half @llvm.vector.reduce.fmin.nxv2f16(<vscale x 2 x half> %a)
|
||||
ret half %res
|
||||
|
|
@ -260,8 +305,10 @@ define half @fminv_nxv2f16(<vscale x 2 x half> %a) {
|
|||
|
||||
define half @fminv_nxv4f16(<vscale x 4 x half> %a) {
|
||||
; CHECK-LABEL: fminv_nxv4f16:
|
||||
; CHECK: ptrue p0.s
|
||||
; CHECK: // %bb.0:
|
||||
; CHECK-NEXT: ptrue p0.s
|
||||
; CHECK-NEXT: fminnmv h0, p0, z0.h
|
||||
; CHECK-NEXT: // kill: def $h0 killed $h0 killed $z0
|
||||
; CHECK-NEXT: ret
|
||||
%res = call half @llvm.vector.reduce.fmin.nxv4f16(<vscale x 4 x half> %a)
|
||||
ret half %res
|
||||
|
|
@ -269,8 +316,10 @@ define half @fminv_nxv4f16(<vscale x 4 x half> %a) {
|
|||
|
||||
define half @fminv_nxv8f16(<vscale x 8 x half> %a) {
|
||||
; CHECK-LABEL: fminv_nxv8f16:
|
||||
; CHECK: ptrue p0.h
|
||||
; CHECK: // %bb.0:
|
||||
; CHECK-NEXT: ptrue p0.h
|
||||
; CHECK-NEXT: fminnmv h0, p0, z0.h
|
||||
; CHECK-NEXT: // kill: def $h0 killed $h0 killed $z0
|
||||
; CHECK-NEXT: ret
|
||||
%res = call half @llvm.vector.reduce.fmin.nxv8f16(<vscale x 8 x half> %a)
|
||||
ret half %res
|
||||
|
|
@ -278,8 +327,10 @@ define half @fminv_nxv8f16(<vscale x 8 x half> %a) {
|
|||
|
||||
define float @fminv_nxv2f32(<vscale x 2 x float> %a) {
|
||||
; CHECK-LABEL: fminv_nxv2f32:
|
||||
; CHECK: ptrue p0.d
|
||||
; CHECK: // %bb.0:
|
||||
; CHECK-NEXT: ptrue p0.d
|
||||
; CHECK-NEXT: fminnmv s0, p0, z0.s
|
||||
; CHECK-NEXT: // kill: def $s0 killed $s0 killed $z0
|
||||
; CHECK-NEXT: ret
|
||||
%res = call float @llvm.vector.reduce.fmin.nxv2f32(<vscale x 2 x float> %a)
|
||||
ret float %res
|
||||
|
|
@ -287,8 +338,10 @@ define float @fminv_nxv2f32(<vscale x 2 x float> %a) {
|
|||
|
||||
define float @fminv_nxv4f32(<vscale x 4 x float> %a) {
|
||||
; CHECK-LABEL: fminv_nxv4f32:
|
||||
; CHECK: ptrue p0.s
|
||||
; CHECK: // %bb.0:
|
||||
; CHECK-NEXT: ptrue p0.s
|
||||
; CHECK-NEXT: fminnmv s0, p0, z0.s
|
||||
; CHECK-NEXT: // kill: def $s0 killed $s0 killed $z0
|
||||
; CHECK-NEXT: ret
|
||||
%res = call float @llvm.vector.reduce.fmin.nxv4f32(<vscale x 4 x float> %a)
|
||||
ret float %res
|
||||
|
|
@ -296,8 +349,10 @@ define float @fminv_nxv4f32(<vscale x 4 x float> %a) {
|
|||
|
||||
define double @fminv_nxv2f64(<vscale x 2 x double> %a) {
|
||||
; CHECK-LABEL: fminv_nxv2f64:
|
||||
; CHECK: ptrue p0.d
|
||||
; CHECK: // %bb.0:
|
||||
; CHECK-NEXT: ptrue p0.d
|
||||
; CHECK-NEXT: fminnmv d0, p0, z0.d
|
||||
; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0
|
||||
; CHECK-NEXT: ret
|
||||
%res = call double @llvm.vector.reduce.fmin.nxv2f64(<vscale x 2 x double> %a)
|
||||
ret double %res
|
||||
|
|
|
|||
|
|
@ -1,3 +1,4 @@
|
|||
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
|
||||
; RUN: llc < %s -mtriple=arm64_32-apple-watchos2.0.0 --aarch64-neon-syntax=generic | FileCheck %s
|
||||
|
||||
target datalayout = "e-m:o-p:32:32-i64:64-i128:128-n32:64-S128"
|
||||
|
|
@ -9,12 +10,16 @@ target triple = "arm64_32-apple-watchos2.0.0"
|
|||
|
||||
define <2 x i8*> @vector_gep(<2 x i8*> %0) {
|
||||
; CHECK-LABEL: vector_gep:
|
||||
; CHECK: adrp x[[REG8:[123]?[0-9]]], lCPI0_0@PAGE
|
||||
; CHECK: movi v[[REG1:[0-9]+]].2d, #0x000000ffffffff
|
||||
; CHECK: ldr q[[REG2:[0-9]+]], [x[[REG8]], lCPI0_0@PAGEOFF]
|
||||
; CHECK: add v[[REG0:[0-9]+]].2d, v[[REG0]].2d, v[[REG2]].2d
|
||||
; CHECK: and v[[REG0]].16b, v[[REG0]].16b, v[[REG1]].16b
|
||||
; CHECK: ret
|
||||
; CHECK: ; %bb.0: ; %entry
|
||||
; CHECK-NEXT: Lloh0:
|
||||
; CHECK-NEXT: adrp x8, lCPI0_0@PAGE
|
||||
; CHECK-NEXT: movi v2.2d, #0x000000ffffffff
|
||||
; CHECK-NEXT: Lloh1:
|
||||
; CHECK-NEXT: ldr q1, [x8, lCPI0_0@PAGEOFF]
|
||||
; CHECK-NEXT: add v0.2d, v0.2d, v1.2d
|
||||
; CHECK-NEXT: and v0.16b, v0.16b, v2.16b
|
||||
; CHECK-NEXT: ret
|
||||
; CHECK-NEXT: .loh AdrpLdr Lloh0, Lloh1
|
||||
entry:
|
||||
%1 = getelementptr i8, <2 x i8*> %0, <2 x i32> <i32 36, i32 4804>
|
||||
ret <2 x i8*> %1
|
||||
|
|
|
|||
|
|
@ -1,18 +1,21 @@
|
|||
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
|
||||
; RUN: llc < %s -mtriple=aarch64-pc-win32 | FileCheck %s
|
||||
|
||||
define void @pass_va(i32 %count, ...) nounwind {
|
||||
; CHECK-LABEL: pass_va:
|
||||
; CHECK: // %bb.0: // %entry
|
||||
; CHECK-NEXT: str x30, [sp, #-80]! // 8-byte Folded Spill
|
||||
; CHECK-NEXT: add x8, sp, #24
|
||||
; CHECK-NEXT: add x0, sp, #24
|
||||
; CHECK-NEXT: stp x3, x4, [sp, #40]
|
||||
; CHECK-NEXT: stp x1, x2, [sp, #24]
|
||||
; CHECK-NEXT: stp x5, x6, [sp, #56]
|
||||
; CHECK-NEXT: str x7, [sp, #72]
|
||||
; CHECK-NEXT: str x8, [sp, #8]
|
||||
; CHECK-NEXT: bl other_func
|
||||
; CHECK-NEXT: ldr x30, [sp], #80 // 8-byte Folded Reload
|
||||
; CHECK-NEXT: ret
|
||||
entry:
|
||||
; CHECK: str x30, [sp, #-80]!
|
||||
; CHECK: add x8, sp, #24
|
||||
; CHECK: add x0, sp, #24
|
||||
; CHECK: stp x3, x4, [sp, #40]
|
||||
; CHECK: stp x1, x2, [sp, #24]
|
||||
; CHECK: stp x5, x6, [sp, #56]
|
||||
; CHECK: str x7, [sp, #72]
|
||||
; CHECK: str x8, [sp, #8]
|
||||
; CHECK: bl other_func
|
||||
; CHECK: ldr x30, [sp], #80
|
||||
; CHECK: ret
|
||||
%ap = alloca i8*, align 8
|
||||
%ap1 = bitcast i8** %ap to i8*
|
||||
call void @llvm.va_start(i8* %ap1)
|
||||
|
|
@ -26,14 +29,15 @@ declare void @other_func(i8*) local_unnamed_addr
|
|||
declare void @llvm.va_start(i8*) nounwind
|
||||
declare void @llvm.va_copy(i8*, i8*) nounwind
|
||||
|
||||
; CHECK-LABEL: f9:
|
||||
; CHECK: sub sp, sp, #16
|
||||
; CHECK: add x8, sp, #24
|
||||
; CHECK: add x0, sp, #24
|
||||
; CHECK: str x8, [sp, #8]
|
||||
; CHECK: add sp, sp, #16
|
||||
; CHECK: ret
|
||||
define i8* @f9(i64 %a0, i64 %a1, i64 %a2, i64 %a3, i64 %a4, i64 %a5, i64 %a6, i64 %a7, i64 %a8, ...) nounwind {
|
||||
; CHECK-LABEL: f9:
|
||||
; CHECK: // %bb.0: // %entry
|
||||
; CHECK-NEXT: sub sp, sp, #16
|
||||
; CHECK-NEXT: add x8, sp, #24
|
||||
; CHECK-NEXT: add x0, sp, #24
|
||||
; CHECK-NEXT: str x8, [sp, #8]
|
||||
; CHECK-NEXT: add sp, sp, #16
|
||||
; CHECK-NEXT: ret
|
||||
entry:
|
||||
%ap = alloca i8*, align 8
|
||||
%ap1 = bitcast i8** %ap to i8*
|
||||
|
|
@ -42,14 +46,15 @@ entry:
|
|||
ret i8* %ap2
|
||||
}
|
||||
|
||||
; CHECK-LABEL: f8:
|
||||
; CHECK: sub sp, sp, #16
|
||||
; CHECK: add x8, sp, #16
|
||||
; CHECK: add x0, sp, #16
|
||||
; CHECK: str x8, [sp, #8]
|
||||
; CHECK: add sp, sp, #16
|
||||
; CHECK: ret
|
||||
define i8* @f8(i64 %a0, i64 %a1, i64 %a2, i64 %a3, i64 %a4, i64 %a5, i64 %a6, i64 %a7, ...) nounwind {
|
||||
; CHECK-LABEL: f8:
|
||||
; CHECK: // %bb.0: // %entry
|
||||
; CHECK-NEXT: sub sp, sp, #16
|
||||
; CHECK-NEXT: add x8, sp, #16
|
||||
; CHECK-NEXT: add x0, sp, #16
|
||||
; CHECK-NEXT: str x8, [sp, #8]
|
||||
; CHECK-NEXT: add sp, sp, #16
|
||||
; CHECK-NEXT: ret
|
||||
entry:
|
||||
%ap = alloca i8*, align 8
|
||||
%ap1 = bitcast i8** %ap to i8*
|
||||
|
|
@ -58,15 +63,16 @@ entry:
|
|||
ret i8* %ap2
|
||||
}
|
||||
|
||||
; CHECK-LABEL: f7:
|
||||
; CHECK: sub sp, sp, #32
|
||||
; CHECK: add x8, sp, #24
|
||||
; CHECK: add x0, sp, #24
|
||||
; CHECK: str x7, [sp, #24]
|
||||
; CHECK: str x8, [sp, #8]
|
||||
; CHECK: add sp, sp, #32
|
||||
; CHECK: ret
|
||||
define i8* @f7(i64 %a0, i64 %a1, i64 %a2, i64 %a3, i64 %a4, i64 %a5, i64 %a6, ...) nounwind {
|
||||
; CHECK-LABEL: f7:
|
||||
; CHECK: // %bb.0: // %entry
|
||||
; CHECK-NEXT: sub sp, sp, #32
|
||||
; CHECK-NEXT: add x8, sp, #24
|
||||
; CHECK-NEXT: add x0, sp, #24
|
||||
; CHECK-NEXT: str x7, [sp, #24]
|
||||
; CHECK-NEXT: str x8, [sp, #8]
|
||||
; CHECK-NEXT: add sp, sp, #32
|
||||
; CHECK-NEXT: ret
|
||||
entry:
|
||||
%ap = alloca i8*, align 8
|
||||
%ap1 = bitcast i8** %ap to i8*
|
||||
|
|
@ -75,16 +81,17 @@ entry:
|
|||
ret i8* %ap2
|
||||
}
|
||||
|
||||
; CHECK-LABEL: copy1:
|
||||
; CHECK: sub sp, sp, #80
|
||||
; CHECK: add x8, sp, #24
|
||||
; CHECK: stp x3, x4, [sp, #40]
|
||||
; CHECK: stp x1, x2, [sp, #24]
|
||||
; CHECK: stp x5, x6, [sp, #56]
|
||||
; CHECK: str x7, [sp, #72]
|
||||
; CHECK: stp x8, x8, [sp], #80
|
||||
; CHECK: ret
|
||||
define void @copy1(i64 %a0, ...) nounwind {
|
||||
; CHECK-LABEL: copy1:
|
||||
; CHECK: // %bb.0: // %entry
|
||||
; CHECK-NEXT: sub sp, sp, #80
|
||||
; CHECK-NEXT: add x8, sp, #24
|
||||
; CHECK-NEXT: stp x3, x4, [sp, #40]
|
||||
; CHECK-NEXT: stp x1, x2, [sp, #24]
|
||||
; CHECK-NEXT: stp x5, x6, [sp, #56]
|
||||
; CHECK-NEXT: str x7, [sp, #72]
|
||||
; CHECK-NEXT: stp x8, x8, [sp], #80
|
||||
; CHECK-NEXT: ret
|
||||
entry:
|
||||
%ap = alloca i8*, align 8
|
||||
%cp = alloca i8*, align 8
|
||||
|
|
@ -102,35 +109,49 @@ declare void @llvm.lifetime.end.p0i8(i64, i8* nocapture) #1
|
|||
declare i32 @__stdio_common_vsprintf(i64, i8*, i64, i8*, i8*, i8*) local_unnamed_addr #3
|
||||
declare i64* @__local_stdio_printf_options() local_unnamed_addr #4
|
||||
|
||||
; CHECK-LABEL: fp
|
||||
; CHECK: stp x19, x20, [sp, #-96]
|
||||
; CHECK: str x21, [sp, #16]
|
||||
; CHECK: stp x29, x30, [sp, #24]
|
||||
; CHECK: add x29, sp, #24
|
||||
; CHECK: add x8, x29, #32
|
||||
; CHECK: mov x19, x2
|
||||
; CHECK: mov x20, x1
|
||||
; CHECK: mov x21, x0
|
||||
; CHECK: stp x3, x4, [x29, #32]
|
||||
; CHECK: stp x5, x6, [x29, #48]
|
||||
; CHECK: str x7, [x29, #64]
|
||||
; CHECK: str x8, [x29, #16]
|
||||
; CHECK: bl __local_stdio_printf_options
|
||||
; CHECK: ldr x8, [x0]
|
||||
; CHECK: add x5, x29, #32
|
||||
; CHECK: mov x1, x21
|
||||
; CHECK: mov x2, x20
|
||||
; CHECK: mov x3, x19
|
||||
; CHECK: mov x4, xzr
|
||||
; CHECK: orr x0, x8, #0x2
|
||||
; CHECK: bl __stdio_common_vsprintf
|
||||
; CHECK: cmp w0, #0
|
||||
; CHECK: csinv w0, w0, wzr, ge
|
||||
; CHECK: ldp x29, x30, [sp, #24]
|
||||
; CHECK: ldr x21, [sp, #16]
|
||||
; CHECK: ldp x19, x20, [sp], #96
|
||||
; CHECK: ret
|
||||
define i32 @fp(i8*, i64, i8*, ...) local_unnamed_addr #6 {
|
||||
; CHECK-LABEL: fp:
|
||||
; CHECK: .seh_proc fp
|
||||
; CHECK-NEXT: // %bb.0:
|
||||
; CHECK-NEXT: stp x19, x20, [sp, #-96]! // 16-byte Folded Spill
|
||||
; CHECK-NEXT: .seh_save_regp_x x19, 96
|
||||
; CHECK-NEXT: str x21, [sp, #16] // 8-byte Folded Spill
|
||||
; CHECK-NEXT: .seh_save_reg x21, 16
|
||||
; CHECK-NEXT: stp x29, x30, [sp, #24] // 16-byte Folded Spill
|
||||
; CHECK-NEXT: .seh_save_fplr 24
|
||||
; CHECK-NEXT: add x29, sp, #24
|
||||
; CHECK-NEXT: .seh_add_fp 24
|
||||
; CHECK-NEXT: .seh_endprologue
|
||||
; CHECK-NEXT: add x8, x29, #32
|
||||
; CHECK-NEXT: mov x19, x2
|
||||
; CHECK-NEXT: mov x20, x1
|
||||
; CHECK-NEXT: mov x21, x0
|
||||
; CHECK-NEXT: stp x3, x4, [x29, #32]
|
||||
; CHECK-NEXT: stp x5, x6, [x29, #48]
|
||||
; CHECK-NEXT: str x7, [x29, #64]
|
||||
; CHECK-NEXT: str x8, [x29, #16]
|
||||
; CHECK-NEXT: bl __local_stdio_printf_options
|
||||
; CHECK-NEXT: ldr x8, [x0]
|
||||
; CHECK-NEXT: add x5, x29, #32
|
||||
; CHECK-NEXT: mov x1, x21
|
||||
; CHECK-NEXT: mov x2, x20
|
||||
; CHECK-NEXT: mov x3, x19
|
||||
; CHECK-NEXT: mov x4, xzr
|
||||
; CHECK-NEXT: orr x0, x8, #0x2
|
||||
; CHECK-NEXT: bl __stdio_common_vsprintf
|
||||
; CHECK-NEXT: cmp w0, #0
|
||||
; CHECK-NEXT: csinv w0, w0, wzr, ge
|
||||
; CHECK-NEXT: .seh_startepilogue
|
||||
; CHECK-NEXT: ldp x29, x30, [sp, #24] // 16-byte Folded Reload
|
||||
; CHECK-NEXT: .seh_save_fplr 24
|
||||
; CHECK-NEXT: ldr x21, [sp, #16] // 8-byte Folded Reload
|
||||
; CHECK-NEXT: .seh_save_reg x21, 16
|
||||
; CHECK-NEXT: ldp x19, x20, [sp], #96 // 16-byte Folded Reload
|
||||
; CHECK-NEXT: .seh_save_regp_x x19, 96
|
||||
; CHECK-NEXT: .seh_endepilogue
|
||||
; CHECK-NEXT: ret
|
||||
; CHECK-NEXT: .seh_endfunclet
|
||||
; CHECK-NEXT: .seh_endproc
|
||||
%4 = alloca i8*, align 8
|
||||
%5 = bitcast i8** %4 to i8*
|
||||
call void @llvm.lifetime.start.p0i8(i64 8, i8* nonnull %5) #2
|
||||
|
|
@ -149,45 +170,63 @@ define i32 @fp(i8*, i64, i8*, ...) local_unnamed_addr #6 {
|
|||
|
||||
attributes #6 = { "frame-pointer"="all" }
|
||||
|
||||
; CHECK-LABEL: vla
|
||||
; CHECK: stp x19, x20, [sp, #-112]!
|
||||
; CHECK: stp x21, x22, [sp, #16]
|
||||
; CHECK: str x23, [sp, #32]
|
||||
; CHECK: stp x29, x30, [sp, #40]
|
||||
; CHECK: add x29, sp, #40
|
||||
; CHECK: add x8, x29, #24
|
||||
; CHECK: mov w9, w0
|
||||
; CHECK: mov x19, x1
|
||||
; CHECK: mov [[REG2:x[0-9]+]], sp
|
||||
; CHECK: stp x3, x4, [x29, #32]
|
||||
; CHECK: stp x8, x2, [x29, #16]
|
||||
; CHECK: add x8, x9, #15
|
||||
; CHECK: lsr x15, x8, #4
|
||||
; CHECK: stp x5, x6, [x29, #48]
|
||||
; CHECK: str x7, [x29, #64]
|
||||
; CHECK: bl __chkstk
|
||||
; CHECK: mov x8, sp
|
||||
; CHECK: sub [[REG:x[0-9]+]], x8, x15, lsl #4
|
||||
; CHECK: mov sp, [[REG]]
|
||||
; CHECK: ldr [[REG3:x[0-9]+]], [x29, #16]
|
||||
; CHECK: sxtw [[REG4:x[0-9]+]], w0
|
||||
; CHECK: bl __local_stdio_printf_options
|
||||
; CHECK: ldr x8, [x0]
|
||||
; CHECK: mov x1, [[REG]]
|
||||
; CHECK: mov x2, [[REG4]]
|
||||
; CHECK: mov x3, x19
|
||||
; CHECK: mov x4, xzr
|
||||
; CHECK: mov x5, [[REG3]]
|
||||
; CHECK: orr x0, x8, #0x2
|
||||
; CHECK: bl __stdio_common_vsprintf
|
||||
; CHECK: mov sp, [[REG2]]
|
||||
; CHECK: sub sp, x29, #40
|
||||
; CHECK: ldp x29, x30, [sp, #40]
|
||||
; CHECK: ldr x23, [sp, #32]
|
||||
; CHECK: ldp x21, x22, [sp, #16]
|
||||
; CHECK: ldp x19, x20, [sp], #112
|
||||
; CHECK: ret
|
||||
define void @vla(i32, i8*, ...) local_unnamed_addr {
|
||||
; CHECK-LABEL: vla:
|
||||
; CHECK: .seh_proc vla
|
||||
; CHECK-NEXT: // %bb.0:
|
||||
; CHECK-NEXT: stp x19, x20, [sp, #-112]! // 16-byte Folded Spill
|
||||
; CHECK-NEXT: .seh_save_regp_x x19, 112
|
||||
; CHECK-NEXT: stp x21, x22, [sp, #16] // 16-byte Folded Spill
|
||||
; CHECK-NEXT: .seh_save_regp x21, 16
|
||||
; CHECK-NEXT: str x23, [sp, #32] // 8-byte Folded Spill
|
||||
; CHECK-NEXT: .seh_save_reg x23, 32
|
||||
; CHECK-NEXT: stp x29, x30, [sp, #40] // 16-byte Folded Spill
|
||||
; CHECK-NEXT: .seh_save_fplr 40
|
||||
; CHECK-NEXT: add x29, sp, #40
|
||||
; CHECK-NEXT: .seh_add_fp 40
|
||||
; CHECK-NEXT: .seh_endprologue
|
||||
; CHECK-NEXT: add x8, x29, #24
|
||||
; CHECK-NEXT: // kill: def $w0 killed $w0 def $x0
|
||||
; CHECK-NEXT: mov w9, w0
|
||||
; CHECK-NEXT: mov x19, x1
|
||||
; CHECK-NEXT: mov x23, sp
|
||||
; CHECK-NEXT: stp x3, x4, [x29, #32]
|
||||
; CHECK-NEXT: stp x8, x2, [x29, #16]
|
||||
; CHECK-NEXT: add x8, x9, #15
|
||||
; CHECK-NEXT: lsr x15, x8, #4
|
||||
; CHECK-NEXT: stp x5, x6, [x29, #48]
|
||||
; CHECK-NEXT: str x7, [x29, #64]
|
||||
; CHECK-NEXT: bl __chkstk
|
||||
; CHECK-NEXT: mov x8, sp
|
||||
; CHECK-NEXT: sub x20, x8, x15, lsl #4
|
||||
; CHECK-NEXT: mov sp, x20
|
||||
; CHECK-NEXT: ldr x21, [x29, #16]
|
||||
; CHECK-NEXT: sxtw x22, w0
|
||||
; CHECK-NEXT: bl __local_stdio_printf_options
|
||||
; CHECK-NEXT: ldr x8, [x0]
|
||||
; CHECK-NEXT: mov x1, x20
|
||||
; CHECK-NEXT: mov x2, x22
|
||||
; CHECK-NEXT: mov x3, x19
|
||||
; CHECK-NEXT: mov x4, xzr
|
||||
; CHECK-NEXT: mov x5, x21
|
||||
; CHECK-NEXT: orr x0, x8, #0x2
|
||||
; CHECK-NEXT: bl __stdio_common_vsprintf
|
||||
; CHECK-NEXT: mov sp, x23
|
||||
; CHECK-NEXT: .seh_startepilogue
|
||||
; CHECK-NEXT: sub sp, x29, #40
|
||||
; CHECK-NEXT: .seh_add_fp 40
|
||||
; CHECK-NEXT: ldp x29, x30, [sp, #40] // 16-byte Folded Reload
|
||||
; CHECK-NEXT: .seh_save_fplr 40
|
||||
; CHECK-NEXT: ldr x23, [sp, #32] // 8-byte Folded Reload
|
||||
; CHECK-NEXT: .seh_save_reg x23, 32
|
||||
; CHECK-NEXT: ldp x21, x22, [sp, #16] // 16-byte Folded Reload
|
||||
; CHECK-NEXT: .seh_save_regp x21, 16
|
||||
; CHECK-NEXT: ldp x19, x20, [sp], #112 // 16-byte Folded Reload
|
||||
; CHECK-NEXT: .seh_save_regp_x x19, 112
|
||||
; CHECK-NEXT: .seh_endepilogue
|
||||
; CHECK-NEXT: ret
|
||||
; CHECK-NEXT: .seh_endfunclet
|
||||
; CHECK-NEXT: .seh_endproc
|
||||
%3 = alloca i8*, align 8
|
||||
%4 = bitcast i8** %3 to i8*
|
||||
call void @llvm.lifetime.start.p0i8(i64 8, i8* nonnull %4) #5
|
||||
|
|
@ -210,34 +249,47 @@ define void @vla(i32, i8*, ...) local_unnamed_addr {
|
|||
declare i8* @llvm.stacksave()
|
||||
declare void @llvm.stackrestore(i8*)
|
||||
|
||||
; CHECK-LABEL: snprintf
|
||||
; CHECK-DAG: sub sp, sp, #96
|
||||
; CHECK-DAG: stp x19, x20, [sp, #16]
|
||||
; CHECK-DAG: stp x21, x30, [sp, #32]
|
||||
; CHECK-DAG: add x8, sp, #56
|
||||
; CHECK-DAG: mov x19, x2
|
||||
; CHECK-DAG: mov x20, x1
|
||||
; CHECK-DAG: mov x21, x0
|
||||
; CHECK-DAG: stp x3, x4, [sp, #56]
|
||||
; CHECK-DAG: stp x5, x6, [sp, #72]
|
||||
; CHECK-DAG: str x7, [sp, #88]
|
||||
; CHECK-DAG: str x8, [sp, #8]
|
||||
; CHECK-DAG: bl __local_stdio_printf_options
|
||||
; CHECK-DAG: ldr x8, [x0]
|
||||
; CHECK-DAG: add x5, sp, #56
|
||||
; CHECK-DAG: mov x1, x21
|
||||
; CHECK-DAG: mov x2, x20
|
||||
; CHECK-DAG: orr x0, x8, #0x2
|
||||
; CHECK-DAG: mov x3, x19
|
||||
; CHECK-DAG: mov x4, xzr
|
||||
; CHECK-DAG: bl __stdio_common_vsprintf
|
||||
; CHECK-DAG: ldp x21, x30, [sp, #32]
|
||||
; CHECK-DAG: ldp x19, x20, [sp, #16]
|
||||
; CHECK-DAG: cmp w0, #0
|
||||
; CHECK-DAG: csinv w0, w0, wzr, ge
|
||||
; CHECK-DAG: add sp, sp, #96
|
||||
; CHECK-DAG: ret
|
||||
define i32 @snprintf(i8*, i64, i8*, ...) local_unnamed_addr #5 {
|
||||
; CHECK-LABEL: snprintf:
|
||||
; CHECK: .seh_proc snprintf
|
||||
; CHECK-NEXT: // %bb.0:
|
||||
; CHECK-NEXT: sub sp, sp, #96
|
||||
; CHECK-NEXT: .seh_stackalloc 96
|
||||
; CHECK-NEXT: stp x19, x20, [sp, #16] // 16-byte Folded Spill
|
||||
; CHECK-NEXT: .seh_save_regp x19, 16
|
||||
; CHECK-NEXT: stp x21, x30, [sp, #32] // 16-byte Folded Spill
|
||||
; CHECK-NEXT: .seh_save_lrpair x21, 32
|
||||
; CHECK-NEXT: .seh_endprologue
|
||||
; CHECK-NEXT: add x8, sp, #56
|
||||
; CHECK-NEXT: mov x19, x2
|
||||
; CHECK-NEXT: mov x20, x1
|
||||
; CHECK-NEXT: mov x21, x0
|
||||
; CHECK-NEXT: stp x3, x4, [sp, #56]
|
||||
; CHECK-NEXT: stp x5, x6, [sp, #72]
|
||||
; CHECK-NEXT: str x7, [sp, #88]
|
||||
; CHECK-NEXT: str x8, [sp, #8]
|
||||
; CHECK-NEXT: bl __local_stdio_printf_options
|
||||
; CHECK-NEXT: ldr x8, [x0]
|
||||
; CHECK-NEXT: add x5, sp, #56
|
||||
; CHECK-NEXT: mov x1, x21
|
||||
; CHECK-NEXT: mov x2, x20
|
||||
; CHECK-NEXT: mov x3, x19
|
||||
; CHECK-NEXT: mov x4, xzr
|
||||
; CHECK-NEXT: orr x0, x8, #0x2
|
||||
; CHECK-NEXT: bl __stdio_common_vsprintf
|
||||
; CHECK-NEXT: cmp w0, #0
|
||||
; CHECK-NEXT: csinv w0, w0, wzr, ge
|
||||
; CHECK-NEXT: .seh_startepilogue
|
||||
; CHECK-NEXT: ldp x21, x30, [sp, #32] // 16-byte Folded Reload
|
||||
; CHECK-NEXT: .seh_save_lrpair x21, 32
|
||||
; CHECK-NEXT: ldp x19, x20, [sp, #16] // 16-byte Folded Reload
|
||||
; CHECK-NEXT: .seh_save_regp x19, 16
|
||||
; CHECK-NEXT: add sp, sp, #96
|
||||
; CHECK-NEXT: .seh_stackalloc 96
|
||||
; CHECK-NEXT: .seh_endepilogue
|
||||
; CHECK-NEXT: ret
|
||||
; CHECK-NEXT: .seh_endfunclet
|
||||
; CHECK-NEXT: .seh_endproc
|
||||
%4 = alloca i8*, align 8
|
||||
%5 = bitcast i8** %4 to i8*
|
||||
call void @llvm.lifetime.start.p0i8(i64 8, i8* nonnull %5) #2
|
||||
|
|
@ -254,24 +306,25 @@ define i32 @snprintf(i8*, i64, i8*, ...) local_unnamed_addr #5 {
|
|||
ret i32 %12
|
||||
}
|
||||
|
||||
; CHECK-LABEL: fixed_params
|
||||
; CHECK: sub sp, sp, #32
|
||||
; CHECK: mov w8, w4
|
||||
; CHECK: mov w6, w3
|
||||
; CHECK: mov w4, w2
|
||||
; CHECK: mov w2, w1
|
||||
; CHECK: fmov x1, d0
|
||||
; CHECK: fmov x3, d1
|
||||
; CHECK: fmov x5, d2
|
||||
; CHECK: fmov x7, d3
|
||||
; CHECK: str x30, [sp, #16]
|
||||
; CHECK: str d4, [sp, #8]
|
||||
; CHECK: str w8, [sp]
|
||||
; CHECK: bl varargs
|
||||
; CHECK: ldr x30, [sp, #16]
|
||||
; CHECK: add sp, sp, #32
|
||||
; CHECK: ret
|
||||
define void @fixed_params(i32, double, i32, double, i32, double, i32, double, i32, double) nounwind {
|
||||
; CHECK-LABEL: fixed_params:
|
||||
; CHECK: // %bb.0:
|
||||
; CHECK-NEXT: sub sp, sp, #32
|
||||
; CHECK-NEXT: mov w8, w4
|
||||
; CHECK-NEXT: mov w6, w3
|
||||
; CHECK-NEXT: mov w4, w2
|
||||
; CHECK-NEXT: mov w2, w1
|
||||
; CHECK-NEXT: fmov x1, d0
|
||||
; CHECK-NEXT: fmov x3, d1
|
||||
; CHECK-NEXT: fmov x5, d2
|
||||
; CHECK-NEXT: fmov x7, d3
|
||||
; CHECK-NEXT: str x30, [sp, #16] // 8-byte Folded Spill
|
||||
; CHECK-NEXT: str d4, [sp, #8]
|
||||
; CHECK-NEXT: str w8, [sp]
|
||||
; CHECK-NEXT: bl varargs
|
||||
; CHECK-NEXT: ldr x30, [sp, #16] // 8-byte Folded Reload
|
||||
; CHECK-NEXT: add sp, sp, #32
|
||||
; CHECK-NEXT: ret
|
||||
tail call void (i32, ...) @varargs(i32 %0, double %1, i32 %2, double %3, i32 %4, double %5, i32 %6, double %7, i32 %8, double %9)
|
||||
ret void
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,25 +1,42 @@
|
|||
; RUN: llc < %s -mtriple=aarch64-windows -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,DAGISEL
|
||||
; RUN: llc < %s -mtriple=aarch64-windows -verify-machineinstrs -O0 -fast-isel | FileCheck %s --check-prefixes=CHECK,O0
|
||||
; RUN: llc < %s -mtriple=aarch64-windows -verify-machineinstrs -O0 -global-isel | FileCheck %s --check-prefixes=CHECK,O0
|
||||
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
|
||||
; RUN: llc < %s -mtriple=aarch64-windows -verify-machineinstrs | FileCheck %s --check-prefixes=DAGISEL
|
||||
; RUN: llc < %s -mtriple=aarch64-windows -verify-machineinstrs -O0 -fast-isel | FileCheck %s --check-prefixes=O0,FASTISEL
|
||||
; RUN: llc < %s -mtriple=aarch64-windows -verify-machineinstrs -O0 -global-isel | FileCheck %s --check-prefixes=O0,GISEL
|
||||
|
||||
define void @float_va_fn(float %a, i32 %b, ...) nounwind {
|
||||
; DAGISEL-LABEL: float_va_fn:
|
||||
; DAGISEL: // %bb.0: // %entry
|
||||
; DAGISEL-NEXT: str x30, [sp, #-64]! // 8-byte Folded Spill
|
||||
; DAGISEL-NEXT: add x8, sp, #16
|
||||
; DAGISEL-NEXT: fmov s0, w0
|
||||
; DAGISEL-NEXT: add x0, sp, #16
|
||||
; DAGISEL-NEXT: stp x3, x4, [sp, #24]
|
||||
; DAGISEL-NEXT: stp x5, x6, [sp, #40]
|
||||
; DAGISEL-NEXT: stp x8, x2, [sp, #8]
|
||||
; DAGISEL-NEXT: str x7, [sp, #56]
|
||||
; DAGISEL-NEXT: bl f_va_list
|
||||
; DAGISEL-NEXT: ldr x30, [sp], #64 // 8-byte Folded Reload
|
||||
; DAGISEL-NEXT: ret
|
||||
;
|
||||
; O0-LABEL: float_va_fn:
|
||||
; O0: // %bb.0: // %entry
|
||||
; O0-NEXT: sub sp, sp, #80
|
||||
; O0-NEXT: str x30, [sp, #16] // 8-byte Folded Spill
|
||||
; O0-NEXT: str x7, [sp, #72]
|
||||
; O0-NEXT: str x6, [sp, #64]
|
||||
; O0-NEXT: str x5, [sp, #56]
|
||||
; O0-NEXT: str x4, [sp, #48]
|
||||
; O0-NEXT: str x3, [sp, #40]
|
||||
; O0-NEXT: str x2, [sp, #32]
|
||||
; O0-NEXT: fmov s0, w0
|
||||
; O0-NEXT: add x8, sp, #32
|
||||
; O0-NEXT: str x8, [sp, #8]
|
||||
; O0-NEXT: ldr x0, [sp, #8]
|
||||
; O0-NEXT: bl f_va_list
|
||||
; O0-NEXT: ldr x30, [sp, #16] // 8-byte Folded Reload
|
||||
; O0-NEXT: add sp, sp, #80
|
||||
; O0-NEXT: ret
|
||||
entry:
|
||||
; CHECK-LABEL: float_va_fn:
|
||||
; O0: str x7, [sp, #72]
|
||||
; O0: str x6, [sp, #64]
|
||||
; O0: str x5, [sp, #56]
|
||||
; O0: str x4, [sp, #48]
|
||||
; O0: str x3, [sp, #40]
|
||||
; O0: str x2, [sp, #32]
|
||||
; CHECK: fmov s0, w0
|
||||
; O0: add x8, sp, #32
|
||||
; O0: str x8, [sp, #8]
|
||||
; O0: ldr x0, [sp, #8]
|
||||
; DAGISEL: add x0, sp, #16
|
||||
; DAGISEL: stp x3, x4, [sp, #24]
|
||||
; DAGISEL: stp x5, x6, [sp, #40]
|
||||
; DAGISEL: stp x8, x2, [sp, #8]
|
||||
; CHECK: bl f_va_list
|
||||
%ap = alloca i8*, align 8
|
||||
%0 = bitcast i8** %ap to i8*
|
||||
call void @llvm.lifetime.start.p0i8(i64 8, i8* nonnull %0)
|
||||
|
|
@ -38,23 +55,39 @@ declare void @llvm.va_end(i8*)
|
|||
declare void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture)
|
||||
|
||||
define void @double_va_fn(double %a, i32 %b, ...) nounwind {
|
||||
; DAGISEL-LABEL: double_va_fn:
|
||||
; DAGISEL: // %bb.0: // %entry
|
||||
; DAGISEL-NEXT: str x30, [sp, #-64]! // 8-byte Folded Spill
|
||||
; DAGISEL-NEXT: add x8, sp, #16
|
||||
; DAGISEL-NEXT: fmov d0, x0
|
||||
; DAGISEL-NEXT: add x0, sp, #16
|
||||
; DAGISEL-NEXT: stp x3, x4, [sp, #24]
|
||||
; DAGISEL-NEXT: stp x5, x6, [sp, #40]
|
||||
; DAGISEL-NEXT: stp x8, x2, [sp, #8]
|
||||
; DAGISEL-NEXT: str x7, [sp, #56]
|
||||
; DAGISEL-NEXT: bl d_va_list
|
||||
; DAGISEL-NEXT: ldr x30, [sp], #64 // 8-byte Folded Reload
|
||||
; DAGISEL-NEXT: ret
|
||||
;
|
||||
; O0-LABEL: double_va_fn:
|
||||
; O0: // %bb.0: // %entry
|
||||
; O0-NEXT: sub sp, sp, #80
|
||||
; O0-NEXT: str x30, [sp, #16] // 8-byte Folded Spill
|
||||
; O0-NEXT: str x7, [sp, #72]
|
||||
; O0-NEXT: str x6, [sp, #64]
|
||||
; O0-NEXT: str x5, [sp, #56]
|
||||
; O0-NEXT: str x4, [sp, #48]
|
||||
; O0-NEXT: str x3, [sp, #40]
|
||||
; O0-NEXT: str x2, [sp, #32]
|
||||
; O0-NEXT: fmov d0, x0
|
||||
; O0-NEXT: add x8, sp, #32
|
||||
; O0-NEXT: str x8, [sp, #8]
|
||||
; O0-NEXT: ldr x0, [sp, #8]
|
||||
; O0-NEXT: bl d_va_list
|
||||
; O0-NEXT: ldr x30, [sp, #16] // 8-byte Folded Reload
|
||||
; O0-NEXT: add sp, sp, #80
|
||||
; O0-NEXT: ret
|
||||
entry:
|
||||
; CHECK-LABEL: double_va_fn:
|
||||
; O0: str x7, [sp, #72]
|
||||
; O0: str x6, [sp, #64]
|
||||
; O0: str x5, [sp, #56]
|
||||
; O0: str x4, [sp, #48]
|
||||
; O0: str x3, [sp, #40]
|
||||
; O0: str x2, [sp, #32]
|
||||
; CHECK: fmov d0, x0
|
||||
; O0: add x8, sp, #32
|
||||
; O0: str x8, [sp, #8]
|
||||
; O0: ldr x0, [sp, #8]
|
||||
; DAGISEL: add x0, sp, #16
|
||||
; DAGISEL: stp x3, x4, [sp, #24]
|
||||
; DAGISEL: stp x5, x6, [sp, #40]
|
||||
; DAGISEL: stp x8, x2, [sp, #8]
|
||||
; CHECK: bl d_va_list
|
||||
%ap = alloca i8*, align 8
|
||||
%0 = bitcast i8** %ap to i8*
|
||||
call void @llvm.lifetime.start.p0i8(i64 8, i8* nonnull %0)
|
||||
|
|
@ -69,19 +102,32 @@ entry:
|
|||
declare void @d_va_list(double, i8*)
|
||||
|
||||
define void @call_f_va() nounwind {
|
||||
; DAGISEL-LABEL: call_f_va:
|
||||
; DAGISEL: // %bb.0: // %entry
|
||||
; DAGISEL-NEXT: mov w0, #1065353216
|
||||
; DAGISEL-NEXT: mov w1, #2
|
||||
; DAGISEL-NEXT: mov x2, #4613937818241073152
|
||||
; DAGISEL-NEXT: mov w3, #4
|
||||
; DAGISEL-NEXT: b other_f_va_fn
|
||||
;
|
||||
; FASTISEL-LABEL: call_f_va:
|
||||
; FASTISEL: // %bb.0: // %entry
|
||||
; FASTISEL-NEXT: mov w0, #1065353216
|
||||
; FASTISEL-NEXT: mov w1, #2
|
||||
; FASTISEL-NEXT: mov x2, #4613937818241073152
|
||||
; FASTISEL-NEXT: mov w3, #4
|
||||
; FASTISEL-NEXT: b other_f_va_fn
|
||||
;
|
||||
; GISEL-LABEL: call_f_va:
|
||||
; GISEL: // %bb.0: // %entry
|
||||
; GISEL-NEXT: fmov s0, #1.00000000
|
||||
; GISEL-NEXT: fmov w0, s0
|
||||
; GISEL-NEXT: mov w1, #2
|
||||
; GISEL-NEXT: fmov d0, #3.00000000
|
||||
; GISEL-NEXT: fmov x2, d0
|
||||
; GISEL-NEXT: mov w3, #4
|
||||
; GISEL-NEXT: b other_f_va_fn
|
||||
entry:
|
||||
; CHECK-LABEL: call_f_va:
|
||||
; DAGISEL: mov w0, #1065353216
|
||||
; FASTISEL: mov w0, #1065353216
|
||||
; GISEL: fmov s0, #1.00000000
|
||||
; GISEL: fmov w0, s0
|
||||
; CHECK: mov w1, #2
|
||||
; DAGISEL: mov x2, #4613937818241073152
|
||||
; FASTISEL: mov x2, #4613937818241073152
|
||||
; GISEL: fmov d0, #3.00000000
|
||||
; GISEL: fmov x2, d0
|
||||
; CHECK: mov w3, #4
|
||||
; CHECK: b other_f_va_fn
|
||||
tail call void (float, i32, ...) @other_f_va_fn(float 1.000000e+00, i32 2, double 3.000000e+00, i32 4)
|
||||
ret void
|
||||
}
|
||||
|
|
@ -89,18 +135,32 @@ entry:
|
|||
declare void @other_f_va_fn(float, i32, ...)
|
||||
|
||||
define void @call_d_va() nounwind {
|
||||
; DAGISEL-LABEL: call_d_va:
|
||||
; DAGISEL: // %bb.0: // %entry
|
||||
; DAGISEL-NEXT: mov x0, #4607182418800017408
|
||||
; DAGISEL-NEXT: mov w1, #2
|
||||
; DAGISEL-NEXT: mov x2, #4613937818241073152
|
||||
; DAGISEL-NEXT: mov w3, #4
|
||||
; DAGISEL-NEXT: b other_d_va_fn
|
||||
;
|
||||
; FASTISEL-LABEL: call_d_va:
|
||||
; FASTISEL: // %bb.0: // %entry
|
||||
; FASTISEL-NEXT: mov x0, #4607182418800017408
|
||||
; FASTISEL-NEXT: mov w1, #2
|
||||
; FASTISEL-NEXT: mov x2, #4613937818241073152
|
||||
; FASTISEL-NEXT: mov w3, #4
|
||||
; FASTISEL-NEXT: b other_d_va_fn
|
||||
;
|
||||
; GISEL-LABEL: call_d_va:
|
||||
; GISEL: // %bb.0: // %entry
|
||||
; GISEL-NEXT: fmov d0, #1.00000000
|
||||
; GISEL-NEXT: fmov x0, d0
|
||||
; GISEL-NEXT: mov w1, #2
|
||||
; GISEL-NEXT: fmov d0, #3.00000000
|
||||
; GISEL-NEXT: fmov x2, d0
|
||||
; GISEL-NEXT: mov w3, #4
|
||||
; GISEL-NEXT: b other_d_va_fn
|
||||
entry:
|
||||
; CHECK-LABEL: call_d_va:
|
||||
; DAGISEL: mov x0, #4607182418800017408
|
||||
; FASTISEL: mov x0, #4607182418800017408
|
||||
; GISEL: fmov d0, #1.00000000
|
||||
; GISEL: fmov x0, d0
|
||||
; CHECK: mov w1, #2
|
||||
; DAGISEL: mov x2, #4613937818241073152
|
||||
; FASTISEL: mov x2, #4613937818241073152
|
||||
; GISEL: fmov d0, #3.00000000
|
||||
; CHECK: mov w3, #4
|
||||
; CHECK: b other_d_va_fn
|
||||
tail call void (double, i32, ...) @other_d_va_fn(double 1.000000e+00, i32 2, double 3.000000e+00, i32 4)
|
||||
ret void
|
||||
}
|
||||
|
|
@ -108,13 +168,22 @@ entry:
|
|||
declare void @other_d_va_fn(double, i32, ...)
|
||||
|
||||
define void @call_d_non_va() nounwind {
|
||||
; DAGISEL-LABEL: call_d_non_va:
|
||||
; DAGISEL: // %bb.0: // %entry
|
||||
; DAGISEL-NEXT: fmov d0, #1.00000000
|
||||
; DAGISEL-NEXT: fmov d1, #3.00000000
|
||||
; DAGISEL-NEXT: mov w0, #2
|
||||
; DAGISEL-NEXT: mov w1, #4
|
||||
; DAGISEL-NEXT: b other_d_non_va_fn
|
||||
;
|
||||
; O0-LABEL: call_d_non_va:
|
||||
; O0: // %bb.0: // %entry
|
||||
; O0-NEXT: fmov d0, #1.00000000
|
||||
; O0-NEXT: mov w0, #2
|
||||
; O0-NEXT: fmov d1, #3.00000000
|
||||
; O0-NEXT: mov w1, #4
|
||||
; O0-NEXT: b other_d_non_va_fn
|
||||
entry:
|
||||
; CHECK-LABEL: call_d_non_va:
|
||||
; CHECK-DAG: fmov d0, #1.00000000
|
||||
; CHECK-DAG: fmov d1, #3.00000000
|
||||
; CHECK-DAG: mov w0, #2
|
||||
; CHECK-DAG: mov w1, #4
|
||||
; CHECK: b other_d_non_va_fn
|
||||
tail call void (double, i32, double, i32) @other_d_non_va_fn(double 1.000000e+00, i32 2, double 3.000000e+00, i32 4)
|
||||
ret void
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,25 +1,42 @@
|
|||
; RUN: llc < %s -mtriple=aarch64-linux -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,DAGISEL
|
||||
; RUN: llc < %s -mtriple=aarch64-linux -verify-machineinstrs -O0 -fast-isel | FileCheck %s --check-prefixes=CHECK,O0
|
||||
; RUN: llc < %s -mtriple=aarch64-linux -verify-machineinstrs -O0 -global-isel | FileCheck %s --check-prefixes=CHECK,O0
|
||||
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
|
||||
; RUN: llc < %s -mtriple=aarch64-windows -verify-machineinstrs | FileCheck %s --check-prefixes=DAGISEL
|
||||
; RUN: llc < %s -mtriple=aarch64-windows -verify-machineinstrs -O0 -fast-isel | FileCheck %s --check-prefixes=O0,FASTISEL
|
||||
; RUN: llc < %s -mtriple=aarch64-windows -verify-machineinstrs -O0 -global-isel | FileCheck %s --check-prefixes=O0,GISEL
|
||||
|
||||
define win64cc void @float_va_fn(float %a, i32 %b, ...) nounwind {
|
||||
; DAGISEL-LABEL: float_va_fn:
|
||||
; DAGISEL: // %bb.0: // %entry
|
||||
; DAGISEL-NEXT: str x30, [sp, #-64]! // 8-byte Folded Spill
|
||||
; DAGISEL-NEXT: add x8, sp, #16
|
||||
; DAGISEL-NEXT: fmov s0, w0
|
||||
; DAGISEL-NEXT: add x0, sp, #16
|
||||
; DAGISEL-NEXT: stp x3, x4, [sp, #24]
|
||||
; DAGISEL-NEXT: stp x5, x6, [sp, #40]
|
||||
; DAGISEL-NEXT: stp x8, x2, [sp, #8]
|
||||
; DAGISEL-NEXT: str x7, [sp, #56]
|
||||
; DAGISEL-NEXT: bl f_va_list
|
||||
; DAGISEL-NEXT: ldr x30, [sp], #64 // 8-byte Folded Reload
|
||||
; DAGISEL-NEXT: ret
|
||||
;
|
||||
; O0-LABEL: float_va_fn:
|
||||
; O0: // %bb.0: // %entry
|
||||
; O0-NEXT: sub sp, sp, #80
|
||||
; O0-NEXT: str x30, [sp, #16] // 8-byte Folded Spill
|
||||
; O0-NEXT: str x7, [sp, #72]
|
||||
; O0-NEXT: str x6, [sp, #64]
|
||||
; O0-NEXT: str x5, [sp, #56]
|
||||
; O0-NEXT: str x4, [sp, #48]
|
||||
; O0-NEXT: str x3, [sp, #40]
|
||||
; O0-NEXT: str x2, [sp, #32]
|
||||
; O0-NEXT: fmov s0, w0
|
||||
; O0-NEXT: add x8, sp, #32
|
||||
; O0-NEXT: str x8, [sp, #8]
|
||||
; O0-NEXT: ldr x0, [sp, #8]
|
||||
; O0-NEXT: bl f_va_list
|
||||
; O0-NEXT: ldr x30, [sp, #16] // 8-byte Folded Reload
|
||||
; O0-NEXT: add sp, sp, #80
|
||||
; O0-NEXT: ret
|
||||
entry:
|
||||
; CHECK-LABEL: float_va_fn:
|
||||
; O0: str x7, [sp, #72]
|
||||
; O0: str x6, [sp, #64]
|
||||
; O0: str x5, [sp, #56]
|
||||
; O0: str x4, [sp, #48]
|
||||
; O0: str x3, [sp, #40]
|
||||
; O0: str x2, [sp, #32]
|
||||
; CHECK: fmov s0, w0
|
||||
; O0: add x8, sp, #32
|
||||
; O0: str x8, [sp, #8]
|
||||
; O0: ldr x0, [sp, #8]
|
||||
; DAGISEL: add x0, sp, #32
|
||||
; DAGISEL: stp x3, x4, [sp, #40]
|
||||
; DAGISEL: str x2, [sp, #32]
|
||||
; DAGISEL: stp x5, x6, [sp, #56]
|
||||
; CHECK: bl f_va_list
|
||||
%ap = alloca i8*, align 8
|
||||
%0 = bitcast i8** %ap to i8*
|
||||
call void @llvm.lifetime.start.p0i8(i64 8, i8* nonnull %0)
|
||||
|
|
@ -38,23 +55,39 @@ declare void @llvm.va_end(i8*)
|
|||
declare void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture)
|
||||
|
||||
define win64cc void @double_va_fn(double %a, i32 %b, ...) nounwind {
|
||||
; DAGISEL-LABEL: double_va_fn:
|
||||
; DAGISEL: // %bb.0: // %entry
|
||||
; DAGISEL-NEXT: str x30, [sp, #-64]! // 8-byte Folded Spill
|
||||
; DAGISEL-NEXT: add x8, sp, #16
|
||||
; DAGISEL-NEXT: fmov d0, x0
|
||||
; DAGISEL-NEXT: add x0, sp, #16
|
||||
; DAGISEL-NEXT: stp x3, x4, [sp, #24]
|
||||
; DAGISEL-NEXT: stp x5, x6, [sp, #40]
|
||||
; DAGISEL-NEXT: stp x8, x2, [sp, #8]
|
||||
; DAGISEL-NEXT: str x7, [sp, #56]
|
||||
; DAGISEL-NEXT: bl d_va_list
|
||||
; DAGISEL-NEXT: ldr x30, [sp], #64 // 8-byte Folded Reload
|
||||
; DAGISEL-NEXT: ret
|
||||
;
|
||||
; O0-LABEL: double_va_fn:
|
||||
; O0: // %bb.0: // %entry
|
||||
; O0-NEXT: sub sp, sp, #80
|
||||
; O0-NEXT: str x30, [sp, #16] // 8-byte Folded Spill
|
||||
; O0-NEXT: str x7, [sp, #72]
|
||||
; O0-NEXT: str x6, [sp, #64]
|
||||
; O0-NEXT: str x5, [sp, #56]
|
||||
; O0-NEXT: str x4, [sp, #48]
|
||||
; O0-NEXT: str x3, [sp, #40]
|
||||
; O0-NEXT: str x2, [sp, #32]
|
||||
; O0-NEXT: fmov d0, x0
|
||||
; O0-NEXT: add x8, sp, #32
|
||||
; O0-NEXT: str x8, [sp, #8]
|
||||
; O0-NEXT: ldr x0, [sp, #8]
|
||||
; O0-NEXT: bl d_va_list
|
||||
; O0-NEXT: ldr x30, [sp, #16] // 8-byte Folded Reload
|
||||
; O0-NEXT: add sp, sp, #80
|
||||
; O0-NEXT: ret
|
||||
entry:
|
||||
; CHECK-LABEL: double_va_fn:
|
||||
; O0: str x7, [sp, #72]
|
||||
; O0: str x6, [sp, #64]
|
||||
; O0: str x5, [sp, #56]
|
||||
; O0: str x4, [sp, #48]
|
||||
; O0: str x3, [sp, #40]
|
||||
; O0: str x2, [sp, #32]
|
||||
; CHECK: fmov d0, x0
|
||||
; O0: add x8, sp, #32
|
||||
; O0: str x8, [sp, #8]
|
||||
; O0: ldr x0, [sp, #8]
|
||||
; DAGISEL: add x0, sp, #32
|
||||
; DAGISEL: stp x3, x4, [sp, #40]
|
||||
; DAGISEL: str x2, [sp, #32]
|
||||
; DAGISEL: stp x5, x6, [sp, #56]
|
||||
; CHECK: bl d_va_list
|
||||
%ap = alloca i8*, align 8
|
||||
%0 = bitcast i8** %ap to i8*
|
||||
call void @llvm.lifetime.start.p0i8(i64 8, i8* nonnull %0)
|
||||
|
|
@ -69,19 +102,41 @@ entry:
|
|||
declare void @d_va_list(double, i8*)
|
||||
|
||||
define void @call_f_va() nounwind {
|
||||
; DAGISEL-LABEL: call_f_va:
|
||||
; DAGISEL: // %bb.0: // %entry
|
||||
; DAGISEL-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
|
||||
; DAGISEL-NEXT: mov w0, #1065353216
|
||||
; DAGISEL-NEXT: mov w1, #2
|
||||
; DAGISEL-NEXT: mov x2, #4613937818241073152
|
||||
; DAGISEL-NEXT: mov w3, #4
|
||||
; DAGISEL-NEXT: bl other_f_va_fn
|
||||
; DAGISEL-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
|
||||
; DAGISEL-NEXT: ret
|
||||
;
|
||||
; FASTISEL-LABEL: call_f_va:
|
||||
; FASTISEL: // %bb.0: // %entry
|
||||
; FASTISEL-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
|
||||
; FASTISEL-NEXT: mov w0, #1065353216
|
||||
; FASTISEL-NEXT: mov w1, #2
|
||||
; FASTISEL-NEXT: mov x2, #4613937818241073152
|
||||
; FASTISEL-NEXT: mov w3, #4
|
||||
; FASTISEL-NEXT: bl other_f_va_fn
|
||||
; FASTISEL-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
|
||||
; FASTISEL-NEXT: ret
|
||||
;
|
||||
; GISEL-LABEL: call_f_va:
|
||||
; GISEL: // %bb.0: // %entry
|
||||
; GISEL-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
|
||||
; GISEL-NEXT: fmov s0, #1.00000000
|
||||
; GISEL-NEXT: fmov w0, s0
|
||||
; GISEL-NEXT: mov w1, #2
|
||||
; GISEL-NEXT: fmov d0, #3.00000000
|
||||
; GISEL-NEXT: fmov x2, d0
|
||||
; GISEL-NEXT: mov w3, #4
|
||||
; GISEL-NEXT: bl other_f_va_fn
|
||||
; GISEL-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
|
||||
; GISEL-NEXT: ret
|
||||
entry:
|
||||
; CHECK-LABEL: call_f_va:
|
||||
; DAGISEL: mov w0, #1065353216
|
||||
; FASTISEL: mov w0, #1065353216
|
||||
; GISEL: fmov s0, #1.00000000
|
||||
; GISEL: fmov w0, s0
|
||||
; CHECK: mov w1, #2
|
||||
; DAGISEL: mov x2, #4613937818241073152
|
||||
; FASTISEL: mov x2, #4613937818241073152
|
||||
; GISEL: fmov d0, #3.00000000
|
||||
; GISEL: fmov x2, d0
|
||||
; CHECK: mov w3, #4
|
||||
; CHECK: bl other_f_va_fn
|
||||
tail call win64cc void (float, i32, ...) @other_f_va_fn(float 1.000000e+00, i32 2, double 3.000000e+00, i32 4)
|
||||
ret void
|
||||
}
|
||||
|
|
@ -89,18 +144,41 @@ entry:
|
|||
declare win64cc void @other_f_va_fn(float, i32, ...)
|
||||
|
||||
define void @call_d_va() nounwind {
|
||||
; DAGISEL-LABEL: call_d_va:
|
||||
; DAGISEL: // %bb.0: // %entry
|
||||
; DAGISEL-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
|
||||
; DAGISEL-NEXT: mov x0, #4607182418800017408
|
||||
; DAGISEL-NEXT: mov w1, #2
|
||||
; DAGISEL-NEXT: mov x2, #4613937818241073152
|
||||
; DAGISEL-NEXT: mov w3, #4
|
||||
; DAGISEL-NEXT: bl other_d_va_fn
|
||||
; DAGISEL-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
|
||||
; DAGISEL-NEXT: ret
|
||||
;
|
||||
; FASTISEL-LABEL: call_d_va:
|
||||
; FASTISEL: // %bb.0: // %entry
|
||||
; FASTISEL-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
|
||||
; FASTISEL-NEXT: mov x0, #4607182418800017408
|
||||
; FASTISEL-NEXT: mov w1, #2
|
||||
; FASTISEL-NEXT: mov x2, #4613937818241073152
|
||||
; FASTISEL-NEXT: mov w3, #4
|
||||
; FASTISEL-NEXT: bl other_d_va_fn
|
||||
; FASTISEL-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
|
||||
; FASTISEL-NEXT: ret
|
||||
;
|
||||
; GISEL-LABEL: call_d_va:
|
||||
; GISEL: // %bb.0: // %entry
|
||||
; GISEL-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
|
||||
; GISEL-NEXT: fmov d0, #1.00000000
|
||||
; GISEL-NEXT: fmov x0, d0
|
||||
; GISEL-NEXT: mov w1, #2
|
||||
; GISEL-NEXT: fmov d0, #3.00000000
|
||||
; GISEL-NEXT: fmov x2, d0
|
||||
; GISEL-NEXT: mov w3, #4
|
||||
; GISEL-NEXT: bl other_d_va_fn
|
||||
; GISEL-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
|
||||
; GISEL-NEXT: ret
|
||||
entry:
|
||||
; CHECK-LABEL: call_d_va:
|
||||
; DAGISEL: mov x0, #4607182418800017408
|
||||
; FASTISEL: mov x0, #4607182418800017408
|
||||
; GISEL: fmov d0, #1.00000000
|
||||
; GISEL: fmov x0, d0
|
||||
; CHECK: mov w1, #2
|
||||
; DAGISEL: mov x2, #4613937818241073152
|
||||
; FASTISEL: mov x2, #4613937818241073152
|
||||
; GISEL: fmov d0, #3.00000000
|
||||
; CHECK: mov w3, #4
|
||||
; CHECK: bl other_d_va_fn
|
||||
tail call win64cc void (double, i32, ...) @other_d_va_fn(double 1.000000e+00, i32 2, double 3.000000e+00, i32 4)
|
||||
ret void
|
||||
}
|
||||
|
|
@ -108,13 +186,28 @@ entry:
|
|||
declare win64cc void @other_d_va_fn(double, i32, ...)
|
||||
|
||||
define void @call_d_non_va() nounwind {
|
||||
; DAGISEL-LABEL: call_d_non_va:
|
||||
; DAGISEL: // %bb.0: // %entry
|
||||
; DAGISEL-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
|
||||
; DAGISEL-NEXT: fmov d0, #1.00000000
|
||||
; DAGISEL-NEXT: fmov d1, #3.00000000
|
||||
; DAGISEL-NEXT: mov w0, #2
|
||||
; DAGISEL-NEXT: mov w1, #4
|
||||
; DAGISEL-NEXT: bl other_d_non_va_fn
|
||||
; DAGISEL-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
|
||||
; DAGISEL-NEXT: ret
|
||||
;
|
||||
; O0-LABEL: call_d_non_va:
|
||||
; O0: // %bb.0: // %entry
|
||||
; O0-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
|
||||
; O0-NEXT: fmov d0, #1.00000000
|
||||
; O0-NEXT: mov w0, #2
|
||||
; O0-NEXT: fmov d1, #3.00000000
|
||||
; O0-NEXT: mov w1, #4
|
||||
; O0-NEXT: bl other_d_non_va_fn
|
||||
; O0-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
|
||||
; O0-NEXT: ret
|
||||
entry:
|
||||
; CHECK-LABEL: call_d_non_va:
|
||||
; CHECK-DAG: fmov d0, #1.00000000
|
||||
; CHECK-DAG: fmov d1, #3.00000000
|
||||
; CHECK-DAG: mov w0, #2
|
||||
; CHECK-DAG: mov w1, #4
|
||||
; CHECK: bl other_d_non_va_fn
|
||||
tail call win64cc void (double, i32, double, i32) @other_d_non_va_fn(double 1.000000e+00, i32 2, double 3.000000e+00, i32 4)
|
||||
ret void
|
||||
}
|
||||
|
|
|
|||
|
|
@ -34,7 +34,7 @@ ASM_FUNCTION_AARCH64_RE = re.compile(
|
|||
r'(?:[ \t]+.cfi_startproc\n)?' # drop optional cfi noise
|
||||
r'(?P<body>.*?)\n'
|
||||
# This list is incomplete
|
||||
r'.Lfunc_end[0-9]+:\n',
|
||||
r'^\s*(\.Lfunc_end[0-9]+|// -- End function)',
|
||||
flags=(re.M | re.S))
|
||||
|
||||
ASM_FUNCTION_AMDGPU_RE = re.compile(
|
||||
|
|
@ -432,6 +432,7 @@ def get_run_handler(triple):
|
|||
'x86': (scrub_asm_x86, ASM_FUNCTION_X86_RE),
|
||||
'i386': (scrub_asm_x86, ASM_FUNCTION_X86_RE),
|
||||
'arm64_32-apple-ios': (scrub_asm_arm_eabi, ASM_FUNCTION_AARCH64_DARWIN_RE),
|
||||
'arm64_32-apple-watchos2.0.0': (scrub_asm_arm_eabi, ASM_FUNCTION_AARCH64_DARWIN_RE),
|
||||
'aarch64': (scrub_asm_arm_eabi, ASM_FUNCTION_AARCH64_RE),
|
||||
'aarch64-apple-darwin': (scrub_asm_arm_eabi, ASM_FUNCTION_AARCH64_DARWIN_RE),
|
||||
'aarch64-apple-ios': (scrub_asm_arm_eabi, ASM_FUNCTION_AARCH64_DARWIN_RE),
|
||||
|
|
|
|||
Loading…
Reference in New Issue