diff --git a/llvm/test/CodeGen/AArch64/arm64-mul.ll b/llvm/test/CodeGen/AArch64/arm64-mul.ll
index d01b05210187..16a7cf8d10be 100644
--- a/llvm/test/CodeGen/AArch64/arm64-mul.ll
+++ b/llvm/test/CodeGen/AArch64/arm64-mul.ll
@@ -1,13 +1,17 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mtriple=arm64-eabi | FileCheck %s
 
 ; rdar://9296808
 ; rdar://9349137
 
 define i128 @t1(i64 %a, i64 %b) nounwind readnone ssp {
-entry:
 ; CHECK-LABEL: t1:
-; CHECK: mul {{x[0-9]+}}, {{x[0-9]+}}, {{x[0-9]+}}
-; CHECK: umulh {{x[0-9]+}}, {{x[0-9]+}}, {{x[0-9]+}}
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    mul x8, x0, x1
+; CHECK-NEXT:    umulh x1, x0, x1
+; CHECK-NEXT:    mov x0, x8
+; CHECK-NEXT:    ret
+entry:
   %tmp1 = zext i64 %a to i128
   %tmp2 = zext i64 %b to i128
   %tmp3 = mul i128 %tmp1, %tmp2
@@ -15,10 +19,13 @@ entry:
 }
 
 define i128 @t2(i64 %a, i64 %b) nounwind readnone ssp {
-entry:
 ; CHECK-LABEL: t2:
-; CHECK: mul {{x[0-9]+}}, {{x[0-9]+}}, {{x[0-9]+}}
-; CHECK: smulh {{x[0-9]+}}, {{x[0-9]+}}, {{x[0-9]+}}
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    mul x8, x0, x1
+; CHECK-NEXT:    smulh x1, x0, x1
+; CHECK-NEXT:    mov x0, x8
+; CHECK-NEXT:    ret
+entry:
   %tmp1 = sext i64 %a to i128
   %tmp2 = sext i64 %b to i128
   %tmp3 = mul i128 %tmp1, %tmp2
@@ -26,9 +33,11 @@ entry:
 }
 
 define i64 @t3(i32 %a, i32 %b) nounwind {
-entry:
 ; CHECK-LABEL: t3:
-; CHECK: umull {{x[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    umull x0, w0, w1
+; CHECK-NEXT:    ret
+entry:
   %tmp1 = zext i32 %a to i64
   %tmp2 = zext i32 %b to i64
   %tmp3 = mul i64 %tmp1, %tmp2
@@ -36,9 +45,11 @@ entry:
 }
 
 define i64 @t4(i32 %a, i32 %b) nounwind {
-entry:
 ; CHECK-LABEL: t4:
-; CHECK: smull {{x[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    smull x0, w0, w1
+; CHECK-NEXT:    ret
+entry:
   %tmp1 = sext i32 %a to i64
   %tmp2 = sext i32 %b to i64
   %tmp3 = mul i64 %tmp1, %tmp2
@@ -46,9 +57,11 @@ entry:
 }
 
 define i64 @t5(i32 %a, i32 %b, i64 %c) nounwind {
-entry:
 ; CHECK-LABEL: t5:
-; CHECK: umaddl {{x[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}, {{x[0-9]+}}
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    umaddl x0, w0, w1, x2
+; CHECK-NEXT:    ret
+entry:
   %tmp1 = zext i32 %a to i64
   %tmp2 = zext i32 %b to i64
   %tmp3 = mul i64 %tmp1, %tmp2
@@ -57,9 +70,11 @@ entry:
 }
 
 define i64 @t6(i32 %a, i32 %b, i64 %c) nounwind {
-entry:
 ; CHECK-LABEL: t6:
-; CHECK: smsubl {{x[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}, {{x[0-9]+}}
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    smsubl x0, w0, w1, x2
+; CHECK-NEXT:    ret
+entry:
   %tmp1 = sext i32 %a to i64
   %tmp2 = sext i32 %b to i64
   %tmp3 = mul i64 %tmp1, %tmp2
@@ -68,9 +83,11 @@ entry:
 }
 
 define i64 @t7(i32 %a, i32 %b) nounwind {
-entry:
 ; CHECK-LABEL: t7:
-; CHECK: umnegl {{x[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    umnegl x0, w0, w1
+; CHECK-NEXT:    ret
+entry:
   %tmp1 = zext i32 %a to i64
   %tmp2 = zext i32 %b to i64
   %tmp3 = mul i64 %tmp1, %tmp2
@@ -79,9 +96,11 @@ entry:
 }
 
 define i64 @t8(i32 %a, i32 %b) nounwind {
-entry:
 ; CHECK-LABEL: t8:
-; CHECK: smnegl {{x[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    smnegl x0, w0, w1
+; CHECK-NEXT:    ret
+entry:
   %tmp1 = sext i32 %a to i64
   %tmp2 = sext i32 %b to i64
   %tmp3 = mul i64 %tmp1, %tmp2
@@ -90,9 +109,13 @@ entry:
 }
 
 define i64 @t9(i32 %a) nounwind {
-entry:
 ; CHECK-LABEL: t9:
-; CHECK: umull {{x[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    mov w8, #8896
+; CHECK-NEXT:    movk w8, #2, lsl #16
+; CHECK-NEXT:    umull x0, w0, w8
+; CHECK-NEXT:    ret
+entry:
   %tmp1 = zext i32 %a to i64
   %tmp2 = mul i64 %tmp1, 139968
   ret i64 %tmp2
@@ -100,9 +123,15 @@ entry:
 
 ; Check 64-bit multiplication is used for constants > 32 bits.
 define i64 @t10(i32 %a) nounwind {
-entry:
 ; CHECK-LABEL: t10:
-; CHECK: mul {{x[0-9]+}}, {{x[0-9]+}}, {{x[0-9]+}}
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    mov w8, #2
+; CHECK-NEXT:    // kill: def $w0 killed $w0 def $x0
+; CHECK-NEXT:    sxtw x9, w0
+; CHECK-NEXT:    movk w8, #32768, lsl #16
+; CHECK-NEXT:    mul x0, x9, x8
+; CHECK-NEXT:    ret
+entry:
   %tmp1 = sext i32 %a to i64
   %tmp2 = mul i64 %tmp1, 2147483650 ; = 2^31 + 2
   ret i64 %tmp2
@@ -110,9 +139,13 @@ entry:
 
 ; Check the sext_inreg case.
 define i64 @t11(i64 %a) nounwind {
-entry:
 ; CHECK-LABEL: t11:
-; CHECK: smnegl {{x[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    mov w8, #29594
+; CHECK-NEXT:    movk w8, #65499, lsl #16
+; CHECK-NEXT:    smnegl x0, w0, w8
+; CHECK-NEXT:    ret
+entry:
   %tmp1 = trunc i64 %a to i32
   %tmp2 = sext i32 %tmp1 to i64
   %tmp3 = mul i64 %tmp2, -2395238
@@ -121,9 +154,13 @@ entry:
 }
 
 define i64 @t12(i64 %a, i64 %b) nounwind {
-entry:
 ; CHECK-LABEL: t12:
-; CHECK: smaddl {{x[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}, {{x[0-9]+}}
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    mov w8, #35118
+; CHECK-NEXT:    movk w8, #65008, lsl #16
+; CHECK-NEXT:    smaddl x0, w0, w8, x1
+; CHECK-NEXT:    ret
+entry:
   %tmp1 = trunc i64 %a to i32
   %tmp2 = sext i32 %tmp1 to i64
   %tmp3 = mul i64 %tmp2, -34567890
@@ -132,9 +169,13 @@ entry:
 }
 
 define i64 @t13(i32 %a, i64 %b) nounwind {
-entry:
 ; CHECK-LABEL: t13:
-; CHECK: umsubl {{x[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}, {{x[0-9]+}}
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    mov w8, #24910
+; CHECK-NEXT:    movk w8, #188, lsl #16
+; CHECK-NEXT:    umsubl x0, w0, w8, x1
+; CHECK-NEXT:    ret
+entry:
   %tmp1 = zext i32 %a to i64
   %tmp3 = mul i64 %tmp1, 12345678
   %tmp4 = sub i64 %b, %tmp3
@@ -142,9 +183,13 @@ entry:
 }
 
 define i64 @t14(i32 %a, i64 %b) nounwind {
-entry:
 ; CHECK-LABEL: t14:
-; CHECK: smsubl {{x[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}, {{x[0-9]+}}
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    mov w8, #40626
+; CHECK-NEXT:    movk w8, #65347, lsl #16
+; CHECK-NEXT:    smsubl x0, w0, w8, x1
+; CHECK-NEXT:    ret
+entry:
   %tmp1 = sext i32 %a to i64
   %tmp3 = mul i64 %tmp1, -12345678
   %tmp4 = sub i64 %b, %tmp3