maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity

[Assignment Tracking] Update mem2reg tests to use opaque pointers 

Follow up to 0946e463e8 (D133295).
This commit is contained in:
OCHyams 2022-11-15 11:20:59 +00:00
parent 0946e463e8
commit 64bd607b40
3 changed files with 31 additions and 31 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

28
llvm/test/DebugInfo/Generic/assignment-tracking/mem2reg/phi.ll
View File

@ -8,14 +8,14 @@
; CHECK: entry:
; CHECK-NEXT: call void @llvm.dbg.value(metadata i32 %a, metadata ![[B:[0-9]+]]
; CHECK-NEXT: call void @llvm.dbg.assign(metadata i32 %a, metadata ![[A:[0-9]+]], {{.*}}, metadata i32* undef
; CHECK-NEXT: call void @llvm.dbg.assign(metadata i32 %a, metadata ![[A:[0-9]+]], {{.*}}, metadata ptr undef
; CHECK: if.then:
; CHECK-NEXT: %add =
; CHECK-NEXT: call void @llvm.dbg.value(metadata i32 %add, metadata ![[B]]
; CHECK-NEXT: call void @llvm.dbg.assign(metadata i32 %add, metadata ![[A]], {{.*}}, metadata i32* undef
; CHECK-NEXT: call void @llvm.dbg.assign(metadata i32 %add, metadata ![[A]], {{.*}}, metadata ptr undef
; CHECK: if.else:
; CHECK-NEXT: call void @llvm.dbg.value(metadata i32 -1, metadata ![[B]]
; CHECK-NEXT: call void @llvm.dbg.assign(metadata i32 -1, metadata ![[A]], {{.*}}, metadata i32* undef
; CHECK-NEXT: call void @llvm.dbg.assign(metadata i32 -1, metadata ![[A]], {{.*}}, metadata ptr undef
; CHECK: if.end:
; CHECK-NEXT: %a.addr.0 = phi i32
; CHECK-NEXT: call void @llvm.dbg.value(metadata i32 %a.addr.0, metadata ![[A]]
@ -36,28 +36,28 @@
define dso_local noundef i32 @_Z1fi(i32 noundef %a) #0 !dbg !7 {
entry:
%a.addr = alloca i32, align 4, !DIAssignID !13
call void @llvm.dbg.assign(metadata i1 undef, metadata !12, metadata !DIExpression(), metadata !13, metadata i32* %a.addr, metadata !DIExpression()), !dbg !14
call void @llvm.dbg.assign(metadata i1 undef, metadata !30, metadata !DIExpression(), metadata !13, metadata i32* %a.addr, metadata !DIExpression()), !dbg !14
store i32 %a, i32* %a.addr, align 4, !DIAssignID !19
call void @llvm.dbg.assign(metadata i32 %a, metadata !12, metadata !DIExpression(), metadata !19, metadata i32* %a.addr, metadata !DIExpression()), !dbg !14
%0 = load i32, i32* %a.addr, align 4, !dbg !20
call void @llvm.dbg.assign(metadata i1 undef, metadata !12, metadata !DIExpression(), metadata !13, metadata ptr %a.addr, metadata !DIExpression()), !dbg !14
call void @llvm.dbg.assign(metadata i1 undef, metadata !30, metadata !DIExpression(), metadata !13, metadata ptr %a.addr, metadata !DIExpression()), !dbg !14
store i32 %a, ptr %a.addr, align 4, !DIAssignID !19
call void @llvm.dbg.assign(metadata i32 %a, metadata !12, metadata !DIExpression(), metadata !19, metadata ptr %a.addr, metadata !DIExpression()), !dbg !14
%0 = load i32, ptr %a.addr, align 4, !dbg !20
%tobool = icmp ne i32 %0, 0, !dbg !20
br i1 %tobool, label %if.then, label %if.else, !dbg !22
if.then: ; preds = %entry
%1 = load i32, i32* %a.addr, align 4, !dbg !23
%1 = load i32, ptr %a.addr, align 4, !dbg !23
%add = add nsw i32 %1, 1, !dbg !23
store i32 %add, i32* %a.addr, align 4, !dbg !23, !DIAssignID !24
call void @llvm.dbg.assign(metadata i32 %add, metadata !12, metadata !DIExpression(), metadata !24, metadata i32* %a.addr, metadata !DIExpression()), !dbg !14
store i32 %add, ptr %a.addr, align 4, !dbg !23, !DIAssignID !24
call void @llvm.dbg.assign(metadata i32 %add, metadata !12, metadata !DIExpression(), metadata !24, metadata ptr %a.addr, metadata !DIExpression()), !dbg !14
br label %if.end, !dbg !25
if.else: ; preds = %entry
store i32 -1, i32* %a.addr, align 4, !dbg !26, !DIAssignID !27
call void @llvm.dbg.assign(metadata i32 -1, metadata !12, metadata !DIExpression(), metadata !27, metadata i32* %a.addr, metadata !DIExpression()), !dbg !14
store i32 -1, ptr %a.addr, align 4, !dbg !26, !DIAssignID !27
call void @llvm.dbg.assign(metadata i32 -1, metadata !12, metadata !DIExpression(), metadata !27, metadata ptr %a.addr, metadata !DIExpression()), !dbg !14
br label %if.end
if.end: ; preds = %if.else, %if.then
%2 = load i32, i32* %a.addr, align 4, !dbg !28
%2 = load i32, ptr %a.addr, align 4, !dbg !28
ret i32 %2, !dbg !29
}

20
llvm/test/DebugInfo/Generic/assignment-tracking/mem2reg/single-block-alloca.ll
View File

@ -8,10 +8,10 @@
; CHECK: entry:
; CHECK-NEXT: call void @llvm.dbg.value(metadata i32 %a, metadata ![[B:[0-9]+]]
; CHECK-NEXT: call void @llvm.dbg.assign(metadata i32 %a, metadata ![[A:[0-9]+]], {{.*}}, metadata i32* undef
; CHECK-NEXT: call void @llvm.dbg.assign(metadata i32 %a, metadata ![[A:[0-9]+]], {{.*}}, metadata ptr undef
; CHECK-NEXT: %add =
; CHECK-NEXT: call void @llvm.dbg.value(metadata i32 %add, metadata ![[B]]
; CHECK-NEXT: call void @llvm.dbg.assign(metadata i32 %add, metadata ![[A]], {{.*}}, metadata i32* undef
; CHECK-NEXT: call void @llvm.dbg.assign(metadata i32 %add, metadata ![[A]], {{.*}}, metadata ptr undef
; CHECK-DAG: ![[A]] = !DILocalVariable(name: "a",
; CHECK-DAG: ![[B]] = !DILocalVariable(name: "b",
@ -25,15 +25,15 @@
define dso_local noundef i32 @_Z1fi(i32 noundef %a) !dbg !7 {
entry:
%a.addr = alloca i32, align 4, !DIAssignID !13
call void @llvm.dbg.assign(metadata i1 undef, metadata !12, metadata !DIExpression(), metadata !13, metadata i32* %a.addr, metadata !DIExpression()), !dbg !14
call void @llvm.dbg.assign(metadata i1 undef, metadata !24, metadata !DIExpression(), metadata !13, metadata i32* %a.addr, metadata !DIExpression()), !dbg !14
store i32 %a, i32* %a.addr, align 4, !DIAssignID !19
call void @llvm.dbg.assign(metadata i32 %a, metadata !12, metadata !DIExpression(), metadata !19, metadata i32* %a.addr, metadata !DIExpression()), !dbg !14
%0 = load i32, i32* %a.addr, align 4, !dbg !20
call void @llvm.dbg.assign(metadata i1 undef, metadata !12, metadata !DIExpression(), metadata !13, metadata ptr %a.addr, metadata !DIExpression()), !dbg !14
call void @llvm.dbg.assign(metadata i1 undef, metadata !24, metadata !DIExpression(), metadata !13, metadata ptr %a.addr, metadata !DIExpression()), !dbg !14
store i32 %a, ptr %a.addr, align 4, !DIAssignID !19
call void @llvm.dbg.assign(metadata i32 %a, metadata !12, metadata !DIExpression(), metadata !19, metadata ptr %a.addr, metadata !DIExpression()), !dbg !14
%0 = load i32, ptr %a.addr, align 4, !dbg !20
%add = add nsw i32 %0, 1, !dbg !20
store i32 %add, i32* %a.addr, align 4, !dbg !20, !DIAssignID !21
call void @llvm.dbg.assign(metadata i32 %add, metadata !12, metadata !DIExpression(), metadata !21, metadata i32* %a.addr, metadata !DIExpression()), !dbg !14
%1 = load i32, i32* %a.addr, align 4, !dbg !22
store i32 %add, ptr %a.addr, align 4, !dbg !20, !DIAssignID !21
call void @llvm.dbg.assign(metadata i32 %add, metadata !12, metadata !DIExpression(), metadata !21, metadata ptr %a.addr, metadata !DIExpression()), !dbg !14
%1 = load i32, ptr %a.addr, align 4, !dbg !22
ret i32 %1, !dbg !23
}

14
llvm/test/DebugInfo/Generic/assignment-tracking/mem2reg/single-store-alloca.ll
View File

@ -7,7 +7,7 @@
; CHECK: entry:
; CHECK-NEXT: call void @llvm.dbg.value(metadata i32 %a, metadata ![[B:[0-9]+]]
; CHECK-NEXT: call void @llvm.dbg.assign(metadata i32 %a, metadata ![[A:[0-9]+]], {{.*}}, metadata i32* undef
; CHECK-NEXT: call void @llvm.dbg.assign(metadata i32 %a, metadata ![[A:[0-9]+]], {{.*}}, metadata ptr undef
; CHECK-NEXT: ret
; CHECK-DAG: ![[A]] = !DILocalVariable(name: "a",
@ -26,12 +26,12 @@
define dso_local noundef i32 @_Z1fi(i32 noundef %a) #0 !dbg !7 {
entry:
%a.addr = alloca i32, align 4, !DIAssignID !13
call void @llvm.dbg.assign(metadata i1 undef, metadata !12, metadata !DIExpression(), metadata !13, metadata i32* %a.addr, metadata !DIExpression()), !dbg !14
call void @llvm.dbg.assign(metadata i1 undef, metadata !12, metadata !DIExpression(), metadata !13, metadata i32* %a.addr, metadata !DIExpression()), !dbg !14
call void @llvm.dbg.assign(metadata i1 undef, metadata !22, metadata !DIExpression(), metadata !13, metadata i32* %a.addr, metadata !DIExpression()), !dbg !14
store i32 %a, i32* %a.addr, align 4, !DIAssignID !19
call void @llvm.dbg.assign(metadata i32 %a, metadata !12, metadata !DIExpression(), metadata !19, metadata i32* %a.addr, metadata !DIExpression()), !dbg !14
%0 = load i32, i32* %a.addr, align 4, !dbg !20
call void @llvm.dbg.assign(metadata i1 undef, metadata !12, metadata !DIExpression(), metadata !13, metadata ptr %a.addr, metadata !DIExpression()), !dbg !14
call void @llvm.dbg.assign(metadata i1 undef, metadata !12, metadata !DIExpression(), metadata !13, metadata ptr %a.addr, metadata !DIExpression()), !dbg !14
call void @llvm.dbg.assign(metadata i1 undef, metadata !22, metadata !DIExpression(), metadata !13, metadata ptr %a.addr, metadata !DIExpression()), !dbg !14
store i32 %a, ptr %a.addr, align 4, !DIAssignID !19
call void @llvm.dbg.assign(metadata i32 %a, metadata !12, metadata !DIExpression(), metadata !19, metadata ptr %a.addr, metadata !DIExpression()), !dbg !14
%0 = load i32, ptr %a.addr, align 4, !dbg !20
ret i32 %0, !dbg !21
}