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[VENTUS][NFC]Add inline-asm testcase 

Add an inline-asm testcase for constraint r
Add an inline-asm testcase for branch instruction
This commit is contained in:
ziliangzl 2024-05-07 15:33:42 +08:00
parent 279251d31d
commit 3267496a27
2 changed files with 54 additions and 0 deletions
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39
llvm/test/CodeGen/RISCV/VentusGPGPU/inline-asm-branch.ll Normal file
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=riscv32 -mcpu=ventus-gpgpu -verify-machineinstrs < %s \
; RUN: | FileCheck -check-prefix=VENTUS %s
define ventus_kernel void @getMax(ptr addrspace(1) %out, ptr addrspace(4) %in) {
; VENTUS-LABEL: getMax:
; VENTUS: # %bb.0:
; VENTUS-NEXT: addi tp, tp, 4
; VENTUS-NEXT: .cfi_def_cfa_offset 4
; VENTUS-NEXT: regext zero, zero, 1
; VENTUS-NEXT: vmv.v.x v32, tp
; VENTUS-NEXT: lw t0, 0(a0)
; VENTUS-NEXT: lw t1, 4(a0)
; VENTUS-NEXT: vmv.v.x v0, t0
; VENTUS-NEXT: regext zero, zero, 8
; VENTUS-NEXT: vsw.v v0, -4(v32)
; VENTUS-NEXT: lw t0, 0(t1)
; VENTUS-NEXT: lw t1, 4(t1)
; VENTUS-NEXT: addi t2, tp, -4
; VENTUS-NEXT: #APP
; VENTUS-NEXT: blt t0, t1, greater
; VENTUS-NEXT: mv t1, t0
; VENTUS-NEXT: greater:
; VENTUS-NEXT: sw t1, 0(t2)
; VENTUS-NEXT: #NO_APP
; VENTUS-NEXT: addi tp, tp, -4
; VENTUS-NEXT: regext zero, zero, 1
; VENTUS-NEXT: vmv.v.x v32, tp
; VENTUS-NEXT: ret
entry:
%out.addr = alloca ptr addrspace(1), addrspace(5)
store ptr addrspace(1) %out, ptr addrspace(5) %out.addr
%0 = load i32, ptr addrspace(4) %in
%arrayidx1 = getelementptr inbounds i32, ptr addrspace(4) %in, i32 1
%1 = load i32, ptr addrspace(4) %arrayidx1
call void asm sideeffect "blt\09$1, $2, greater\0Amv\09$2, $1\0Agreater:\0Asw\09$2, $0", "=*m,r,r"(ptr addrspace(5) elementtype(ptr addrspace(1)) %out.addr, i32 %0, i32 %1)
ret void
}

15
llvm/test/CodeGen/RISCV/VentusGPGPU/inline-asm.ll Normal file
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=riscv32 -mcpu=ventus-gpgpu -verify-machineinstrs < %s \
; RUN: | FileCheck -check-prefix=VENTUS %s
define ventus_kernel void @constraint_r() {
; VENTUS-LABEL: constraint_r:
; VENTUS: # %bb.0:
; VENTUS-NEXT: #APP
; VENTUS-NEXT: li t0, 1
; VENTUS-NEXT: #NO_APP
; VENTUS-NEXT: ret
entry:
%0 = call i32 asm sideeffect "li $0, 1", "=r,r"(i32 undef)
ret void
}