From fee0edfd28c11e6a27ba535913ad1520c560bdad Mon Sep 17 00:00:00 2001
From: Dolu1990 <charles.papon.90@gmail.com>
Date: Mon, 14 Oct 2024 09:33:05 +0200
Subject: [PATCH] Fix uart dataLength = 8

---
 .../main/scala/spinaldoc/examples/intermediate/Uart.scala | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/examples/src/main/scala/spinaldoc/examples/intermediate/Uart.scala b/examples/src/main/scala/spinaldoc/examples/intermediate/Uart.scala
index b217197a8c..d5afd705c3 100644
--- a/examples/src/main/scala/spinaldoc/examples/intermediate/Uart.scala
+++ b/examples/src/main/scala/spinaldoc/examples/intermediate/Uart.scala
@@ -345,7 +345,7 @@ case class UartRxTx() extends Component {
   val uartCtrl = UartCtrl(
     config=UartCtrlInitConfig(
       baudrate = 115200,
-      dataLength = 8,
+      dataLength = 7,
       parity = UartParityType.NONE,
       stop = UartStopType.ONE
     )
@@ -365,7 +365,7 @@ case class UartTx() extends Component {
   val uartCtrl = UartCtrl(
     config=UartCtrlInitConfig(
       baudrate = 115200,
-      dataLength = 8,
+      dataLength = 7,
       parity = UartParityType.NONE,
       stop = UartStopType.ONE
     )
@@ -386,7 +386,7 @@ case class UartRx() extends Component {
   val uartCtrl = UartCtrl(
     config = UartCtrlInitConfig(
       baudrate = 115200,
-      dataLength = 8,
+      dataLength = 7,
       parity = UartParityType.NONE,
       stop = UartStopType.ONE
     ),
@@ -467,7 +467,7 @@ case class UartWithHeader() extends Component {
   val uartCtrl = UartCtrl(
     config=UartCtrlInitConfig(
       baudrate = 115200,
-      dataLength = 8,
+      dataLength = 7,
       parity = UartParityType.NONE,
       stop = UartStopType.ONE
     )