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[ARM64_DYNAREC] Small improvements to (V)MASKMOVDQU opcode

This commit is contained in:
ptitSeb 2025-04-21 17:41:04 +02:00
parent c39869b770
commit 574d6f9dab
2 changed files with 4 additions and 6 deletions
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8
src/dynarec/arm64/dynarec_arm64_660f.c
View File

@ -3335,7 +3335,7 @@ uintptr_t dynarec64_660F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
case 0xF7: case 0xF7:
INST_NAME("MASKMOVDQU Gx, Ex"); INST_NAME("MASKMOVDQU Gx, Ex");
nextop = F8; nextop = F8;
GETGX(q0, 1); GETGX(q0, 0);
GETEX(q1, 0, 0); GETEX(q1, 0, 0);
v0 = fpu_get_scratch(dyn, ninst); v0 = fpu_get_scratch(dyn, ninst);
VLDR128_U12(v0, xRDI, 0); VLDR128_U12(v0, xRDI, 0);
@ -3344,10 +3344,8 @@ uintptr_t dynarec64_660F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
else else
v1 = q1; v1 = q1;
VSSHRQ_8(v1, q1, 7); // get the mask VSSHRQ_8(v1, q1, 7); // get the mask
VBICQ(v0, v0, v1); // mask destination VBITQ(v0, q0, v1);
VANDQ(v1, q0, v1); // mask source VSTR128_U12(v0, xRDI, 0); // put back
VORRQ(v1, v1, v0); // combine
VSTR128_U12(v1, xRDI, 0); // put back
break; break;
case 0xF8: case 0xF8:
INST_NAME("PSUBB Gx,Ex"); INST_NAME("PSUBB Gx,Ex");

2
src/dynarec/arm64/dynarec_arm64_avx_66_0f.c
View File

@ -1918,7 +1918,7 @@ uintptr_t dynarec64_AVX_66_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip,
case 0xF7: case 0xF7:
INST_NAME("VMASKMOVDQU Gx, Ex"); INST_NAME("VMASKMOVDQU Gx, Ex");
nextop = F8; nextop = F8;
GETGX(q0, 1); GETGX(q0, 0);
GETEX(q1, 0, 0); //no vex.l case GETEX(q1, 0, 0); //no vex.l case
v0 = fpu_get_scratch(dyn, ninst); v0 = fpu_get_scratch(dyn, ninst);
VLDR128_U12(v0, xRDI, 0); VLDR128_U12(v0, xRDI, 0);