Commit Graph

965 Commits

Author SHA1 Message Date
Artem Belevich c4d3d32435 [NVPTX, CUDA] Added support for m8n32k16 and m32n8k16 variants of wmma instructions.
The new instructions were added added for sm_70+ GPUs in CUDA-9.1.

Differential Revision: https://reviews.llvm.org/D45068

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@330296 91177308-0d34-0410-b5e6-96231b3b80d8
2018-04-18 21:51:48 +00:00
Keith Wyss 07bff7a364 [XRay] Add clang builtin for xray typed events.
Summary:
A clang builtin for xray typed events. Differs from
__xray_customevent(...) by the presence of a type tag that is vended by
compiler-rt in typical usage. This allows xray handlers to expand logged
events with their type description and plugins to process traced events
based on type.

This change depends on D45633 for the intrinsic definition.

Reviewers: dberris, pelikan, rnk, eizan

Subscribers: cfe-commits, llvm-commits

Differential Revision: https://reviews.llvm.org/D45716

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@330220 91177308-0d34-0410-b5e6-96231b3b80d8
2018-04-17 21:32:43 +00:00
Aaron Ballman 560afaf82b Add modifiers for unsigned char and signed char field printing for __builtin_dump_struct.
Patch by Paul Semel.

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@330188 91177308-0d34-0410-b5e6-96231b3b80d8
2018-04-17 14:00:06 +00:00
Aaron Ballman 939b185f02 Add checks for format specifiers used by __builtin_dump_struct and added a new specifier for null-terminated constant strings.
Patch by Paul Semel.

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@330185 91177308-0d34-0410-b5e6-96231b3b80d8
2018-04-17 11:57:47 +00:00
Ivan A. Kosarev 97cf2229cd [NEON] Support vrndns_f32 intrinsic
Differential Revision: https://reviews.llvm.org/D45515


git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@330012 91177308-0d34-0410-b5e6-96231b3b80d8
2018-04-13 12:46:02 +00:00
Dean Michael Berris a50e57f11b [XRay][clang] Add flag to choose instrumentation bundles
Summary:
This change addresses http://llvm.org/PR36926 by allowing users to pick
which instrumentation bundles to use, when instrumenting with XRay. In
particular, the flag `-fxray-instrumentation-bundle=` has four valid
values:

- `all`: the default, emits all instrumentation kinds
- `none`: equivalent to -fnoxray-instrument
- `function`: emits the entry/exit instrumentation
- `custom`: emits the custom event instrumentation

These can be combined either as comma-separated values, or as
repeated flag values.

Reviewers: echristo, kpw, eizan, pelikan

Reviewed By: pelikan

Subscribers: mgorny, cfe-commits

Differential Revision: https://reviews.llvm.org/D44970

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@329985 91177308-0d34-0410-b5e6-96231b3b80d8
2018-04-13 02:31:58 +00:00
Aaron Ballman ff7e5afb9c Introduce a new builtin, __builtin_dump_struct, that is useful for dumping structure contents at runtime in circumstances where debuggers may not be easily available (such as in kernel work).
Patch by Paul Semel.

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@329762 91177308-0d34-0410-b5e6-96231b3b80d8
2018-04-10 21:58:13 +00:00
Craig Topper 55aa0b574a [X86] Emit native IR for pmuldq/pmuludq builtins.
I believe all the pieces are now in place in the backend to make this work correctly. We can either mask the input to 32 bits for pmuludg or shl/ashr for pmuldq and use a regular mul instruction. The backend should combine this to PMULUDQ/PMULDQ and then SimplifyDemandedBits will remove the and/shifts.

Differential Revision: https://reviews.llvm.org/D45421

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@329605 91177308-0d34-0410-b5e6-96231b3b80d8
2018-04-09 19:17:54 +00:00
Alexander Kornienko b8b9458165 Fix typos in clang
Found via codespell -q 3 -I ../clang-whitelist.txt
Where whitelist consists of:

  archtype
  cas
  classs
  checkk
  compres
  definit
  frome
  iff
  inteval
  ith
  lod
  methode
  nd
  optin
  ot
  pres
  statics
  te
  thru

Patch by luzpaz! (This is a subset of D44188 that applies cleanly with a few
files that have dubious fixes reverted.)

Differential revision: https://reviews.llvm.org/D44188

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@329399 91177308-0d34-0410-b5e6-96231b3b80d8
2018-04-06 15:14:32 +00:00
Krzysztof Parzyszek 0a1726abd9 [Hexagon] Remove default values from lambda parameters
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@329394 91177308-0d34-0410-b5e6-96231b3b80d8
2018-04-06 13:51:48 +00:00
Gor Nishanov 925856310e [coroutines] Add __builtin_coro_noop => llvm.coro.noop
A recent addition to Coroutines TS (https://wg21.link/p0913) adds a pre-defined
coroutine noop_coroutine that does nothing. To implement this feature, we implemented
an llvm.coro.noop intrinsic that returns a coroutine handle to a coroutine that
does nothing when resumed or destroyed.

This patch adds a builtin __builtin_coro_noop() that maps to llvm.coro.noop intrinsic.

Related llvm change: https://reviews.llvm.org/D45114

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@328993 91177308-0d34-0410-b5e6-96231b3b80d8
2018-04-02 17:35:37 +00:00
Krzysztof Parzyszek c6a82d971b [Hexagon] Aid bit-reverse load intrinsics lowering with bitcode
The conversion of operatios to bitcode helps to eliminate an additional
store in certain cases. We used to lower these load intrinsics in DAG to
DAG conversion by which time, the "Dead Store Elimination" pass is
already run. There is an associated LLVM patch.
    
Patch by Sumanth Gundapaneni.


git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@328776 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-29 13:54:31 +00:00
Krzysztof Parzyszek 1ec33d54df [Hexagon] Add support for "new" circular buffer intrinsics
These instructions have been around for a long time, but we
haven't supported intrinsics for them. The "new" vesrions use
the CSx register for the start of the buffer instead of the K
field in the Mx register.

There is a related llvm patch.

Patch by Brendon Cahoon.


git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@328725 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-28 19:40:57 +00:00
Abderrazek Zaafrani f466627bea [ARM] Add ARMv8.2-A FP16 vector intrinsic
Putting back the code in commit r327189 that was reverted in r322737. The code is being committed in three stages and this one is the last stage: 1) r327455 fp16 feature flags, 2) r327836 pass half type or i16 based on FullFP16, and 3) the code here which the front-end fp16 vector intrinsic for ARM.

Differential revision https://reviews.llvm.org/D43650

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@328277 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-23 00:08:40 +00:00
Artem Belevich 350f0bf9a4 [NVPTX] Make tensor shape part of WMMA intrinsic's name.
This is needed for the upcoming implementation of the
new 8x32x16 and 32x8x16 variants of WMMA instructions
introduced in CUDA 9.1.

Differential Revision: https://reviews.llvm.org/D44719

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@328158 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-21 21:55:02 +00:00
Eric Fiselier f353d86deb [Builtins] Overload __builtin_operator_new/delete to allow forwarding to usual allocation/deallocation functions.
Summary:
Libc++'s default allocator uses `__builtin_operator_new` and `__builtin_operator_delete` in order to allow the calls to new/delete to be ellided. However, libc++ now needs to support over-aligned types in the default allocator. In order to support this without disabling the existing optimization Clang needs to support calling the aligned new overloads from the builtins.

See llvm.org/PR22634 for more information about the libc++ bug.

This patch changes `__builtin_operator_new`/`__builtin_operator_delete` to call any usual `operator new`/`operator delete` function. It does this by performing overload resolution with the arguments passed to the builtin to determine which allocation function to call. If the selected function is not a usual allocation function a diagnostic is issued.

One open issue is if the `align_val_t` overloads should be considered "usual" when `LangOpts::AlignedAllocation` is disabled.


In order to allow libc++ to detect this new behavior the value for `__has_builtin(__builtin_operator_new)` has been updated to `201802`.

Reviewers: rsmith, majnemer, aaron.ballman, erik.pilkington, bogner, ahatanak

Reviewed By: rsmith

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D43047

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@328134 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-21 19:19:48 +00:00
Abderrazek Zaafrani 9901645365 [AArch64] Add vmulxh_lane fp16 vector intrinsic
https://reviews.llvm.org/D44591

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@328038 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-20 20:37:31 +00:00
Artem Belevich b1444f3997 [NVPTX] Make tensor load/store intrinsics overloaded.
This way we can support address-space specific variants without explicitly
encoding the space in the name of the intrinsic. Less intrinsics to deal with ->
less boilerplate.

Added a bit of tablegen magic to match/replace an intrinsics with a pointer
argument in particular address space with the space-specific instruction
variant.

Updated tests to use non-default address spaces.

Differential Revision: https://reviews.llvm.org/D43268

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@328006 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-20 17:18:59 +00:00
Sjoerd Meijer 2d4ee510b2 [ARM] Pass half or i16 types for NEON intrinsics
For generating NEON intrinsics, this determines the NEON data type, and whether
it should be a half type or an i16 type. I.e., we always pass a half type for
AArch64, this hasn't changed, but now also for ARM but only when FullFP16 is
enabled, and i16 otherwise.

This is intended to be non-functional change, but together with the backend
work in D44538 which adds support for f16 vectors, this enables adding the
AArch32 FP16 (vector) intrinsics.

Differential Revision: https://reviews.llvm.org/D44561


git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@327836 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-19 13:22:49 +00:00
Sjoerd Meijer 7110eaf5a2 This reverts "r327189 - [ARM] Add ARMv8.2-A FP16 vector intrinsic"
This is causing problems in testing, and PR36683 was raised.
Reverting it until we have sorted out how to pass f16 vectors.



git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@327437 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-13 19:38:56 +00:00
Abderrazek Zaafrani 72858dcc19 [ARM] Add ARMv8.2-A FP16 vector intrinsic
Add the fp16 neon vector intrinsic for ARM as described in the ARM ACLE document.

Reviews in https://reviews.llvm.org/D43650

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@327189 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-09 23:39:34 +00:00
Craig Topper 9a5369fb11 [X86] Reverse the operand order of the implementation of the kunpack builtins.
The second operand needs to be in the lower bits of the concatenation. This matches llvm 5.0, gcc, and icc behavior.

Fixes PR36360.

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@324954 91177308-0d34-0410-b5e6-96231b3b80d8
2018-02-12 22:38:52 +00:00
Abderrazek Zaafrani 44ca936342 [AArch64] Fixes for ARMv8.2-A FP16 scalar intrinsic - clang portion
https://reviews.llvm.org/D42993

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@324940 91177308-0d34-0410-b5e6-96231b3b80d8
2018-02-12 21:26:06 +00:00
Craig Topper 6ce1cf35b9 [X86] Change the signature of the AVX512 packed fp compare intrinsics to return vXi1 mask. Make bitcasts to scalar explicit in IR
Summary: This is the clang equivalent of r324827

Reviewers: zvi, delena, RKSimon, spatel

Reviewed By: RKSimon

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D43143

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@324828 91177308-0d34-0410-b5e6-96231b3b80d8
2018-02-10 23:34:27 +00:00
Craig Topper 3c9141475e [X86] Replace kortest intrinsics with native IR.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@324647 91177308-0d34-0410-b5e6-96231b3b80d8
2018-02-08 20:16:17 +00:00
Peter Collingbourne 902a9663be IRGen: Emit an inline implementation of __builtin_wmemcmp on MSVCRT platforms.
The MSVC runtime library does not provide a definition of wmemcmp,
so we need an inline implementation.

Differential Revision: https://reviews.llvm.org/D42441

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@323362 91177308-0d34-0410-b5e6-96231b3b80d8
2018-01-24 18:59:58 +00:00
Dan Gohman a11eb9ed78 [WebAssembly] Add mem.* builtin functions.
This corresponds to r323222 in LLVM. The new names are not yet
finalized, so use them at your own risk.


git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@323224 91177308-0d34-0410-b5e6-96231b3b80d8
2018-01-23 17:04:04 +00:00
Abderrazek Zaafrani 5d89c44ccd [AArch64] Add ARMv8.2-A FP16 scalar intrinsics
https://reviews.llvm.org/D41792

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@323006 91177308-0d34-0410-b5e6-96231b3b80d8
2018-01-19 23:11:18 +00:00
Craig Topper 4647e409df [X86] Implement old kunpck intrinsics using vector ops on vXi1 instead of integer shift/and/or
Summary:
kunpck intrinsics were removed in favor of native IR a few months ago. The implementation lowers them as by operation on the integer types passed to the intrinsic and then just shifting, masking, and oring them together. A special X86 DAG combine was added to recognize this patter and turn it into a concat_vector operation.

I think it makes more sense to keep the IR implementation closer to vector operations on vXi1. Given that we expect these builtins to be used around other builtins that operate on k-registers which we try to represent in IR with vXi1. InstCombine should be able to get rid of the bitcasts between integers and vXi1 leaving only the vector operations.

Reviewers: RKSimon, spatel, zvi, jina.nahias

Reviewed By: RKSimon

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D42016

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@322461 91177308-0d34-0410-b5e6-96231b3b80d8
2018-01-14 19:23:50 +00:00
Craig Topper 78c4666039 [X86] Replace cvt*2mask intrinsics with native IR using 'icmp slt X, zeroinitializer.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@322038 91177308-0d34-0410-b5e6-96231b3b80d8
2018-01-08 22:37:56 +00:00
Benjamin Kramer b99f3a83f3 Add support for a limited subset of TS 18661-3 math builtins.
These just overloads for _Float128. They're supported by GCC 7 and used
by glibc. APFloat support is already there so just add the overloads.

__builtin_copysignf128
__builtin_fabsf128
__builtin_huge_valf128
__builtin_inff128
__builtin_nanf128
__builtin_nansf128

This is the same support that GCC has, according to the documentation,
but limited to _Float128.

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@321948 91177308-0d34-0410-b5e6-96231b3b80d8
2018-01-06 21:49:54 +00:00
Vedant Kumar 696af9766e [CGBuiltin] Handle unsigned mul overflow properly (PR35750)
r320902 fixed the IRGen for some types of checked multiplications. It
did not handle unsigned overflow correctly in the case where the signed
operand is negative (PR35750).

Eli pointed out that on overflow, the result must be equal to the unique
value that is equivalent to the mathematically-correct result modulo two
raised to the k power, where k is the number of bits in the result type.

This patch fixes the specialized IRGen from r320902 accordingly.

Testing: Apart from check-clang, I modified the test harness from
r320902 to validate the results of all multiplications -- not just the
ones which don't overflow:

  https://gist.github.com/vedantk/3eb9c88f82e5c32f2e590555b4af5081

llvm.org/PR35750, rdar://34963321

Differential Revision: https://reviews.llvm.org/D41717

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@321771 91177308-0d34-0410-b5e6-96231b3b80d8
2018-01-03 23:11:32 +00:00
Coby Tayree 8b794e9ef2 [x86][icelake][bitalg]
added bitalg feature recognition
added intrinsics support for bitalg instructions
_mm512_popcnt_epi16
_mm512_mask_popcnt_epi16
_mm512_maskz_popcnt_epi16
_mm512_popcnt_epi8
_mm512_mask_popcnt_epi8
_mm512_maskz_popcnt_epi8
_mm512_mask_bitshuffle_epi64_mask
_mm512_bitshuffle_epi64_mask
_mm256_popcnt_epi16
_mm256_mask_popcnt_epi16
_mm256_maskz_popcnt_epi16
_mm128_popcnt_epi16
_mm128_mask_popcnt_epi16
_mm128_maskz_popcnt_epi16
_mm256_popcnt_epi8
_mm256_mask_popcnt_epi8
_mm256_maskz_popcnt_epi8
_mm128_popcnt_epi8
_mm128_mask_popcnt_epi8
_mm128_maskz_popcnt_epi8
_mm256_mask_bitshuffle_epi32_mask
_mm256_bitshuffle_epi32_mask
_mm128_mask_bitshuffle_epi16_mask
_mm128_bitshuffle_epi16_mask
matching a similar work on the backend (D40222)
Differential Revision: https://reviews.llvm.org/D41564


git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@321483 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-27 10:01:00 +00:00
Craig Topper 56e4bd682d [X86] Allow _mm_prefetch (both the header implementation and the builtin) to accept bit 2 which is supposed to indicate the prefetched addresses will be written to
Add the appropriate _MM_HINT_ET0/ET1 defines to match gcc.

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@321325 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-21 23:50:22 +00:00
Abderrazek Zaafrani af137029ce [AArch64] Enable fp16 data type for the Builtin for AArch64 only.
Differential Revision: https:://reviews.llvm.org/D41360

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@321301 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-21 20:10:03 +00:00
Abderrazek Zaafrani 749de2d465 [AARch64] Add ARMv8.2-A FP16 vector intrinsics
Putting back the code that was reverted few weeks ago.

Differential Revision: https://reviews.llvm.org/D34161

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@321294 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-21 19:20:01 +00:00
Vedant Kumar 817fbca018 [ubsan] Diagnose noreturn functions which return
Diagnose 'unreachable' UB when a noreturn function returns.

  1. Insert a check at the end of functions marked noreturn.

  2. A decl may be marked noreturn in the caller TU, but not marked in
     the TU where it's defined. To diagnose this scenario, strip away the
     noreturn attribute on the callee and insert check after calls to it.

Testing: check-clang, check-ubsan, check-ubsan-minimal, D40700

rdar://33660464

Differential Revision: https://reviews.llvm.org/D40698

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@321231 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-21 00:10:25 +00:00
Adrian Prantl 550c574546 Silence a bunch of implicit fallthrough warnings
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@321115 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-19 22:06:11 +00:00
Craig Topper d073eeed8a [X86] Implement kand/kandn/kor/kxor/kxnor/knot intrinsics using native IR.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@320919 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-16 08:26:22 +00:00
Craig Topper c6aa3927dc [X86] Add builtins and tests for 128 and 256 bit vpopcntdq.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@320915 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-16 06:02:31 +00:00
Vedant Kumar 87961dfbc9 [CodeGen] Specialize mixed-sign mul-with-overflow (fix PR34920)
This patch introduces a specialized way to lower overflow-checked
multiplications with mixed-sign operands. This fixes link failures and
ICEs on code like this:

  void mul(int64_t a, uint64_t b) {
    int64_t res;
    __builtin_mul_overflow(a, b, &res);
  }

The generic checked-binop irgen would use a 65-bit multiplication
intrinsic here, which requires runtime support for _muloti4 (128-bit
multiplication), and therefore fails to link on i386. To get an ICE
on x86_64, change the example to use __int128_t / __uint128_t.

Adding runtime and backend support for 65-bit or 129-bit checked
multiplication on all of our supported targets is infeasible.

This patch solves the problem by using simpler, specialized irgen for
the mixed-sign case.

llvm.org/PR34920, rdar://34963321

Testing: Apart from check-clang, I compared the output from this fairly
comprehensive test driver using unpatched & patched clangs:
https://gist.github.com/vedantk/3eb9c88f82e5c32f2e590555b4af5081

Differential Revision: https://reviews.llvm.org/D41149

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@320902 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-16 01:28:25 +00:00
Reid Kleckner 512570d77f [CodeGen][X86] Implement _InterlockedCompareExchange128 intrinsic
Summary:
InterlockedCompareExchange128 is a bit more complicated than the other
InterlockedCompareExchange functions, so it requires a bit more work. It
doesn't directly refer to 128bit ints, instead it takes pointers to
64bit ints for Destination and ComparandResult, and exchange is taken as
two 64bit ints (high & low). The previous value is written to
ComparandResult, and success is returned. This implementation does the
following in order to produce a cmpxchg instruction:

  1. Cast everything to 128bit ints or int pointers, and glues together
     the Exchange values
  2. Reads from CompareandResult to get the comparand
  3. Calls cmpxchg volatile (on X86 this will produce a lock cmpxchg16b
     instruction)
    1. Result 0 (previous value) is written back to ComparandResult
    2. Result 1 (success bool) is zext'ed to a uchar and returned

Resolves bug https://llvm.org/PR35251

Patch by Colden Cullen!

Reviewers: rnk, agutowski

Reviewed By: rnk

Subscribers: majnemer, cfe-commits

Differential Revision: https://reviews.llvm.org/D41032

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@320730 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-14 19:00:21 +00:00
Krzysztof Parzyszek 95387d6350 [Hexagon] Intrinsic support for V62 and V65
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@320609 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-13 19:56:03 +00:00
Sanjay Patel bf691ab9cd [CodeGen] fix mapping from fmod calls to frem instruction
Similar to D40044 and discussed in D40594.


git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@319619 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-02 17:52:00 +00:00
Sanjay Patel 1b87c65388 [CodeGen] remove stale comment; NFC
The libm functions with LLVM intrinsic twins were moved above this blob with:
https://reviews.llvm.org/rL319593



git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@319618 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-02 16:29:34 +00:00
Sanjay Patel 26ba7faa47 [CodeGen] convert math libcalls/builtins to equivalent LLVM intrinsics
There are 20 LLVM math intrinsics that correspond to mathlib calls according to the LangRef:
http://llvm.org/docs/LangRef.html#standard-c-library-intrinsics

We were only converting 3 mathlib calls (sqrt, fma, pow) and 12 builtin calls (ceil, copysign, 
fabs, floor, fma, fmax, fmin, nearbyint, pow, rint, round, trunc) to their intrinsic-equivalents.

This patch pulls the transforms together and handles all 20 cases. The switch is guarded by a 
check for const-ness to make sure we're not doing the transform if errno could possibly be set by
the libcall or builtin.

Differential Revision: https://reviews.llvm.org/D40044


git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@319593 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-01 23:15:52 +00:00
Dean Michael Berris f4f187631c [XRay][clang] Introduce -fxray-always-emit-customevents
Summary:
The -fxray-always-emit-customevents flag instructs clang to always emit
the LLVM IR for calls to the `__xray_customevent(...)` built-in
function. The default behaviour currently respects whether the function
has an `[[clang::xray_never_instrument]]` attribute, and thus not lower
the appropriate IR code for the custom event built-in.

This change allows users calling through to the
`__xray_customevent(...)` built-in to always see those calls lowered to
the corresponding LLVM IR to lay down instrumentation points for these
custom event calls.

Using this flag enables us to emit even just the user-provided custom
events even while never instrumenting the start/end of the function
where they appear. This is useful in cases where "phase markers" using
__xray_customevent(...) can have very few instructions, must never be
instrumented when entered/exited.

Reviewers: rnk, dblaikie, kpw

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D40601

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@319388 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-30 00:04:54 +00:00
Erich Keane 5c803947ed [X86] Update CPUSupports code to reuse LLVM .def file [NFC]
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@318815 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-22 00:54:01 +00:00
Erich Keane 35416f3b78 Simplify CpuIs code to use include from LLVM
LLVM exposes a file in the backend (X86TargetParser.def) that
contains information about the correct list of CpuIs values.

This patch removes 2 of the copied and pasted versions of this
list from clang and instead includes the data from the .def file.

Differential Revision: https://reviews.llvm.org/D40054


git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@318234 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-15 00:11:24 +00:00
Sanjay Patel 98c05f2351 [CodeGen] fix const-ness of cbrt and fma
cbrt() is always constant because it can't overflow or underflow. Therefore, it can't set errno.

fma() is not always constant because it can overflow or underflow. Therefore, it can set errno.
But we know that it never sets errno on GNU / MSVC, so make it constant in those environments.

Differential Revision: https://reviews.llvm.org/D39641


git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@318093 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-13 22:11:49 +00:00
John McCall b0146f934b Fix a bug with the use of __builtin_bzero in a conditional expression.
Patch by Bharathi Seshadri!

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@317776 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-09 09:32:32 +00:00
Justin Lebar 3c447c368e [NVPTX] Implement __nvvm_atom_add_gen_d builtin.
Summary:
This just seems to have been an oversight.  We already supported the f64
atomic add with an explicit scope (e.g. "cta"), but not the scopeless
version.

Reviewers: tra

Subscribers: jholewinski, sanjoy, cfe-commits, llvm-commits, hiraditya

Differential Revision: https://reviews.llvm.org/D39638

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@317623 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-07 22:10:54 +00:00
Craig Topper cde1eeda78 [X86] Replace the mask cmpeq/cmple/cmplt/cmpgt/cmpge/cmpneq intrinsics with macros that just pass the right comparison predicate value to the regular cmp intrinsic. Remove mask cmpeq/cmpgt builtins that are now unused.
This shortens the intrinsic headers a little and allows us to get rid of the cmpeq and cmpgt handling from CGBuiltin.cpp.

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@317506 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-06 21:00:49 +00:00
Sanjay Patel 7f519c8361 [CodeGen] map sqrt libcalls to llvm.sqrt when errno is not set
The LLVM sqrt intrinsic definition changed with:
D28797
...so we don't have to use any relaxed FP settings other than errno handling.

This patch sidesteps a question raised in PR27435:
https://bugs.llvm.org/show_bug.cgi?id=27435

Is a programmer using __builtin_sqrt() invoking the compiler's intrinsic definition of sqrt or the mathlib definition of sqrt?

But we have an answer now: the builtin should match the behavior of the libm function including errno handling.

Differential Revision: https://reviews.llvm.org/D39204


git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@317031 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-31 20:19:39 +00:00
Yaxun Liu 397c91b003 [OpenCL] Emit enqueued block as kernel
In OpenCL the kernel function and non-kernel function has different calling conventions.
For certain targets they have different argument ABIs. Also kernels have special function
attributes and metadata for runtime to launch them.

The blocks passed to enqueue_kernel is supposed to be executed as kernels. As such,
the block invoke function should be emitted as kernel with proper calling convention and
argument ABI.

This patch emits enqueued block as kernel. If a block is both called directly and passed
to enqueue_kernel, separate functions will be generated.

Differential Revision: https://reviews.llvm.org/D38134


git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@315804 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-14 12:23:50 +00:00
Artem Belevich 913b7c774b [CUDA] Added __hmma_m16n16k16_* builtins to support mma instructions on sm_70
Differential Revision: https://reviews.llvm.org/D38742

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@315624 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-12 21:32:19 +00:00
Craig Topper 9563977e8b [X86] Add support for 'amdfam17h' to __builtin_cpu_is to match gcc.
The compiler-rt implementation already supported it, it just wasn't exposed.

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@315517 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-11 21:42:02 +00:00
Matt Arsenault 2feacd003b AMDGPU: Add read_exec_lo/hi builtins
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@315238 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-09 20:06:37 +00:00
Erich Keane 2d90907990 Split X86::BI__builtin_cpu_init handling into own function[NFC]
The Cpu Init functionality is required for the target
attribute, so this patch simply splits it out into its own
function, exactly like CpuIs and CpuSupports.


git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@315075 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-06 16:40:45 +00:00
Akira Hatanaka a58a87ba41 Fix check strings in test case and use llvm::to_string instead of
std::to_string.

These changes were needed to fix bots that started failing after
r315045.

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@315046 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-06 07:47:47 +00:00
Akira Hatanaka bf4f193071 [CodeGen] Emit a helper function for __builtin_os_log_format to reduce
code size.

Currently clang expands a call to __builtin_os_log_format into a long
sequence of instructions at the call site, causing code size to
increase in some cases.

This commit attempts to reduce code size by emitting a helper function
that can be shared by calls to __builtin_os_log_format with similar
formats and arguments. The helper function has linkonce_odr linkage to
enable the linker to merge identical functions across translation units.
Attribute 'noinline' is attached to the helper function at -Oz so that
the inliner doesn't inline functions that can potentially be merged.

This commit also fixes a bug where the generated IR writes past the end
of the buffer when "%m" is the last specifier appearing in the format
string passed to __builtin_os_log_format.

Original patch by Duncan Exon Smith.

rdar://problem/34065973
rdar://problem/34196543

Differential Revision: https://reviews.llvm.org/D38606

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@315045 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-06 07:12:46 +00:00
Artem Belevich e0623132fe [NVPTX] added match.{any,all}.sync instructions, intrinsics & builtins.
Differential Revision: https://reviews.llvm.org/D38191

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@314223 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-26 17:07:23 +00:00
Justin Lebar 0e312680f1 Revert "[NVPTX] added match.{any,all}.sync instructions, intrinsics & builtins.", rL314135.
Causing assertion failures on macos:

> Assertion failed: (Num < NumOperands && "Invalid child # of SDNode!"),
> function getOperand, file
> /Users/buildslave/jenkins/workspace/clang-stage1-cmake-RA-incremental/llvm/include/llvm/CodeGen/SelectionDAGNodes.h,
> line 835.

http://green.lab.llvm.org/green/job/clang-stage1-cmake-RA-incremental/42739/testReport/LLVM/CodeGen_NVPTX/surf_read_cuda_ll/

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@314142 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-25 19:41:56 +00:00
Artem Belevich b46c968b1c [NVPTX] added match.{any,all}.sync instructions, intrinsics & builtins.
Differential Revision: https://reviews.llvm.org/D38191

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@314135 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-25 18:53:57 +00:00
Heejin Ahn f6dda016ee [WebAssembly] Restore __builtin_wasm_rethrow builtin
Summary:
Restore the `__builtin_wasm_rethrow` builtin deleted in D37931. On second
thought, it appears it can be used to implement `__cxa_rethrow`.

Reviewers: dschuff, sunfish

Reviewed By: dschuff

Subscribers: jfb, sbc100, jgravelle-google

Differential Revision: https://reviews.llvm.org/D37942

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@313430 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-16 01:07:43 +00:00
Craig Topper 6d55fdd9ee [X86] Use native shuffle vector for the perm2f128 intrinsics
This patch replaces the perm2f128 intrinsics with native shuffle vectors.

This uses a pretty simple approach to allocate source 0 to the lower half input and source 1 to the upper half input. Then its just a matter of filling in the indices to use either the lower or upper half of that specific source. This can result in the same source being used by both operands. InstCombine or SelectionDAGBuilder should be able to clean that up.

Differential Revision: https://reviews.llvm.org/D37892

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@313418 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-15 23:00:59 +00:00
Heejin Ahn 76889b5ed5 Remove __builtin_wasm_rethrow builtin
Summary:
Remove `__builtin_wasm_rethrow` builtin. I thought it was required to implement
`__cxa_rethrow` function in libcxxabi, but it turned out it will be using
`__builtin_wasm_throw` instead.

Reviewers: dschuff, jgravelle-google

Reviewed By: jgravelle-google

Subscribers: jfb, sbc100, jgravelle-google

Differential Revision: https://reviews.llvm.org/D37931

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@313402 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-15 22:01:22 +00:00
Uriel Korach 410d429c62 [X86] [PATCH] [intrinsics] Lowering X86 ABS intrinsics to IR. (clang)
This patch, together with a matching llvm patch (https://reviews.llvm.org/D37693), implements the lowering of X86 ABS intrinsics to IR.

Differential Revision: https://reviews.llvm.org/D37694

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@313133 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-13 09:02:02 +00:00
Jan Vesely 9adfcaf8db [OpenCL] Add half load and store builtins
This enables load/stores of half type, without half being a legal type.

Differential Revision: https://reviews.llvm.org/D37231

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@312742 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-07 19:39:10 +00:00
Reid Kleckner 9df566f7bb Commit changes missing from r312572
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@312573 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-05 20:38:29 +00:00
Reid Kleckner b2ae0f8aec [ms] Implement the __annotation intrinsic
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@312572 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-05 20:27:35 +00:00
Yaxun Liu fc6ac77722 [OpenCL] Do not use vararg in emitted functions for enqueue_kernel
Not all targets support vararg (e.g. amdgpu). Instead of using vararg in the emitted functions for enqueue_kernel,
this patch creates a temporary array of size_t, stores the size arguments in the temporary array
and passes it to the emitted functions for enqueue_kernel.

Differential Revision: https://reviews.llvm.org/D36678


git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@312441 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-03 13:52:24 +00:00
Erich Keane 371351289d [CodeGen]Refactor CpuSupports/CPUIs Builtin Code Gen to better work with
"target" implementation

A small set of refactors that'll make it easier for me to implement 'target' 
support.

First, extract the CPUSupports functionality into its own function. 
THis has the advantage of not wasting time in this builtin to deal with 
arguments.
Second, pulls both CPUSupports and CPUIs implementation into a member-function, 
so that it can be called from the resolver generation that I'm working on.
Third, creates an overload that takes simply the feature/cpu name (rather than 
extracting it from a callexpr), since that info isn't available later.

Note that despite how the 'diff' looks, the EmitX86CPUSupports function simply 
takes the implementation out of the 'switch'.



git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@312355 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-01 19:42:45 +00:00
Craig Topper 86736b95f3 [X86] Add support for __builtin_cpu_init
This adds builtin_cpu_init which will emit a call to cpu_indicator_init in libgcc or compiler-rt.

This is needed to support builtin_cpu_supports/builtin_cpu_is in an ifunc resolver.

Differential Revision: https://reviews.llvm.org/D36336

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@311874 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-28 05:43:23 +00:00
John McCall c2327951c9 Extract IRGen's constant-emitter into its own helper class and clean up
the interface.

The ultimate goal here is to make it easier to do some more interesting
things in constant emission, like emit constant initializers that have
ignorable side-effects, or doing the majority of an initialization
in-place and then patching up the last few things with calls.  But for
now this is mostly just a refactoring.

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@310964 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-15 21:42:52 +00:00
Craig Topper f7558e5102 [X86] Implement __builtin_cpu_is
This patch adds support for __builtin_cpu_is. I've tried to match the strings supported to the latest version of gcc.

Differential Revision: https://reviews.llvm.org/D35449

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@310657 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-10 20:28:30 +00:00
Craig Topper a9421e2a45 [X86] Support 'avx5124vnniw' and 'avx5124fmaps' for __builtin_cpu_supports.
They still need to be implemented in the intrinsics, the command line, and the backend. But this change isn't dependent on any of that and resolves a TODO.

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@310386 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-08 17:43:44 +00:00
Joey Gouly 3f5d3a1f08 [OpenCL] Add missing subgroup builtins
This adds get_kernel_max_sub_group_size_for_ndrange and
get_kernel_sub_group_count_for_ndrange.


git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@309678 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-01 13:27:09 +00:00
Victor Leschuk 18ebb1b364 Fix incorrect assertion condition.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@309484 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-29 08:18:38 +00:00
Vedant Kumar 081dca929f [ubsan] Diagnose invalid uses of builtins (clang)
On some targets, passing zero to the clz() or ctz() builtins has undefined
behavior. I ran into this issue while debugging UB in __hash_table from libcxx:
the bug I was seeing manifested itself differently under -O0 vs -Os, due to a
UB call to clz() (see: libcxx/r304617).

This patch introduces a check which can detect UB calls to builtins.

llvm.org/PR26979

Differential Revision: https://reviews.llvm.org/D34590

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@309459 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-29 00:19:51 +00:00
Martin Storsjo ba419afb84 [AArch64] Add support for __builtin_ms_va_list on aarch64
Move builtins from the x86 specific scope into the global
scope. Their use is still limited to x86_64 and aarch64 though.

This allows wine on aarch64 to properly handle variadic functions.

Differential Revision: https://reviews.llvm.org/D34475

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@308218 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-17 20:49:45 +00:00
Ulrich Weigand 4150789291 [SystemZ] Add support for IBM z14 processor (1/3)
This patch series adds support for the IBM z14 processor.  This part includes:
- Basic support for the new processor and its features.
- Support for low-level builtins mapped to new LLVM intrinsics.

Support for the -fzvector extension to vector float and the new
high-level vector intrinsics is provided by separate patches.



git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@308197 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-17 17:45:57 +00:00
Konstantin Zhuravlyov 8a8c68590d Enhance synchscope representation (clang)
Relevant changes required for r307722.

Differential Revision: https://reviews.llvm.org/D33109



git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@307723 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-11 22:23:37 +00:00
Craig Topper b5b8560174 [X86] Move AVX512VPOPCNTDQ in __builtin_cpu_support's enum to match trunk gcc.
There are two other features before it that we don't currently support in the the frontend or backend so I left placeholders to keep the encoding correct.

I think the compiler-rt implementation of this feature is even further out of date.

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@307456 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-08 00:47:44 +00:00
Sjoerd Meijer 5bf57dfedf This reverts r305820 (ARMv.2-A FP16 vector intrinsics) because it shows
problems in testing, see comments in D34161 for some more details.
A fix is in progres in D35011, but a revert seems better now as the fix will
probably take some more time to land.


git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@307277 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-06 16:37:31 +00:00
Heejin Ahn 115b2ce907 [WebAssembly] Add throw/rethrow builtins for exception handling
Summary:
Add new builtins for throw/rethrow instructions. This follows exception handling
handling proposal in
https://github.com/WebAssembly/exception-handling/blob/master/proposals/Exceptions.md

Reviewers: sunfish, dschuff

Reviewed By: dschuff

Subscribers: jfb, dschuff, sbc100, jgravelle-google

Differential Revision: https://reviews.llvm.org/D34783

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@306775 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-30 00:44:01 +00:00
Abderrazek Zaafrani 6e3f80de39 [AArch64] ADD ARMv.2-A FP16 vector intrinsics
Differential Revision: https://reviews.llvm.org/D34161

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@305820 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-20 18:54:57 +00:00
Dinar Temirbulatov 6adac51dab Expand vector oparation to as IR constants, PR28129.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@305551 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-16 12:09:52 +00:00
Galina Kistanova 97a0335447 Added LLVM_FALLTHROUGH to address warning: this statement may fall through. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@304649 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-03 06:30:46 +00:00
Vedant Kumar d4d74154eb Revert "[AArch64] Add ARMv8.2-A FP16 vefctor intrinsics"
This reverts commit r304493. It breaks all the Darwin bots:
http://green.lab.llvm.org/green/job/clang-stage1-cmake-RA-incremental_check/37168

Failure:
Failing Tests (2):
    Clang :: CodeGen/aarch64-v8.2a-neon-intrinsics.c
    Clang :: CodeGen/arm_neon_intrinsics.c

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@304509 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-02 01:22:14 +00:00
Abderrazek Zaafrani d751aefbc7 [AArch64] Add ARMv8.2-A FP16 vefctor intrinsics
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@304493 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-01 23:22:29 +00:00
Oren Ben Simhon 0197dcf96b [X86] Adding avx512_vpopcntdq feature set and its intrinsics
AVX512_VPOPCNTDQ is a new feature set that was published by Intel.
The patch represents the Clang side of the addition of six intrinsics for two new machine instructions (vpopcntd and vpopcntq).
It also includes the addition of the new feature set.

Differential Revision: https://reviews.llvm.org/D33170



git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@303857 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-25 13:44:11 +00:00
Tony Jiang bee521a5c2 [PowerPC] Implement vec_xxsldwi builtin.
The vec_xxsldwi builtin is missing from altivec.h. This has been requested by
developers working on libvpx for VP9 support for Google.

The patch fixes PR: https://bugs.llvm.org/show_bug.cgi?id=32653
Differential Revision: https://reviews.llvm.org/D33236

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@303766 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-24 15:54:13 +00:00
Tony Jiang 4afc97f714 [PowerPC] Implement vec_xxpermdi builtin.
The vec_xxpermdi builtin is missing from altivec.h. This has been requested by
developers working on libvpx for VP9 support for Google.

The patch fixes PR: https://bugs.llvm.org/show_bug.cgi?id=32653
Differential Revision: https://reviews.llvm.org/D33053

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@303760 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-24 15:13:32 +00:00
Krzysztof Parzyszek e593e0f467 [CodeGen] Propagate LValueBaseInfo instead of AlignmentSource
The functions creating LValues propagated information about alignment
source. Extend the propagated data to also include information about
possible unrestricted aliasing. A new class LValueBaseInfo will
contain both AlignmentSource and MayAlias info.

This patch should not introduce any functional changes.

Differential Revision: https://reviews.llvm.org/D33284


git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@303358 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-18 17:07:11 +00:00
Serge Guelton b0c092f298 Suppress all uses of LLVM_END_WITH_NULL. NFC.
Use variadic templates instead of relying on <cstdarg> + sentinel.

This enforces better type checking and makes code more readable.

Differential revision: https://reviews.llvm.org/D32550


git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@302572 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-09 19:31:30 +00:00
Dean Michael Berris 5a83b3867c [XRay] Add __xray_customeevent(...) as a clang-supported builtin
Summary:
We define the `__xray_customeevent` builtin that gets translated to
IR calls to the correct intrinsic. The default implementation of this is
a no-op function. The codegen side of this follows the following logic:

- When `-fxray-instrument` is not provided in the driver, we elide all
calls to `__xray_customevent`.
- When `-fxray-instrument` is enabled and a function is marked as "never
instrumented", we elide all calls to `__xray_customevent` in that
function; if either marked as "always instrumented" or subject to
threshold-based instrumentation, we emit a call to the
`llvm.xray.customevent` intrinsic from LLVM for each
`__xray_customevent` occurrence in the function.

This change depends on D27503 (to land in LLVM first).

Reviewers: echristo, rsmith

Subscribers: mehdi_amini, pelikan, lrl, cfe-commits

Differential Revision: https://reviews.llvm.org/D30018

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@302492 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-09 00:45:40 +00:00
Nico Weber 9dfca4e401 ANSIfy more. Still no behavior change.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@302259 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-05 17:16:58 +00:00
Nico Weber 9fc394c5a8 ANSIfy. No behavior change.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@302258 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-05 17:15:08 +00:00
Hans Wennborg 7a351322b4 Implement _interlockedbittestandset as a builtin
It's used by MS headers in VS 2017 without including intrin.h, so we
can't implement it in the header anymore.

Differential Revision: https://reviews.llvm.org/D31736

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@299782 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-07 16:41:47 +00:00
Michael Zuckerman 4107780903 [X86][Clang] Converting __mm{|256|512}_movm_epi{8|16|32|64} LLVMIR call into generic intrinsics.
This patch is a part two of two reviews, one for the clang and the other for LLVM. 
In this patch, I covered the clang side, by introducing the intrinsic to the front end. 
This is done by creating a generic replacement.

Differential Revision: https://reviews.llvm.org/D31394a


git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@299431 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-04 13:29:53 +00:00
Hans Wennborg 75b763e0de [X86] Implement __readgsqword (and the rest) as builtins (PR32373)
It seems MS headers have started using __readgsqword, and since it's
used in a header that doesn't include intrin.h, we can't implement it as
an inline function anymore.

That was already the case for __readfsdword, which Saleem added support
for in r220859. This patch reuses that codegen to implement all of
__read[fg]s{byte,word,dword,qword}.

Differential Revision: https://reviews.llvm.org/D31248

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@298538 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-22 19:13:13 +00:00
George Burgess IV 0e64fc640b Let llvm.objectsize be conservative with null pointers
D28494 adds another parameter to @llvm.objectsize. Clang needs to be
sure to pass that third arg whenever applicable.


git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@298431 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-21 20:09:35 +00:00
Reid Kleckner 9bd00f207c Update Clang for LLVM rename AttributeSet -> AttributeList
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@298394 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-21 16:57:30 +00:00
Sanjay Patel 91483646ef [x86] these aren't the undefs you're looking for (PR32176)
x86 has undef SSE/AVX intrinsics that should represent a bogus register operand. 
This is not the same as LLVM's undef value which can take on multiple bit patterns.

There are better solutions / follow-ups to this discussed here:
https://bugs.llvm.org/show_bug.cgi?id=32176
...but this should prevent miscompiles with a one-line code change.

Differential Revision: https://reviews.llvm.org/D30834


git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@297588 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-12 19:15:10 +00:00
Yaxun Liu 7679a84815 [AMDGPU] Add builtin functions readlane ds_permute mov_dpp
Differential Revision: https://reviews.llvm.org/D30551


git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@297436 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-10 01:30:46 +00:00
Reid Kleckner 0178473627 [MS] Add support for __ud2 and __int2c MSVC intrinsics
This was requested in PR31958 and elsewhere.

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@297057 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-06 19:43:16 +00:00
George Burgess IV e604e8210f [CodeGen] Don't reemit expressions for pass_object_size params.
This fixes an assertion failure in cases where we had expression
statements that declared variables nested inside of pass_object_size
args. Since we were emitting the same ExprStmt twice (once for the arg,
once for the @llvm.objectsize call), we were getting issues with
redefining locals.

This also means that we can be more lax about when we emit
@llvm.objectsize for pass_object_size args: since we're reusing the
arg's value itself, we don't have to care so much about side-effects.


git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@295935 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-23 05:59:56 +00:00
Matt Arsenault 521e2b23fa AMDGPU: Add fmed3 half builtin
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@295874 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-22 20:55:59 +00:00
George Burgess IV cefec9cba5 Call the correct @llvm.objectsize.
The following code would crash clang:

void foo(unsigned *const __attribute__((pass_object_size(0))));
void bar(unsigned *i) { foo(i); }

This is because we were always selecting the version of
`@llvm.objectsize` that takes an i8* in CodeGen. Passing an i32* as an
i8* makes LLVM very unhappy.

(Yes, I'm surprised that this remained uncaught for so long, too. :) )

As an added bonus, we'll now also use the appropriate address space when
emitting @llvm.objectsize calls.


git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@295805 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-22 02:35:51 +00:00
Anastasia Stulova f5802a7c28 [OpenCL] Correct ndrange_t implementation
Removed ndrange_t as Clang builtin type and added
as a struct type in the OpenCL header.

Use type name to do the Sema checking in enqueue_kernel
and modify IR generation accordingly.

Review: D28058

Patch by Dmitry Borisenkov!  
 


git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@295311 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-16 12:27:47 +00:00
Reid Kleckner e238007b4a [MS] Implement the __fastfail intrinsic as a builtin
__fastfail terminates the process immediately with a special system
call. It does not run any process shutdown code or exception recovery
logic.

Fixes PR31854

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@294606 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-09 18:31:06 +00:00
Matt Arsenault 4cedfcc1ec AMDGPU: Add builtin for fmed3 intrinsic
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@293600 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-31 03:42:07 +00:00
Arpith Chacko Jacob d3d136e37c [OpenMP][NVPTX][CUDA] Adding support for printf for an NVPTX OpenMP device.
Support for CUDA printf is exploited to support printf for
an NVPTX OpenMP device.

To reflect the support of both programming models, the file
CGCUDABuiltin.cpp has been renamed to CGGPUBuiltin.cpp, and
the call EmitCUDADevicePrintfCallExpr has been renamed to
EmitGPUDevicePrintfCallExpr.

Reviewers: jlebar
Differential Revision: https://reviews.llvm.org/D17890


git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@293444 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-29 20:49:31 +00:00
Anastasia Stulova 5e996222be [OpenCL] Add missing address spaces in IR generation of blocks
Modify ObjC blocks impl wrt address spaces as follows:

- keep default private address space for blocks generated
as local variables (with captures);

- add global address space for global block literals (no captures);

- make the block invoke function and enqueue_kernel prototype with
the generic AS block pointer parameter to accommodate both 
private and global AS cases from above;

- add block handling into default AS because it's implemented as
a special pointer type (BlockPointer) in the frontend and therefore
it is used as a pointer everywhere. This is also needed to accommodate
both private and global AS blocks for the two cases above.

- removes ObjC RT specific symbols (NSConcreteStackBlock and
NSConcreteGlobalBlock) in the OpenCL mode.

Review: https://reviews.llvm.org/D28814



git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@293286 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-27 15:11:34 +00:00
Richard Smith 3e45634a7f P0426: Make the library implementation of constexpr char_traits a little easier
by providing a memchr builtin that returns char* instead of void*.

Also add a __has_feature flag to indicate the presence of constexpr forms of
the relevant <string> functions.


git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@292555 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-20 00:45:35 +00:00
Chad Rosier 0d9e23af40 [ARM] Use generic bitreverse intrinsic, rather than ARM specific rbit.
The backend already supports lowering this intrinsic to a rbit instruction.

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@291582 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-10 18:55:11 +00:00
Chad Rosier 96e79e3c6f [AArch64] Use generic bitreverse intrinsic, rather than AArch64 specific.
Differential Revision: https://reviews.llvm.org/D28400

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@291574 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-10 17:20:28 +00:00
Sean Fertile d65cd1f942 Add vec_insert4b and vec_extract4b functions to altivec.h
Add builtins for the functions and custom codegen mapping the builtins to their
corresponding intrinsics and handling the endian related swapping.

https://reviews.llvm.org/D26546

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@291179 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-05 21:43:30 +00:00
Saleem Abdulrasool 97e0cdeaaa CodeGen: force builtins to be local
Unfortunately _setjmp3 can be both import or local.  The ASAN tests try to
emulate the flags which makes this harder to detect.  Rely on the linker
creating or using thunks here instead.  Should repair the ASAN windows bots.

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@289783 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-15 07:29:04 +00:00
Zachary Turner 94f92eb4d4 Update for clang after llvm::StringLiteral.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@289553 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-13 17:10:16 +00:00
Filipe Cabecinhas 19350fe26f [clang] Version support for UBSan handlers
This adds a way for us to version any UBSan handler by itself.
The patch overrides D21289 for a better implementation (we're able to
rev up a single handler).

After this, then we can land a slight modification of D19667+D19668.

We probably don't want to keep all the versions in compiler-rt (maybe we
want to deprecate on one release and remove the old handler on the next
one?), but with this patch we will loudly fail to compile when mixing
incompatible handler calls, instead of silently compiling and then
providing bad error messages.

Reviewers: kcc, samsonov, rsmith, vsk

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D21695

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@289444 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-12 16:18:40 +00:00
Akira Hatanaka 80218b5cd6 [CodeGen][ARM] Make sure the value and type used to create a bitcast
have the same size.

This fixes an asset that is triggered when an address of a boolean
variable is passed to __builtin_arm_ldrex or __builtin_arm_strex.

rdar://problem/29269006


git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@288404 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-01 19:25:14 +00:00
Peter Collingbourne 4547a18c48 IRGen: Remove all uses of CreateDefaultAlignedLoad.
Differential Revision: https://reviews.llvm.org/D27157

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@288083 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-28 22:30:21 +00:00
Konstantin Zhuravlyov 1d9b04d9b4 [AMDGPU] Change frexp.exp builtin to return i16 for f16 input
Differential Revision: https://reviews.llvm.org/D26863


git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@287390 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-18 22:31:51 +00:00
Zaara Syeda 9dbe9643d3 vector load store with length (left justified) clang portion
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@286994 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-15 18:04:13 +00:00
Tony Jiang 5ef1b463d0 [PowerPC] Implement BE VSX load/store builtins - clang portion.
This patch implements all the overloads for vec_xl_be and vec_xst_be. On BE,
they behaves exactly the same with vec_xl and vec_xst, therefore they are
simply implemented by defining a matching macro. On LE, they are implemented
by defining new builtins and intrinsics. For int/float/long long/double, it
is just a load (lxvw4x/lxvd2x) or store(stxvw4x/stxvd2x). For char/char/short,
we also need some extra shuffling before or after call the builtins to get the
desired BE order. For int128, simply call vec_xl or vec_xst.

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@286971 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-15 14:30:56 +00:00
Anastasia Stulova 0ba1dc91f5 [OpenCL] Fix for integer parameters of enqueue_kernel
Make handling integer parameters more flexible:

- For the number of events argument allow to pass larger
integers than 32 bits as soon as compiler can prove that
the range fits in 32 bits. If not, the diagnostic will be given.

- Change type of the arguments specifying the sizes of
the corresponding block arguments to be size_t.

Review: https://reviews.llvm.org/D26509



git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@286849 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-14 17:39:58 +00:00
Anastasia Stulova 9f4eb00e70 [OpenCL] Change to clk_event parameter in enqueue_kernel.
- Accept NULL pointer as a valid parameter value for clk_event.
- Generate clk_event_t arguments of internal
__enqueue_kernel_XXX function as pointers in generic address space.

Review: https://reviews.llvm.org/D26507



git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@286836 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-14 15:34:01 +00:00
Konstantin Zhuravlyov ebc8fed7d7 [AMDGPU] Add f16 builtin functions (VI+)
Differential Revision: https://reviews.llvm.org/D26476


git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@286741 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-13 02:37:05 +00:00
Simon Pilgrim f3e8e4e46f [X86] Merge (near) duplicate scalar non-temporal store code. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@286595 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-11 14:38:34 +00:00
Ayman Musa c2f923278d [X86][AVX512][Clang] Add support for mask_{move|store|load}_s{s/d} and int2mask/mask2int intrinsics.
Differential Revision: https://reviews.llvm.org/D26021



git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@286229 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-08 12:00:30 +00:00
David Majnemer f021623fdd Use toCharUnitsFromBits instead of TargetInfo::getCharWidth
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@285595 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-31 16:48:30 +00:00
David Majnemer b070ebaa5e Add support for __builtin_alloca_with_align
__builtin_alloca always uses __BIGGEST_ALIGNMENT__ for the alignment of
the allocation.  __builtin_alloca_with_align allows the programmer to
specify the alignment of the allocation.

This fixes PR30658.

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@285544 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-31 05:37:48 +00:00
David Majnemer 977531dd06 [CodeGen] Provide an appropriate alignment for dynamic allocas
GCC documents __builtin_alloca as aligning the storage to at least
__BIGGEST_ALIGNMENT__.

MSVC documents essentially the same for the x64 ABI:
https://msdn.microsoft.com/en-us/library/x9sx5da1.aspx

The 32-bit ABI follows the same rule: it emits a call to _alloca_probe_16

Differential Revision: https://reviews.llvm.org/D24378

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@285316 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-27 17:18:24 +00:00
John McCall a896e9a7d2 Refactor call emission to package the function pointer together with
abstract information about the callee.  NFC.

The goal here is to make it easier to recognize indirect calls and
trigger additional logic in certain cases.  That logic will come in
a later patch; in the meantime, I felt that this was a significant
improvement to the code.

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@285258 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-26 23:46:34 +00:00
Mehdi Amini e753a979e8 Add support for __builtin_os_log_format[_buffer_size]
This reverts commit r285007 and reapply r284990, with a fix for the
opencl test that I broke. Original commit message follows:

These new builtins support a mechanism for logging OS events, using a
printf-like format string to specify the layout of data in a buffer.
The _buffer_size version of the builtin can be used to determine the size
of the buffer to allocate to hold the data, and then __builtin_os_log_format
can write data into that buffer. This implements format checking to report
mismatches between the format string and the data arguments. Most of this
code was written by Chris Willmore.

Differential Revision: https://reviews.llvm.org/D25888

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@285019 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-24 20:39:34 +00:00
Mehdi Amini 16b762b316 Revert "Add support for __builtin_os_log_format[_buffer_size]"
This reverts commit r284990, two opencl test are broken

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@285007 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-24 19:41:36 +00:00
Mehdi Amini 27310e29ec Add support for __builtin_os_log_format[_buffer_size]
These new builtins support a mechanism for logging OS events, using a
printf-like format string to specify the layout of data in a buffer.
The _buffer_size version of the builtin can be used to determine the size
of the buffer to allocate to hold the data, and then __builtin_os_log_format
can write data into that buffer. This implements format checking to report
mismatches between the format string and the data arguments. Most of this
code was written by Chris Willmore.

Differential Revision: https://reviews.llvm.org/D25888

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@284990 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-24 16:56:23 +00:00
Craig Topper 0a3be13450 [AVX-512] Replace 64-bit element and 512-bit vector pmin/pmax builtins with native IR like we do for 128/256-bit, but with the addition of masking.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@284956 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-24 04:04:24 +00:00
Craig Topper 993ddd78d8 [AVX-512] Remove masked 128/256-bit palignr builtins. We can just use a select in the header file with the older unmasked versions instead.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@284920 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-22 18:32:33 +00:00
Albert Gutowski eeed5f637d Implement __stosb intrinsic as a volatile memset
Summary: We need `__stosb` to be an intrinsic, because SecureZeroMemory function uses it without including intrin.h. Implementing it as a volatile memset is not consistent with MSDN specification, but it gives us target-independent IR while keeping the most important properties of `__stosb`.

Reviewers: rnk, hans, thakis, majnemer

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D25334

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@284253 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-14 17:33:05 +00:00
Albert Gutowski eb6f208503 Add 64-bit MS _Interlocked functions as builtins again
Summary: Previously global 64-bit versions of _Interlocked functions broke buildbots on i386, so now I'm adding them as builtins for x86-64 and ARM only (should they be also on AArch64? I had problems with testing it for AArch64, so I left it)

Reviewers: hans, majnemer, mstorsjo, rnk

Subscribers: cfe-commits, aemerson

Differential Revision: https://reviews.llvm.org/D25576

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@284172 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-13 22:35:07 +00:00
Albert Gutowski c2f511f341 Implement MS _ReturnAddress and _AddressOfReturnAddress intrinsics
Reviewers: rnk, thakis, majnemer, hans

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D25540

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@284131 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-13 16:03:42 +00:00
Albert Gutowski 65503bbf1b Implement MS _BitScan intrinsics
Summary: _BitScan intrinsics (and some others, for example _Interlocked and _bittest) are supposed to work on both ARM and x86. This is an attempt to isolate them, avoiding repeating their code or writing separate function for each builtin.

Reviewers: hans, thakis, rnk, majnemer

Subscribers: RKSimon, cfe-commits, aemerson

Differential Revision: https://reviews.llvm.org/D25264

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@284060 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-12 22:01:05 +00:00
Mehdi Amini 4e291ad049 Revert "Change Builtins name to be stored as StringRef instead of raw pointers (NFC)"
This reverts commit r283802. It introduces temporarily static
initializers, because StringRef ctor isn't (yet) constexpr for
string literals.
I plan to get there this week, but apparently GCC is so terrible
with these static initializer right now (10 min+ extra codegen
time was reported) that I'll hold on to this patch till the
constexpr one is ready, and land these at the same time.

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@283920 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-11 19:04:24 +00:00
Mehdi Amini e6f1bd2494 Change Builtins name to be stored as StringRef instead of raw pointers (NFC)
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@283802 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-10 21:34:29 +00:00
Albert Gutowski 8001a781cb Implement MS read/write barriers and __faststorefence intrinsic
Reviewers: hans, rnk, majnemer

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D25442


git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@283793 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-10 19:40:51 +00:00
Albert Gutowski 7f9e8b95ab Implement __emul, __emulu, _mul128 and _umul128 MS intrinsics
Reviewers: rnk, thakis, majnemer, hans

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D25353


git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@283785 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-10 18:09:27 +00:00
Albert Gutowski a0ff5f0745 Separate builtins for x84-64 and i386; implement __mulh and __umulh
Summary: We need x86-64-specific builtins if we want to implement some of the MS intrinsics - winnt.h contains definitions of some functions for i386, but not for x86-64 (for example _InterlockedOr64), which means that we cannot treat them as builtins for both i386 and x86-64, because then we have definitions of builtin functions in winnt.h on i386.

Reviewers: thakis, majnemer, hans, rnk

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D24598


git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@283264 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-04 22:29:49 +00:00