example: refactor led test

example/src/led.v

@@ -0,0 +1,18 @@
+module led(
+  input clk,
+  input rst,
+  input [7:0] sw,
+  output [15:0] ledr
+);
+  reg [31:0] count;
+  reg [7:0] led;
+  always @(posedge clk) begin
+    if (rst) begin led <= 1; count <= 0; end
+    else begin
+      if (count == 0) led <= {led[6:0], led[7]};
+      count <= (count >= 50000 ? 32'b0 : count + 1);
+    end
+  end
+
+  assign ledr = {led, sw};
+endmodule

example/src/test.v

@@ -1,15 +0,0 @@
-module test (
-    input clk,
-    input [7:0] sw,
-    output [15:0] ledr
-);
-
-reg [7:0] cnt;
-
-always @(posedge clk) begin
-    cnt <= cnt + 8'd1;
-end
-
-assign ledr = {cnt, sw};
-
-endmodule

example/src/top.v

@@ -22,8 +22,9 @@ module top (
     output [7:0] seg7
 );
 
-test test1(
+led led1(
     .clk(clk),
+    .rst(rst),
     .sw(sw),
     .ledr(ledr)
 );