| .. |
|
CMakeLists.txt
|
…
|
|
|
InstCombineAddSub.cpp
|
[InstCombine] reduce disguised mul+add factorization
|
2022-08-24 16:02:12 -04:00 |
|
InstCombineAndOrXor.cpp
|
[InstCombine] allow sext in fold of mask using signbit, part 2
|
2022-08-28 11:50:52 -04:00 |
|
InstCombineAtomicRMW.cpp
|
[LLVM] Add the support for fmax and fmin in atomicrmw instruction
|
2022-07-06 10:57:53 -04:00 |
|
InstCombineCalls.cpp
|
[Transform] Use range-based for loops (NFC)
|
2022-08-27 23:54:32 -07:00 |
|
InstCombineCasts.cpp
|
[InstCombine] recognize bitreverse disguised as shufflevector
|
2022-08-25 10:41:47 +08:00 |
|
InstCombineCompares.cpp
|
[InstCombine] fold test of equality to 0.0 with bitcast operand
|
2022-08-26 13:46:11 -04:00 |
|
InstCombineInternal.h
|
[InstCombine] add helper function for extract of with-overflow-intrinsic; NFC
|
2022-08-09 12:38:11 -04:00 |
|
InstCombineLoadStoreAlloca.cpp
|
[Transforms] Qualify auto in range-based for loops (NFC)
|
2022-08-27 21:21:02 -07:00 |
|
InstCombineMulDivRem.cpp
|
[InstCombine] Propagate the nuw for combine of add+mul
|
2022-08-28 23:01:11 +08:00 |
|
InstCombineNegator.cpp
|
[InstCombine] fold signbit splat pattern that uses negate
|
2022-08-27 08:04:35 -04:00 |
|
InstCombinePHI.cpp
|
[InstCombine] Improve check for catchswitch BBs (NFC)
|
2022-06-15 01:06:13 -07:00 |
|
InstCombineSelect.cpp
|
[InstCombine] Change order of canonicalization of ADD and AND
|
2022-08-22 20:03:53 +01:00 |
|
InstCombineShifts.cpp
|
[InstCombine] Add mul with negated power of 2 constant to canEvaluateShifted.
|
2022-07-20 11:00:22 -07:00 |
|
InstCombineSimplifyDemanded.cpp
|
[InstCombine] Try not to demand low order bits for Add
|
2022-08-22 20:03:53 +01:00 |
|
InstCombineVectorOps.cpp
|
[llvm] Use range-based for loops (NFC)
|
2022-08-28 17:35:04 -07:00 |
|
InstructionCombining.cpp
|
[Transforms] Qualify auto in range-based for loops (NFC)
|
2022-08-27 21:21:02 -07:00 |
c63f823875