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CMakeLists.txt
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RISCVAsmBackend.cpp
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[MC] llvm::Optional => std::optional
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2022-12-04 21:36:08 +00:00 |
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RISCVAsmBackend.h
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[MC] llvm::Optional => std::optional
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2022-12-04 21:36:08 +00:00 |
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RISCVBaseInfo.cpp
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Fix build error. Now we can have initial divergent execution code generated as expected.
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2022-12-20 09:41:21 +08:00 |
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RISCVBaseInfo.h
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[VENTUS][fix] Support the regexti instruction
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2024-01-23 09:59:51 +08:00 |
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RISCVELFObjectWriter.cpp
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[RISCV] Assemble `call foo` to R_RISCV_CALL_PLT
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2022-09-13 18:47:55 -07:00 |
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RISCVELFStreamer.cpp
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[RISCV] Support .variant_cc directive for the assembler.
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2022-12-05 12:13:43 +08:00 |
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RISCVELFStreamer.h
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[RISCV] Support .variant_cc directive for the assembler.
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2022-12-05 12:13:43 +08:00 |
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RISCVFixupKinds.h
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[RISCV][NFC] Use nested namespace definations.
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2022-08-13 09:56:59 +08:00 |
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RISCVInstPrinter.cpp
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Turn on ABI register naming
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2023-01-03 11:36:49 +08:00 |
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RISCVInstPrinter.h
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RISCVMCAsmInfo.cpp
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…
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RISCVMCAsmInfo.h
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…
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RISCVMCCodeEmitter.cpp
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Fix some build warnings
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2023-01-19 09:45:27 +08:00 |
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RISCVMCExpr.cpp
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RISCVMCExpr.h
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…
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RISCVMCObjectFileInfo.cpp
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[RISCV] Add CodeGen support and MC testcase of RISCV Zca Extension
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2022-11-22 17:22:26 +08:00 |
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RISCVMCObjectFileInfo.h
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…
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RISCVMCTargetDesc.cpp
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Update Ventus GPGPU ABI: X4 as stack pointer, V0-V31 as arguments registers etc
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2022-12-28 13:11:22 +08:00 |
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RISCVMCTargetDesc.h
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[CodeGen] Move instruction predicate verification to emitInstruction
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2022-07-14 09:33:28 +01:00 |
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RISCVMatInt.cpp
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[RISCV] Use findFirstSet instead of countTrailingZeros. NFC
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2022-12-04 18:00:36 -08:00 |
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RISCVMatInt.h
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[RISCV] Add an operand kind to the opcode/imm returned from RISCVMatInt.
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2022-05-24 14:56:29 -07:00 |
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RISCVTargetStreamer.cpp
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[RISCV] Support .variant_cc directive for the assembler.
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2022-12-05 12:13:43 +08:00 |
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RISCVTargetStreamer.h
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[RISCV] Support .variant_cc directive for the assembler.
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2022-12-05 12:13:43 +08:00 |
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