338 lines
12 KiB
C++
338 lines
12 KiB
C++
//===- LoopAnalysis.cpp - Misc loop analysis routines //-------------------===//
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//
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// Copyright 2019 The MLIR Authors.
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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// =============================================================================
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//
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// This file implements miscellaneous loop analysis routines.
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//
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//===----------------------------------------------------------------------===//
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#include "mlir/Analysis/LoopAnalysis.h"
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#include "mlir/AffineOps/AffineOps.h"
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#include "mlir/Analysis/AffineAnalysis.h"
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#include "mlir/Analysis/AffineStructures.h"
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#include "mlir/Analysis/NestedMatcher.h"
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#include "mlir/Analysis/VectorAnalysis.h"
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#include "mlir/IR/Builders.h"
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#include "mlir/IR/BuiltinOps.h"
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#include "mlir/IR/Instructions.h"
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#include "mlir/StandardOps/StandardOps.h"
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#include "mlir/SuperVectorOps/SuperVectorOps.h"
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#include "mlir/Support/Functional.h"
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#include "mlir/Support/MathExtras.h"
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#include "llvm/ADT/DenseSet.h"
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#include "llvm/ADT/SmallString.h"
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#include <type_traits>
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using namespace mlir;
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/// Returns the trip count of the loop as an affine expression if the latter is
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/// expressible as an affine expression, and nullptr otherwise. The trip count
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/// expression is simplified before returning.
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AffineExpr mlir::getTripCountExpr(const ForInst &forInst) {
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// upper_bound - lower_bound
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int64_t loopSpan;
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int64_t step = forInst.getStep();
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auto *context = forInst.getContext();
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if (forInst.hasConstantBounds()) {
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int64_t lb = forInst.getConstantLowerBound();
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int64_t ub = forInst.getConstantUpperBound();
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loopSpan = ub - lb;
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} else {
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auto lbMap = forInst.getLowerBoundMap();
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auto ubMap = forInst.getUpperBoundMap();
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// TODO(bondhugula): handle max/min of multiple expressions.
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if (lbMap.getNumResults() != 1 || ubMap.getNumResults() != 1)
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return nullptr;
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// TODO(bondhugula): handle bounds with different operands.
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// Bounds have different operands, unhandled for now.
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if (!forInst.matchingBoundOperandList())
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return nullptr;
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// ub_expr - lb_expr
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AffineExpr lbExpr(lbMap.getResult(0));
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AffineExpr ubExpr(ubMap.getResult(0));
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auto loopSpanExpr = simplifyAffineExpr(
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ubExpr - lbExpr, std::max(lbMap.getNumDims(), ubMap.getNumDims()),
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std::max(lbMap.getNumSymbols(), ubMap.getNumSymbols()));
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auto cExpr = loopSpanExpr.dyn_cast<AffineConstantExpr>();
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if (!cExpr)
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return loopSpanExpr.ceilDiv(step);
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loopSpan = cExpr.getValue();
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}
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// 0 iteration loops.
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if (loopSpan < 0)
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return 0;
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return getAffineConstantExpr(static_cast<uint64_t>(ceilDiv(loopSpan, step)),
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context);
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}
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/// Returns the trip count of the loop if it's a constant, None otherwise. This
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/// method uses affine expression analysis (in turn using getTripCount) and is
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/// able to determine constant trip count in non-trivial cases.
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llvm::Optional<uint64_t> mlir::getConstantTripCount(const ForInst &forInst) {
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auto tripCountExpr = getTripCountExpr(forInst);
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if (!tripCountExpr)
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return None;
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if (auto constExpr = tripCountExpr.dyn_cast<AffineConstantExpr>())
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return constExpr.getValue();
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return None;
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}
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/// Returns the greatest known integral divisor of the trip count. Affine
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/// expression analysis is used (indirectly through getTripCount), and
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/// this method is thus able to determine non-trivial divisors.
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uint64_t mlir::getLargestDivisorOfTripCount(const ForInst &forInst) {
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auto tripCountExpr = getTripCountExpr(forInst);
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if (!tripCountExpr)
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return 1;
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if (auto constExpr = tripCountExpr.dyn_cast<AffineConstantExpr>()) {
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uint64_t tripCount = constExpr.getValue();
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// 0 iteration loops (greatest divisor is 2^64 - 1).
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if (tripCount == 0)
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return ULONG_MAX;
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// The greatest divisor is the trip count.
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return tripCount;
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}
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// Trip count is not a known constant; return its largest known divisor.
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return tripCountExpr.getLargestKnownDivisor();
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}
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bool mlir::isAccessInvariant(const Value &iv, const Value &index) {
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assert(isForInductionVar(&iv) && "iv must be a ForInst");
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assert(index.getType().isa<IndexType>() && "index must be of IndexType");
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SmallVector<OperationInst *, 4> affineApplyOps;
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getReachableAffineApplyOps({const_cast<Value *>(&index)}, affineApplyOps);
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if (affineApplyOps.empty()) {
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// Pointer equality test because of Value pointer semantics.
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return &index != &iv;
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}
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if (affineApplyOps.size() > 1) {
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affineApplyOps[0]->emitError(
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"CompositionAffineMapsPass must have been run: there should be at most "
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"one AffineApplyOp");
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return false;
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}
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auto composeOp = affineApplyOps[0]->cast<AffineApplyOp>();
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// We need yet another level of indirection because the `dim` index of the
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// access may not correspond to the `dim` index of composeOp.
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return !AffineValueMap(*composeOp).isFunctionOf(0, const_cast<Value *>(&iv));
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}
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llvm::DenseSet<const Value *>
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mlir::getInvariantAccesses(const Value &iv,
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llvm::ArrayRef<const Value *> indices) {
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llvm::DenseSet<const Value *> res;
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for (unsigned idx = 0, n = indices.size(); idx < n; ++idx) {
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auto *val = indices[idx];
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if (isAccessInvariant(iv, *val)) {
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res.insert(val);
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}
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}
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return res;
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}
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/// Given:
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/// 1. an induction variable `iv` of type ForInst;
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/// 2. a `memoryOp` of type const LoadOp& or const StoreOp&;
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/// 3. the index of the `fastestVaryingDim` along which to check;
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/// determines whether `memoryOp`[`fastestVaryingDim`] is a contiguous access
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/// along `iv`.
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/// Contiguous is defined as either invariant or varying only along
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/// `fastestVaryingDim`.
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///
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/// Prerequisites:
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/// 1. `iv` of the proper type;
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/// 2. the MemRef accessed by `memoryOp` has no layout map or at most an
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/// identity layout map.
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///
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/// Currently only supports no layoutMap or identity layoutMap in the MemRef.
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/// Returns false if the MemRef has a non-identity layoutMap or more than
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/// 1 layoutMap. This is conservative.
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///
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// TODO(ntv): check strides.
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template <typename LoadOrStoreOp>
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static bool isContiguousAccess(const Value &iv, const LoadOrStoreOp &memoryOp,
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unsigned fastestVaryingDim) {
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static_assert(std::is_same<LoadOrStoreOp, LoadOp>::value ||
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std::is_same<LoadOrStoreOp, StoreOp>::value,
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"Must be called on either const LoadOp & or const StoreOp &");
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auto memRefType = memoryOp.getMemRefType();
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if (fastestVaryingDim >= memRefType.getRank()) {
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memoryOp.emitError("fastest varying dim out of bounds");
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return false;
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}
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auto layoutMap = memRefType.getAffineMaps();
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// TODO(ntv): remove dependence on Builder once we support non-identity
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// layout map.
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Builder b(memoryOp.getInstruction()->getContext());
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if (layoutMap.size() >= 2 ||
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(layoutMap.size() == 1 &&
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!(layoutMap[0] ==
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b.getMultiDimIdentityMap(layoutMap[0].getNumDims())))) {
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return memoryOp.emitError("NYI: non-trivial layoutMap"), false;
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}
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auto indices = memoryOp.getIndices();
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auto numIndices = llvm::size(indices);
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unsigned d = 0;
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for (auto index : indices) {
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if (fastestVaryingDim == (numIndices - 1) - d++) {
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continue;
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}
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if (!isAccessInvariant(iv, *index)) {
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return false;
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}
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}
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return true;
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}
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template <typename LoadOrStoreOpPointer>
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static bool isVectorElement(LoadOrStoreOpPointer memoryOp) {
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auto memRefType = memoryOp->getMemRefType();
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return memRefType.getElementType().template isa<VectorType>();
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}
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static bool isVectorTransferReadOrWrite(const Instruction &inst) {
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const auto *opInst = cast<OperationInst>(&inst);
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return opInst->isa<VectorTransferReadOp>() ||
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opInst->isa<VectorTransferWriteOp>();
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}
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using VectorizableInstFun =
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std::function<bool(const ForInst &, const OperationInst &)>;
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static bool isVectorizableLoopWithCond(const ForInst &loop,
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VectorizableInstFun isVectorizableInst) {
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if (!matcher::isParallelLoop(loop) && !matcher::isReductionLoop(loop)) {
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return false;
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}
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// No vectorization across conditionals for now.
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auto conditionals = matcher::If();
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auto *forInst = const_cast<ForInst *>(&loop);
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auto conditionalsMatched = conditionals.match(forInst);
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if (!conditionalsMatched.empty()) {
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return false;
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}
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// No vectorization across unknown regions.
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auto regions = matcher::Op([](const Instruction &inst) -> bool {
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auto &opInst = cast<OperationInst>(inst);
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return opInst.getNumBlockLists() != 0 && !opInst.isa<AffineIfOp>();
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});
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auto regionsMatched = regions.match(forInst);
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if (!regionsMatched.empty()) {
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return false;
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}
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auto vectorTransfers = matcher::Op(isVectorTransferReadOrWrite);
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auto vectorTransfersMatched = vectorTransfers.match(forInst);
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if (!vectorTransfersMatched.empty()) {
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return false;
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}
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auto loadAndStores = matcher::Op(matcher::isLoadOrStore);
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auto loadAndStoresMatched = loadAndStores.match(forInst);
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for (auto ls : loadAndStoresMatched) {
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auto *op = cast<OperationInst>(ls.first);
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auto load = op->dyn_cast<LoadOp>();
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auto store = op->dyn_cast<StoreOp>();
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// Only scalar types are considered vectorizable, all load/store must be
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// vectorizable for a loop to qualify as vectorizable.
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// TODO(ntv): ponder whether we want to be more general here.
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bool vector = load ? isVectorElement(load) : isVectorElement(store);
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if (vector) {
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return false;
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}
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if (!isVectorizableInst(loop, *op)) {
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return false;
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}
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}
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return true;
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}
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bool mlir::isVectorizableLoopAlongFastestVaryingMemRefDim(
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const ForInst &loop, unsigned fastestVaryingDim) {
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VectorizableInstFun fun(
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[fastestVaryingDim](const ForInst &loop, const OperationInst &op) {
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auto load = op.dyn_cast<LoadOp>();
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auto store = op.dyn_cast<StoreOp>();
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return load ? isContiguousAccess(*loop.getInductionVar(), *load,
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fastestVaryingDim)
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: isContiguousAccess(*loop.getInductionVar(), *store,
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fastestVaryingDim);
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});
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return isVectorizableLoopWithCond(loop, fun);
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}
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bool mlir::isVectorizableLoop(const ForInst &loop) {
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VectorizableInstFun fun(
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// TODO: implement me
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[](const ForInst &loop, const OperationInst &op) { return true; });
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return isVectorizableLoopWithCond(loop, fun);
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}
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/// Checks whether SSA dominance would be violated if a for inst's body
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/// instructions are shifted by the specified shifts. This method checks if a
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/// 'def' and all its uses have the same shift factor.
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// TODO(mlir-team): extend this to check for memory-based dependence
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// violation when we have the support.
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bool mlir::isInstwiseShiftValid(const ForInst &forInst,
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ArrayRef<uint64_t> shifts) {
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auto *forBody = forInst.getBody();
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assert(shifts.size() == forBody->getInstructions().size());
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unsigned s = 0;
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for (const auto &inst : *forBody) {
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// A for or if inst does not produce any def/results (that are used
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// outside).
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if (const auto *opInst = dyn_cast<OperationInst>(&inst)) {
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for (unsigned i = 0, e = opInst->getNumResults(); i < e; ++i) {
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const Value *result = opInst->getResult(i);
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for (const InstOperand &use : result->getUses()) {
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// If an ancestor instruction doesn't lie in the block of forInst,
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// there is no shift to check. This is a naive way. If performance
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// becomes an issue, a map can be used to store 'shifts' - to look up
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// the shift for a instruction in constant time.
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if (auto *ancInst = forBody->findAncestorInstInBlock(*use.getOwner()))
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if (shifts[s] != shifts[forBody->findInstPositionInBlock(*ancInst)])
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return false;
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}
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}
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}
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s++;
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}
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return true;
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}
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