llvm-project/llvm/test/CodeGen/VE/Vector
Sanjay Patel fe05a0a3dd [SDAG] avoid udiv/urem transform for vector/scalar type mismatches
This solves the crashing from issue #58994.
I don't know anything about VE, so I don't know if the output
is as expected or even correct.
2022-11-15 11:01:18 -05:00
..
expand_single_elem_build_vec.ll
extract_elt.ll [CodeGen] Using ZExt for extractelement indices. 2022-10-15 15:45:35 -07:00
fastcc_callee.ll
fastcc_caller.ll
feature_vpu.ll
insert_elt.ll [CodeGen] Using ZExt for extractelement indices. 2022-10-15 15:45:35 -07:00
load_stk_ldvm.ll
loadvm.ll
loadvr.ll
mask_binary.ll
mask_broadcast.ll
store_stk_stvm.ll
storevm.ll
storevr.ll
vec_add.ll
vec_and.ll
vec_broadcast.ll
vec_divrem.ll [SDAG] avoid udiv/urem transform for vector/scalar type mismatches 2022-11-15 11:01:18 -05:00
vec_fcmp.ll
vec_fma.ll
vec_fneg.ll
vec_gather.ll
vec_icmp.ll
vec_load.ll
vec_reduce_add.ll
vec_reduce_and.ll
vec_reduce_or.ll
vec_reduce_smax.ll
vec_reduce_xor.ll
vec_scatter.ll
vec_select.ll
vec_store.ll
vp_add.ll
vp_and.ll
vp_ashr.ll
vp_fadd.ll
vp_fadd_merge.ll
vp_fdiv.ll
vp_fdiv_merge.ll
vp_fma.ll
vp_fma_merge.ll
vp_fmul.ll
vp_fmul_merge.ll
vp_fsub.ll
vp_fsub_merge.ll
vp_gather.ll
vp_lshr.ll
vp_merge.ll
vp_mul.ll
vp_or.ll
vp_reduce_add.ll
vp_reduce_and.ll
vp_reduce_or.ll
vp_reduce_smax.ll
vp_reduce_xor.ll
vp_scatter.ll
vp_sdiv.ll
vp_select.ll
vp_shl.ll
vp_sra.ll
vp_srem.ll [VP][VE] Default VP_SREM/UREM to Expand and add generic expansion using VP_SDIV/UDIV+VP_MUL+VP_SUB. 2022-09-16 13:19:02 -07:00
vp_srl.ll
vp_strided_load.ll
vp_strided_store.ll
vp_sub.ll
vp_udiv.ll
vp_urem.ll [VP][VE] Default VP_SREM/UREM to Expand and add generic expansion using VP_SDIV/UDIV+VP_MUL+VP_SUB. 2022-09-16 13:19:02 -07:00
vp_xor.ll