llvm-project/llvm/test/CodeGen/RISCV/VentusGPGPU/kernel_args.ll

25 lines
917 B
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=riscv32 -mcpu=ventus-gpgpu -verify-machineinstrs < %s \
; RUN: | FileCheck -check-prefix=VENTUS %s
;;
;; The start address of kernel arguments are stored in a0(a0, a1 if in 64 bit address space),
;; and aligned respectively according to data layout.
;;
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: write) vscale_range(1,2048)
define dso_local spir_kernel void @foo(i32 noundef %a, i32 noundef %b, ptr addrspace(1) nocapture noundef writeonly align 4 %c) {
; VENTUS-LABEL: foo:
; VENTUS: # %bb.0:
; VENTUS-NEXT: lw a1, 0(a0)
; VENTUS-NEXT: lw a2, 4(a0)
; VENTUS-NEXT: lw a0, 8(a0)
; VENTUS-NEXT: add a1, a1, a2
; VENTUS-NEXT: sw a1, 0(a0)
; VENTUS-NEXT: ret
%add = add nsw i32 %b, %a
store i32 %add, ptr addrspace(1) %c, align 4
ret void
}