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llvm-project/llvm/lib/Target/LoongArch
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Xiaodong Liu 03d07e181d [LoongArch] Handle register spill in BranchRelaxation pass 
When the range of the unconditional branch is overflow, the indirect
branch way is used. The case when there is no scavenged register for
indirect branch needs to spill register to stack.

Reviewed By: SixWeining, wangleiat

Differential Revision: https://reviews.llvm.org/D137821
 		2022-11-15 09:55:40 +08:00
..
AsmParser [LoongArch] Report error in AsmParser when rd == rk or rd == rj for AM* instructions 2022-10-21 09:56:45 +08:00
Disassembler [LoongArch] Use `end namespace xxx` style comment. NFC 2022-07-26 15:01:29 +08:00
MCTargetDesc [LoongArch] Implement MCTargetExpr::fixELFSymbolsInTLSFixups hook 2022-11-12 17:23:51 +08:00
TargetInfo [LoongArch] Use `end namespace xxx` style comment. NFC 2022-07-26 15:01:29 +08:00
CMakeLists.txt [LoongArch] Lower BlockAddress/JumpTable 2022-09-26 10:52:54 +08:00
LoongArch.h [LoongArch] Lower BlockAddress/JumpTable 2022-09-26 10:52:54 +08:00
LoongArch.td [LoongArch] Support 'generic' as a valid CPU name 2022-09-26 10:20:13 +08:00
LoongArchAsmPrinter.cpp [LoongArch] Support inline asm operand modifier 'z' 2022-10-31 09:56:41 +08:00
LoongArchAsmPrinter.h Reland "[Clang][LoongArch] Add inline asm support for constraints k/m/ZB/ZC" 2022-10-11 19:51:48 +08:00
LoongArchCallingConv.td
…
LoongArchExpandAtomicPseudoInsts.cpp [LoongArch] Add codegen support for cmpxchg on LA64 2022-10-27 21:18:17 +08:00
LoongArchExpandPseudoInsts.cpp [LoongArch] Generate PCALAU12I + JIRL instruction pair for medium codemodel 2022-11-11 18:26:51 +08:00
LoongArchFloat32InstrInfo.td [LoongArch] Added spill/reload/copy support for CFRs 2022-11-10 20:12:18 +08:00
LoongArchFloat64InstrInfo.td [LoongArch] Added spill/reload/copy support for CFRs 2022-11-10 20:12:18 +08:00
LoongArchFloatInstrFormats.td [LoongArch] Add basic floating-point instructions definition 2022-04-21 10:04:20 +08:00
LoongArchFrameLowering.cpp [LoongArch] Handle register spill in BranchRelaxation pass 2022-11-15 09:55:40 +08:00
LoongArchFrameLowering.h [LoongArch] Override TargetFrameLowering::spillCalleeSavedRegisters 2022-11-10 21:14:27 +08:00
LoongArchISelDAGToDAG.cpp [LoongArch] Fix codegen for [su]itofp instructions 2022-11-03 11:40:50 +08:00
LoongArchISelDAGToDAG.h Reland "[Clang][LoongArch] Add inline asm support for constraints k/m/ZB/ZC" 2022-10-11 19:51:48 +08:00
LoongArchISelLowering.cpp [LoongArch] Expand atomicrmw fadd/fsub/fmin/fmax with CmpXChg 2022-11-14 10:11:37 +08:00
LoongArchISelLowering.h [Clang][LoongArch] Implement __builtin_loongarch_crc_w_d_w builtin and add diagnostics 2022-11-11 09:16:57 +08:00
LoongArchInstrFormats.td [LoongArch] Add privilege instructions definition 2022-05-14 17:46:02 +08:00
LoongArchInstrInfo.cpp [LoongArch] Handle register spill in BranchRelaxation pass 2022-11-15 09:55:40 +08:00
LoongArchInstrInfo.h [LoongArch] Support parsing target specific flags for MIR 2022-11-10 20:53:20 +08:00
LoongArchInstrInfo.td [LoongArch] Generate PCALAU12I + JIRL instruction pair for medium codemodel 2022-11-11 18:26:51 +08:00
LoongArchMCInstLower.cpp [LoongArch] Fix wrong VariantKind for MO_GOT_PC_{HI/LO} flags 2022-10-15 17:45:08 +08:00
LoongArchMachineFunctionInfo.h [LoongArch] Handle register spill in BranchRelaxation pass 2022-11-15 09:55:40 +08:00
LoongArchRegisterInfo.cpp [LoongArch] Added spill/reload/copy support for CFRs 2022-11-10 20:12:18 +08:00
LoongArchRegisterInfo.h [LoongArch] Support lowering frames larger than 2048 bytes 2022-09-27 18:58:33 +08:00
LoongArchRegisterInfo.td [RegisterInfoEmitter] Generate isConstantPhysReg(). NFCI 2022-08-24 14:16:20 +00:00
LoongArchSubtarget.cpp [LoongArch] Support 'generic' as a valid CPU name 2022-09-26 10:20:13 +08:00
LoongArchSubtarget.h [LoongArch] Override TargetSubtargetInfo::getSelectionDAGInfo 2022-09-29 08:46:53 +08:00
LoongArchTargetMachine.cpp [LoongArch] Add support for the BranchRelaxation pass 2022-11-08 19:26:16 +08:00
LoongArchTargetMachine.h
…