96 lines
3.6 KiB
LLVM
96 lines
3.6 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=x86_64-unknown-unknown -relocation-model=pic %s -o - | FileCheck %s
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; Tests come from "clang/test/CodeGen/ms-inline-asm-variables.c"
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; int gVar;
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; void t1() {
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; __asm add eax, dword ptr gVar[rax]
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; __asm add dword ptr [rax+gVar], eax
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; __asm add ebx, dword ptr gVar[271 - 82 + 81 + rbx]
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; __asm add dword ptr [rbx + gVar + 828], ebx
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; gVar = 3;
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; }
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;
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; void t2(void) {
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; int lVar;
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; __asm mov eax, dword ptr lVar[rax]
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; __asm mov dword ptr [rax+lVar], eax
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; __asm mov ebx, dword ptr lVar[271 - 82 + 81 + rbx]
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; __asm mov dword ptr [rbx + lVar + 828], ebx
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; __asm mov 5 + 8 + 13 + 21[lVar + rbx], eax
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; lVar = 2;
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; }
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@gVar = global i32 0, align 4
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; Function Attrs: noinline nounwind optnone uwtable
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define void @t1() #0 {
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; CHECK-LABEL: t1:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: pushq %rbp
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; CHECK-NEXT: .cfi_def_cfa_offset 16
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; CHECK-NEXT: .cfi_offset %rbp, -16
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; CHECK-NEXT: movq %rsp, %rbp
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; CHECK-NEXT: .cfi_def_cfa_register %rbp
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; CHECK-NEXT: pushq %rbx
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; CHECK-NEXT: .cfi_offset %rbx, -24
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; CHECK-NEXT: movq gVar@GOTPCREL(%rip), %rcx
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; CHECK-NEXT: #APP
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; CHECK-EMPTY:
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; CHECK-NEXT: addl (%rcx,%rax), %eax
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; CHECK-NEXT: addl %eax, (%rcx,%rax)
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; CHECK-NEXT: addl 270(%rcx,%rbx), %ebx
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; CHECK-NEXT: addl %ebx, 828(%rcx,%rbx)
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; CHECK-EMPTY:
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: movq gVar@GOTPCREL(%rip), %rax
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; CHECK-NEXT: movl $3, (%rax)
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; CHECK-NEXT: popq %rbx
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; CHECK-NEXT: popq %rbp
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; CHECK-NEXT: .cfi_def_cfa %rsp, 8
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; CHECK-NEXT: retq
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entry:
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call void asm sideeffect inteldialect "add eax, dword ptr $2[rax]\0A\09add dword ptr $0[rax], eax\0A\09add ebx, dword ptr $3[rbx + $$270]\0A\09add dword ptr $1[rbx + $$828], ebx", "=*m,=*m,*m,*m,~{eax},~{ebx},~{flags},~{dirflag},~{fpsr},~{flags}"(ptr elementtype(i32) @gVar, ptr elementtype(i32) @gVar, ptr elementtype(i32) @gVar, ptr elementtype(i32) @gVar) #1
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store i32 3, ptr @gVar, align 4
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ret void
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}
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; Function Attrs: noinline nounwind optnone uwtable
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define void @t2() #0 {
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; CHECK-LABEL: t2:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: pushq %rbp
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; CHECK-NEXT: .cfi_def_cfa_offset 16
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; CHECK-NEXT: .cfi_offset %rbp, -16
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; CHECK-NEXT: movq %rsp, %rbp
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; CHECK-NEXT: .cfi_def_cfa_register %rbp
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; CHECK-NEXT: pushq %rbx
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; CHECK-NEXT: .cfi_offset %rbx, -24
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; CHECK-NEXT: #APP
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; CHECK-EMPTY:
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; CHECK-NEXT: movl -12(%rbp,%rax), %eax
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; CHECK-NEXT: movl %eax, -12(%rbp,%rax)
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; CHECK-NEXT: movl 258(%rbp,%rbx), %ebx
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; CHECK-NEXT: movl %ebx, 816(%rbp,%rbx)
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; CHECK-NEXT: movl %eax, 35(%rbp,%rbx)
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; CHECK-EMPTY:
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: movl $2, -12(%rbp)
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; CHECK-NEXT: popq %rbx
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; CHECK-NEXT: popq %rbp
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; CHECK-NEXT: .cfi_def_cfa %rsp, 8
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; CHECK-NEXT: retq
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entry:
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%lVar = alloca i32, align 4
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call void asm sideeffect inteldialect "mov eax, dword ptr $3[rax]\0A\09mov dword ptr $0[rax], eax\0A\09mov ebx, dword ptr $4[rbx + $$270]\0A\09mov dword ptr $1[rbx + $$828], ebx\0A\09mov $2[rbx + $$47], eax", "=*m,=*m,=*m,*m,*m,~{eax},~{ebx},~{dirflag},~{fpsr},~{flags}"(ptr elementtype(i32) %lVar, ptr elementtype(i32) %lVar, ptr elementtype(i32) %lVar, ptr elementtype(i32) %lVar, ptr elementtype(i32) %lVar) #1
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store i32 2, ptr %lVar, align 4
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ret void
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}
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attributes #0 = { noinline nounwind optnone uwtable "frame-pointer"="all" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
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attributes #1 = { nounwind }
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!llvm.module.flags = !{!0}
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!0 = !{i32 1, !"wchar_size", i32 4}
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