424 lines
11 KiB
LLVM
424 lines
11 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -debugify-and-strip-all-safe -O3 < %s | FileCheck %s
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-n32:64"
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target triple = "arm64-unknown-unknown"
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define i32 @foo1(i32 %b, i32 %c) nounwind readnone ssp {
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; CHECK-LABEL: foo1:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: cmp w1, #0
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; CHECK-NEXT: add w8, w1, w0
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; CHECK-NEXT: cinc w0, w8, ne
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; CHECK-NEXT: ret
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entry:
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%not.tobool = icmp ne i32 %c, 0
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%add = zext i1 %not.tobool to i32
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%b.add = add i32 %c, %b
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%add1 = add i32 %b.add, %add
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ret i32 %add1
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}
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define i32 @foo2(i32 %b, i32 %c) nounwind readnone ssp {
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; CHECK-LABEL: foo2:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: cmp w1, #0
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; CHECK-NEXT: cneg w8, w0, ne
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; CHECK-NEXT: add w0, w8, w1
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; CHECK-NEXT: ret
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entry:
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%mul = sub i32 0, %b
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%tobool = icmp eq i32 %c, 0
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%b.mul = select i1 %tobool, i32 %b, i32 %mul
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%add = add nsw i32 %b.mul, %c
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ret i32 %add
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}
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define i32 @foo3(i32 %b, i32 %c) nounwind readnone ssp {
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; CHECK-LABEL: foo3:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: cmp w1, #0
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; CHECK-NEXT: cinv w8, w0, ne
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; CHECK-NEXT: add w0, w8, w1
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; CHECK-NEXT: ret
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entry:
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%not.tobool = icmp ne i32 %c, 0
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%xor = sext i1 %not.tobool to i32
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%b.xor = xor i32 %xor, %b
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%add = add nsw i32 %b.xor, %c
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ret i32 %add
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}
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; rdar://11632325
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define i32@foo4(i32 %a) nounwind ssp {
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; CHECK-LABEL: foo4:
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; CHECK: // %bb.0:
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; CHECK-NEXT: cmp w0, #0
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; CHECK-NEXT: cneg w0, w0, mi
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; CHECK-NEXT: ret
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%cmp = icmp sgt i32 %a, -1
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%neg = sub nsw i32 0, %a
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%cond = select i1 %cmp, i32 %a, i32 %neg
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ret i32 %cond
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}
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define i32@foo5(i32 %a, i32 %b) nounwind ssp {
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; CHECK-LABEL: foo5:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: subs w8, w0, w1
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; CHECK-NEXT: cneg w0, w8, mi
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; CHECK-NEXT: ret
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entry:
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%sub = sub nsw i32 %a, %b
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%cmp = icmp sgt i32 %sub, -1
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%sub3 = sub nsw i32 0, %sub
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%cond = select i1 %cmp, i32 %sub, i32 %sub3
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ret i32 %cond
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}
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; make sure we can handle branch instruction in optimizeCompare.
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define i32@foo6(i32 %a, i32 %b) nounwind ssp {
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; CHECK-LABEL: foo6:
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; CHECK: // %bb.0: // %common.ret
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; CHECK-NEXT: sub w8, w0, w1
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; CHECK-NEXT: cmp w8, #0
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; CHECK-NEXT: csinc w0, w8, wzr, le
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; CHECK-NEXT: ret
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%sub = sub nsw i32 %a, %b
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%cmp = icmp sgt i32 %sub, 0
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br i1 %cmp, label %l.if, label %l.else
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l.if:
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ret i32 1
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l.else:
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ret i32 %sub
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}
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; If CPSR is used multiple times and V flag is used, we don't remove cmp.
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define i32 @foo7(i32 %a, i32 %b) nounwind {
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; CHECK-LABEL: foo7:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: subs w8, w0, w1
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; CHECK-NEXT: cneg w9, w8, mi
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; CHECK-NEXT: cmn w8, #1
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; CHECK-NEXT: csel w10, w9, w0, lt
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; CHECK-NEXT: cmp w8, #0
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; CHECK-NEXT: csel w0, w10, w9, ge
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; CHECK-NEXT: ret
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entry:
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%sub = sub nsw i32 %a, %b
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%cmp = icmp sgt i32 %sub, -1
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%sub3 = sub nsw i32 0, %sub
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%cond = select i1 %cmp, i32 %sub, i32 %sub3
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br i1 %cmp, label %if.then, label %if.else
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if.then:
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%cmp2 = icmp slt i32 %sub, -1
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%sel = select i1 %cmp2, i32 %cond, i32 %a
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ret i32 %sel
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if.else:
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ret i32 %cond
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}
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define i32 @foo8(i32 %v, i32 %a, i32 %b) nounwind readnone ssp {
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; CHECK-LABEL: foo8:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: cmp w0, #0
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; CHECK-NEXT: csinv w0, w1, w2, ne
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; CHECK-NEXT: ret
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entry:
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%tobool = icmp eq i32 %v, 0
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%neg = xor i32 -1, %b
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%cond = select i1 %tobool, i32 %neg, i32 %a
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ret i32 %cond
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}
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define i32 @foo9(i32 %v) nounwind readnone optsize ssp {
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; CHECK-LABEL: foo9:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: mov w8, #4
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; CHECK-NEXT: cmp w0, #0
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; CHECK-NEXT: cinv w0, w8, eq
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; CHECK-NEXT: ret
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entry:
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%tobool = icmp ne i32 %v, 0
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%cond = select i1 %tobool, i32 4, i32 -5
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ret i32 %cond
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}
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define i64 @foo10(i64 %v) nounwind readnone optsize ssp {
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; CHECK-LABEL: foo10:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: mov w8, #4
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; CHECK-NEXT: cmp x0, #0
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; CHECK-NEXT: cinv x0, x8, eq
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; CHECK-NEXT: ret
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entry:
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%tobool = icmp ne i64 %v, 0
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%cond = select i1 %tobool, i64 4, i64 -5
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ret i64 %cond
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}
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define i32 @foo11(i32 %v) nounwind readnone optsize ssp {
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; CHECK-LABEL: foo11:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: mov w8, #4
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; CHECK-NEXT: cmp w0, #0
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; CHECK-NEXT: cneg w0, w8, eq
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; CHECK-NEXT: ret
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entry:
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%tobool = icmp ne i32 %v, 0
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%cond = select i1 %tobool, i32 4, i32 -4
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ret i32 %cond
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}
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define i64 @foo12(i64 %v) nounwind readnone optsize ssp {
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; CHECK-LABEL: foo12:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: mov w8, #4
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; CHECK-NEXT: cmp x0, #0
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; CHECK-NEXT: cneg x0, x8, eq
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; CHECK-NEXT: ret
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entry:
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%tobool = icmp ne i64 %v, 0
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%cond = select i1 %tobool, i64 4, i64 -4
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ret i64 %cond
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}
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define i32 @foo13(i32 %v, i32 %a, i32 %b) nounwind readnone optsize ssp {
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; CHECK-LABEL: foo13:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: cmp w0, #0
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; CHECK-NEXT: csneg w0, w1, w2, ne
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; CHECK-NEXT: ret
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entry:
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%tobool = icmp eq i32 %v, 0
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%sub = sub i32 0, %b
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%cond = select i1 %tobool, i32 %sub, i32 %a
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ret i32 %cond
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}
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define i64 @foo14(i64 %v, i64 %a, i64 %b) nounwind readnone optsize ssp {
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; CHECK-LABEL: foo14:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: cmp x0, #0
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; CHECK-NEXT: csneg x0, x1, x2, ne
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; CHECK-NEXT: ret
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entry:
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%tobool = icmp eq i64 %v, 0
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%sub = sub i64 0, %b
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%cond = select i1 %tobool, i64 %sub, i64 %a
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ret i64 %cond
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}
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define i32 @foo15(i32 %a, i32 %b) nounwind readnone optsize ssp {
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; CHECK-LABEL: foo15:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: cmp w0, w1
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; CHECK-NEXT: mov w8, #1
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; CHECK-NEXT: cinc w0, w8, gt
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; CHECK-NEXT: ret
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entry:
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%cmp = icmp sgt i32 %a, %b
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%. = select i1 %cmp, i32 2, i32 1
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ret i32 %.
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}
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define i32 @foo16(i32 %a, i32 %b) nounwind readnone optsize ssp {
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; CHECK-LABEL: foo16:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: cmp w0, w1
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; CHECK-NEXT: mov w8, #1
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; CHECK-NEXT: cinc w0, w8, le
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; CHECK-NEXT: ret
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entry:
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%cmp = icmp sgt i32 %a, %b
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%. = select i1 %cmp, i32 1, i32 2
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ret i32 %.
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}
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define i64 @foo17(i64 %a, i64 %b) nounwind readnone optsize ssp {
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; CHECK-LABEL: foo17:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: cmp x0, x1
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; CHECK-NEXT: mov w8, #1
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; CHECK-NEXT: cinc x0, x8, gt
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; CHECK-NEXT: ret
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entry:
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%cmp = icmp sgt i64 %a, %b
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%. = select i1 %cmp, i64 2, i64 1
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ret i64 %.
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}
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define i64 @foo18(i64 %a, i64 %b) nounwind readnone optsize ssp {
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; CHECK-LABEL: foo18:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: cmp x0, x1
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; CHECK-NEXT: mov w8, #1
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; CHECK-NEXT: cinc x0, x8, le
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; CHECK-NEXT: ret
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entry:
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%cmp = icmp sgt i64 %a, %b
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%. = select i1 %cmp, i64 1, i64 2
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ret i64 %.
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}
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; Regression test for TrueVal + 1 overflow
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define i64 @foo18_overflow1(i64 %a, i64 %b) nounwind readnone optsize ssp {
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; CHECK-LABEL: foo18_overflow1:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: cmp x0, x1
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; CHECK-NEXT: mov x8, #9223372036854775807
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; CHECK-NEXT: csel x0, x8, xzr, gt
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; CHECK-NEXT: ret
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entry:
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%cmp = icmp sgt i64 %a, %b
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%. = select i1 %cmp, i64 9223372036854775807, i64 0
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ret i64 %.
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}
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; Regression test for FalseVal + 1 overflow
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define i64 @foo18_overflow2(i64 %a, i64 %b) nounwind readnone optsize ssp {
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; CHECK-LABEL: foo18_overflow2:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: cmp x0, x1
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; CHECK-NEXT: mov x8, #9223372036854775807
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; CHECK-NEXT: csel x0, xzr, x8, gt
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; CHECK-NEXT: ret
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entry:
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%cmp = icmp sgt i64 %a, %b
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%. = select i1 %cmp, i64 0, i64 9223372036854775807
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ret i64 %.
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}
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; Regression test for FalseVal - TrueVal overflow
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define i64 @foo18_overflow3(i1 %cmp) nounwind readnone optsize ssp {
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; CHECK-LABEL: foo18_overflow3:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: mov x8, #-9223372036854775808
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; CHECK-NEXT: tst w0, #0x1
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; CHECK-NEXT: csel x0, x8, xzr, ne
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; CHECK-NEXT: ret
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entry:
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%. = select i1 %cmp, i64 -9223372036854775808, i64 0
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ret i64 %.
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}
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; Regression test for TrueVal - FalseVal overflow
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define i64 @foo18_overflow4(i1 %cmp) nounwind readnone optsize ssp {
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; CHECK-LABEL: foo18_overflow4:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: mov x8, #-9223372036854775808
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; CHECK-NEXT: tst w0, #0x1
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; CHECK-NEXT: csel x0, xzr, x8, ne
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; CHECK-NEXT: ret
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entry:
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%. = select i1 %cmp, i64 0, i64 -9223372036854775808
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ret i64 %.
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}
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define i64 @foo19(i64 %a, i64 %b, i64 %c) {
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; CHECK-LABEL: foo19:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: cmp x0, x1
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; CHECK-NEXT: cinc x0, x2, lo
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; CHECK-NEXT: ret
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entry:
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%cmp = icmp ult i64 %a, %b
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%inc = zext i1 %cmp to i64
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%inc.c = add i64 %inc, %c
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ret i64 %inc.c
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}
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define i32 @foo20(i32 %x) {
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; CHECK-LABEL: foo20:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #6
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; CHECK-NEXT: cmp w0, #5
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; CHECK-NEXT: csinc w0, w8, wzr, eq
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; CHECK-NEXT: ret
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%cmp = icmp eq i32 %x, 5
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%res = select i1 %cmp, i32 6, i32 1
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ret i32 %res
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}
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define i64 @foo21(i64 %x) {
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; CHECK-LABEL: foo21:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #6
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; CHECK-NEXT: cmp x0, #5
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; CHECK-NEXT: csinc x0, x8, xzr, eq
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; CHECK-NEXT: ret
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%cmp = icmp eq i64 %x, 5
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%res = select i1 %cmp, i64 6, i64 1
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ret i64 %res
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}
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define i32 @foo22(i32 %x) {
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; CHECK-LABEL: foo22:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #6
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; CHECK-NEXT: cmp w0, #5
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; CHECK-NEXT: csinc w0, w8, wzr, ne
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; CHECK-NEXT: ret
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%cmp = icmp eq i32 %x, 5
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%res = select i1 %cmp, i32 1, i32 6
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ret i32 %res
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}
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define i64 @foo23(i64 %x) {
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; CHECK-LABEL: foo23:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #6
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; CHECK-NEXT: cmp x0, #5
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; CHECK-NEXT: csinc x0, x8, xzr, ne
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; CHECK-NEXT: ret
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%cmp = icmp eq i64 %x, 5
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%res = select i1 %cmp, i64 1, i64 6
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ret i64 %res
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}
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define i16 @foo24(i8* nocapture readonly %A, i8* nocapture readonly %B) {
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; CHECK-LABEL: foo24:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: ldrb w8, [x0]
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; CHECK-NEXT: ldrb w9, [x1]
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; CHECK-NEXT: cmp w8, #3
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; CHECK-NEXT: cset w8, hi
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; CHECK-NEXT: cmp w9, #33
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; CHECK-NEXT: cinc w0, w8, hi
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; CHECK-NEXT: ret
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entry:
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%0 = load i8, i8* %A, align 1
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%cmp = icmp ugt i8 %0, 3
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%conv1 = zext i1 %cmp to i16
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%1 = load i8, i8* %B, align 1
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%cmp4 = icmp ugt i8 %1, 33
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%conv5 = zext i1 %cmp4 to i16
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%add = add nuw nsw i16 %conv5, %conv1
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ret i16 %add
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}
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define i64 @foo25(i64* nocapture readonly %A, i64* nocapture readonly %B) {
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; CHECK-LABEL: foo25:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: ldr x8, [x1]
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; CHECK-NEXT: ldr x9, [x0]
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; CHECK-NEXT: cmp x8, #33
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; CHECK-NEXT: cset w8, hi
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; CHECK-NEXT: cmp x9, #3
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; CHECK-NEXT: cinc x0, x8, hi
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; CHECK-NEXT: ret
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entry:
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%0 = load i64, i64* %A, align 1
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%cmp = icmp ugt i64 %0, 3
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%conv1 = zext i1 %cmp to i64
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%1 = load i64, i64* %B, align 1
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%cmp4 = icmp ugt i64 %1, 33
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%conv5 = zext i1 %cmp4 to i64
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%add = add nuw nsw i64 %conv5, %conv1
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ret i64 %add
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}
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