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[BOLT][NFC] Move isADD64rr and isADDri out of MCPlusBuilder class 

Reviewed By: rafauler

Differential Revision: https://reviews.llvm.org/D123077
This commit is contained in:
Amir Ayupov 2022-04-05 14:30:44 -07:00
parent 6302a91468
commit f99398fe0e
3 changed files with 7 additions and 16 deletions
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5
bolt/include/bolt/Core/MCPlusBuilder.h
View File

@ -511,11 +511,6 @@ public:
return 0;
}
virtual bool isADD64rr(const MCInst &Inst) const {
llvm_unreachable("not implemented");
return false;
}
virtual bool isSUB(const MCInst &Inst) const {
llvm_unreachable("not implemented");
return false;

2
bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
View File

@ -1103,8 +1103,6 @@ public:
bool isMoveMem2Reg(const MCInst &Inst) const override { return false; }
bool isADD64rr(const MCInst &Inst) const override { return false; }
bool isLeave(const MCInst &Inst) const override { return false; }
bool isPop(const MCInst &Inst) const override { return false; }

16
bolt/lib/Target/X86/X86MCPlusBuilder.cpp
View File

@ -68,6 +68,13 @@ bool isMOVSX64rm32(const MCInst &Inst) {
return Inst.getOpcode() == X86::MOVSX64rm32;
}
bool isADD64rr(const MCInst &Inst) { return Inst.getOpcode() == X86::ADD64rr; }
bool isADDri(const MCInst &Inst) {
return Inst.getOpcode() == X86::ADD64ri32 ||
Inst.getOpcode() == X86::ADD64ri8;
}
class X86MCPlusBuilder : public MCPlusBuilder {
public:
X86MCPlusBuilder(const MCInstrAnalysis *Analysis, const MCInstrInfo *Info,
@ -292,19 +299,10 @@ public:
return 0;
}
bool isADD64rr(const MCInst &Inst) const override {
return Inst.getOpcode() == X86::ADD64rr;
}
bool isSUB(const MCInst &Inst) const override {
return X86::isSUB(Inst.getOpcode());
}
bool isADDri(const MCInst &Inst) const {
return Inst.getOpcode() == X86::ADD64ri32 ||
Inst.getOpcode() == X86::ADD64ri8;
}
bool isLEA64r(const MCInst &Inst) const override {
return Inst.getOpcode() == X86::LEA64r;
}