[ARM][AArch64] Move common code into ARMTargetParserCommon
Differential Revision: https://reviews.llvm.org/D138017
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@ -16,6 +16,7 @@
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#include "llvm/ADT/StringRef.h"
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#include "llvm/Support/ARMBuildAttributes.h"
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#include "llvm/Support/ARMTargetParserCommon.h"
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#include <vector>
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namespace llvm {
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@ -158,13 +159,6 @@ enum class NeonSupportLevel {
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Crypto ///< Neon with Crypto
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};
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// ISA kinds.
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enum class ISAKind { INVALID = 0, ARM, THUMB, AARCH64 };
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// Endianness
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// FIXME: BE8 vs. BE32?
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enum class EndianKind { INVALID = 0, LITTLE, BIG };
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// v6/v7/v8 Profile
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enum class ProfileKind { INVALID = 0, A, R, M };
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@ -226,7 +220,7 @@ template <typename T> struct ArchNames {
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}
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};
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static const ArchNames<ArchKind> ARCHNames[] = {
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static const ArchNames<ArchKind> ARMArchNames[] = {
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#define ARM_ARCH(NAME, ID, CPU_ATTR, SUB_ARCH, ARCH_ATTR, ARCH_FPU, \
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ARCH_BASE_EXT) \
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{NAME, sizeof(NAME) - 1, \
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@ -287,8 +281,6 @@ unsigned parseFPU(StringRef FPU);
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ArchKind parseArch(StringRef Arch);
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uint64_t parseArchExt(StringRef ArchExt);
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ArchKind parseCPUArch(StringRef CPU);
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ISAKind parseArchISA(StringRef Arch);
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EndianKind parseArchEndian(StringRef Arch);
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ProfileKind parseArchProfile(StringRef Arch);
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unsigned parseArchVersion(StringRef Arch);
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@ -18,6 +18,10 @@
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namespace llvm {
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namespace ARM {
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enum class ISAKind { INVALID = 0, ARM, THUMB, AARCH64 };
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enum class EndianKind { INVALID = 0, LITTLE, BIG };
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/// Converts e.g. "armv8" -> "armv8-a"
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StringRef getArchSynonym(StringRef Arch);
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@ -27,6 +31,12 @@ StringRef getArchSynonym(StringRef Arch);
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/// If invalid, return empty string.
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StringRef getCanonicalArchName(StringRef Arch);
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// ARM, Thumb, AArch64
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ISAKind parseArchISA(StringRef Arch);
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// Little/Big endian
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EndianKind parseArchEndian(StringRef Arch);
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} // namespace ARM
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} // namespace llvm
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#endif
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@ -29,7 +29,7 @@ static StringRef getHWDivSynonym(StringRef HWDiv) {
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ARM::ArchKind ARM::parseArch(StringRef Arch) {
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Arch = getCanonicalArchName(Arch);
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StringRef Syn = getArchSynonym(Arch);
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for (const auto &A : ARCHNames) {
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for (const auto &A : ARMArchNames) {
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if (A.getName().endswith(Syn))
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return A.ID;
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}
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@ -211,35 +211,6 @@ bool ARM::getFPUFeatures(unsigned FPUKind, std::vector<StringRef> &Features) {
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return true;
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}
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// Little/Big endian
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ARM::EndianKind ARM::parseArchEndian(StringRef Arch) {
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if (Arch.startswith("armeb") || Arch.startswith("thumbeb") ||
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Arch.startswith("aarch64_be"))
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return EndianKind::BIG;
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if (Arch.startswith("arm") || Arch.startswith("thumb")) {
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if (Arch.endswith("eb"))
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return EndianKind::BIG;
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else
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return EndianKind::LITTLE;
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}
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if (Arch.startswith("aarch64") || Arch.startswith("aarch64_32"))
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return EndianKind::LITTLE;
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return EndianKind::INVALID;
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}
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// ARM, Thumb, AArch64
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ARM::ISAKind ARM::parseArchISA(StringRef Arch) {
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return StringSwitch<ISAKind>(Arch)
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.StartsWith("aarch64", ISAKind::AARCH64)
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.StartsWith("arm64", ISAKind::AARCH64)
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.StartsWith("thumb", ISAKind::THUMB)
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.StartsWith("arm", ISAKind::ARM)
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.Default(ISAKind::INVALID);
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}
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unsigned ARM::parseFPU(StringRef FPU) {
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StringRef Syn = getFPUSynonym(FPU);
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for (const auto &F : FPUNames) {
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@ -292,7 +263,7 @@ ARM::FPURestriction ARM::getFPURestriction(unsigned FPUKind) {
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unsigned ARM::getDefaultFPU(StringRef CPU, ARM::ArchKind AK) {
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if (CPU == "generic")
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return ARM::ARCHNames[static_cast<unsigned>(AK)].DefaultFPU;
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return ARM::ARMArchNames[static_cast<unsigned>(AK)].DefaultFPU;
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return StringSwitch<unsigned>(CPU)
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#define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) \
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@ -303,12 +274,12 @@ unsigned ARM::getDefaultFPU(StringRef CPU, ARM::ArchKind AK) {
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uint64_t ARM::getDefaultExtensions(StringRef CPU, ARM::ArchKind AK) {
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if (CPU == "generic")
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return ARM::ARCHNames[static_cast<unsigned>(AK)].ArchBaseExtensions;
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return ARM::ARMArchNames[static_cast<unsigned>(AK)].ArchBaseExtensions;
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return StringSwitch<uint64_t>(CPU)
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#define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) \
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.Case(NAME, \
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ARCHNames[static_cast<unsigned>(ArchKind::ID)].ArchBaseExtensions | \
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ARMArchNames[static_cast<unsigned>(ArchKind::ID)].ArchBaseExtensions | \
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DEFAULT_EXT)
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#include "llvm/Support/ARMTargetParser.def"
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.Default(ARM::AEK_INVALID);
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@ -350,19 +321,19 @@ bool ARM::getExtensionFeatures(uint64_t Extensions,
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}
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StringRef ARM::getArchName(ARM::ArchKind AK) {
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return ARCHNames[static_cast<unsigned>(AK)].getName();
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return ARMArchNames[static_cast<unsigned>(AK)].getName();
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}
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StringRef ARM::getCPUAttr(ARM::ArchKind AK) {
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return ARCHNames[static_cast<unsigned>(AK)].getCPUAttr();
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return ARMArchNames[static_cast<unsigned>(AK)].getCPUAttr();
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}
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StringRef ARM::getSubArch(ARM::ArchKind AK) {
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return ARCHNames[static_cast<unsigned>(AK)].getSubArch();
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return ARMArchNames[static_cast<unsigned>(AK)].getSubArch();
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}
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unsigned ARM::getArchAttr(ARM::ArchKind AK) {
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return ARCHNames[static_cast<unsigned>(AK)].ArchAttr;
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return ARMArchNames[static_cast<unsigned>(AK)].ArchAttr;
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}
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StringRef ARM::getArchExtName(uint64_t ArchExtKind) {
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@ -103,3 +103,30 @@ StringRef ARM::getCanonicalArchName(StringRef Arch) {
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// Arch will either be a 'v' name (v7a) or a marketing name (xscale).
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return A;
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}
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ARM::ISAKind ARM::parseArchISA(StringRef Arch) {
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return StringSwitch<ISAKind>(Arch)
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.StartsWith("aarch64", ISAKind::AARCH64)
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.StartsWith("arm64", ISAKind::AARCH64)
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.StartsWith("thumb", ISAKind::THUMB)
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.StartsWith("arm", ISAKind::ARM)
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.Default(ISAKind::INVALID);
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}
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ARM::EndianKind ARM::parseArchEndian(StringRef Arch) {
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if (Arch.startswith("armeb") || Arch.startswith("thumbeb") ||
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Arch.startswith("aarch64_be"))
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return EndianKind::BIG;
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if (Arch.startswith("arm") || Arch.startswith("thumb")) {
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if (Arch.endswith("eb"))
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return EndianKind::BIG;
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else
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return EndianKind::LITTLE;
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}
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if (Arch.startswith("aarch64") || Arch.startswith("aarch64_32"))
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return EndianKind::LITTLE;
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return EndianKind::INVALID;
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}
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@ -11,6 +11,7 @@
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#include "llvm/ADT/StringExtras.h"
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#include "llvm/ADT/StringSwitch.h"
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#include "llvm/Support/ARMTargetParser.h"
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#include "llvm/Support/ARMTargetParserCommon.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/Host.h"
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#include "llvm/Support/SwapByteOrder.h"
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