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Change vftta&vfexp instructions' encoding formats

This commit is contained in:
zhoujing 2023-01-28 10:46:31 +08:00
parent 9318d5354f
commit e74aafb0d6
2 changed files with 23 additions and 17 deletions
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17
llvm/lib/Target/RISCV/VentusInstrInfo.td
View File

@ -932,23 +932,6 @@ let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in {
def REGEXT : RVInstI<0b010, OPC_CUSTOM_0, (outs GPR:$rd),
(ins GPR:$rs1, simm12:$imm12),
"regext", "$rd, $rs1, $imm12">;
def VFEXP : RVInstI<0b010, OPC_CUSTOM_0, (outs VGPR:$vd),
(ins VGPR:$vs2),"vfexp", "$vd, $vs2"> {
bits<5> vs2;
let rs1 = 0;
let Inst{31-25} = 0b0000101;
let Inst{24-20} = vs2;
}
let Constraints = "$vd_wb = $vd" in
def VFTTA : RVInstI<0b000, OPC_CUSTOM_0, (outs VGPR:$vd_wb),
(ins VGPR:$vd, VGPR:$vs2, VGPR:$vs1),
"vftta.vv", "$vd, $vs2, $vs1"> {
bits<5> vs2;
let Inst{31-25} = 0b0000011;
let Inst{24-20} = vs2;
}
} // hasSideEffects = 0, mayLoad = 0, mayStore = 0
//===----------------------------------------------------------------------===//

23
llvm/lib/Target/RISCV/VentusInstrInfoV.td
View File

@ -1163,6 +1163,29 @@ def VFMV_S_F : RVInstV2<0b010000, 0b00000, OPFVF, (outs VGPR:$vd_wb),
} // Predicates = [HasVInstructionsAnyF]
//===----------------------------------------------------------------------===//
// Ventus GPGPU extended instructions for V formats
//===----------------------------------------------------------------------===//
let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in {
def VFEXP : RVInstIVI<0b000010, (outs VGPR:$vd),
(ins VGPR:$vs2),"vfexp", "$vd, $vs2"> {
let Inst{25} = 0b1;
let Inst{19-15} = 0;
let Opcode = OPC_CUSTOM_0.Value;
}
let Constraints = "$vd_wb = $vd" in
def VFTTA : RVInstIVI<0b000001, (outs VGPR:$vd_wb),
(ins VGPR:$vd, VGPR:$vs2, VGPR:$vs1),
"vftta.vv", "$vd, $vs2, $vs1"> {
bits<5> vs1;
let Inst{25} = 0b1;
let Inst{19-15} = vs1;
let Opcode = OPC_CUSTOM_0.Value;
}
} // hasSideEffects = 0, mayLoad = 0, mayStore = 0
//===----------------------------------------------------------------------===//
// Ventus vALU divergent execution patterns
//===----------------------------------------------------------------------===//