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[#60][feat] Support barrier with memory scope parameter (#63) 

Co-authored-by: qinfan <qinfan.wang@terapines.com>
This commit is contained in:
Mifuns 2023-11-22 16:02:16 +08:00 committed by GitHub
parent 2ae501e91b
commit e4c88939fe
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4 changed files with 14 additions and 3 deletions
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2
clang/include/clang/Basic/BuiltinsRISCV.def
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@ -20,7 +20,7 @@
//===----------------------------------------------------------------------===//
// Barrier function builtins
TARGET_BUILTIN(barrier, "vi", "n", "32bit")
TARGET_BUILTIN(barrier, "vi.", "n", "32bit")
TARGET_BUILTIN(work_group_barrier, "vi.", "n", "32bit")
// WORKAROUND: Disabled for now.
/*

2
clang/lib/CodeGen/CGBuiltin.cpp
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@ -19491,8 +19491,6 @@ Value *CodeGenFunction::EmitRISCVBuiltinExpr(unsigned BuiltinID,
// Ventus GPGPU workitem
case RISCV::BIbarrier:
ID = Intrinsic::riscv_ventus_barrier;
break;
case RISCV::BIwork_group_barrier: {
unsigned NumArgs = E->getNumArgs();
switch (NumArgs) {

1
clang/lib/Headers/opencl-c.h
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@ -12397,6 +12397,7 @@ void __ovld vstorea_half16_rtn(double16, size_t, __private half *);
*/
void __ovld __conv barrier(cl_mem_fence_flags);
void __ovld __conv barrier(cl_mem_fence_flags, memory_scope);
#if defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0)
void __ovld __conv work_group_barrier(cl_mem_fence_flags, memory_scope);

12
clang/test/CodeGenOpenCL/barrier.cl Normal file
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@ -0,0 +1,12 @@
// RUN: clang -no-opaque-pointers -triple riscv32-unknown-unknown -S -emit-llvm -o - %s | FileCheck %s
void test() {
// CHECK: call void @llvm.riscv.ventus.barrier(i32 1)
// CHECK-NEXT: call void @llvm.riscv.ventus.barrier.with.scope(i32 1, i32 2)
// CHECK-NEXT: call void @llvm.riscv.ventus.barrier(i32 1)
// CHECK-NEXT: call void @llvm.riscv.ventus.barrier.with.scope(i32 1, i32 2)
barrier(1);
barrier(1, 2);
work_group_barrier(1);
work_group_barrier(1, 2);
}