[AArch64] add tests for fadd -> fma combines; NFC
The transform to create a final fma was added with:
D132837 / c98a46fee6
These tests are intended to show the minimal fast-math-flags
necessary to enable the fold: currently only the final fadd
needs to have "reassoc".
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@ -315,5 +315,37 @@ define float @fadd_fma_fmul_extra_use_3(float %a, float %b, float %c, float %d,
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ret float %a2
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}
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define float @fmac_sequence_innermost_fmul(float %a, float %b, float %c, float %d, float %e, float %f, float %g) {
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; CHECK-LABEL: fmac_sequence_innermost_fmul:
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; CHECK: // %bb.0:
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; CHECK-NEXT: fmadd s0, s0, s1, s6
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; CHECK-NEXT: fmadd s0, s2, s3, s0
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; CHECK-NEXT: fmadd s0, s4, s5, s0
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; CHECK-NEXT: ret
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%t0 = fmul float %a, %b
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%t1 = fmul contract float %c, %d
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%t2 = fadd contract float %t0, %t1
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%t3 = fmul contract float %e, %f
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%t4 = fadd contract float %t2, %t3
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%t5 = fadd contract reassoc float %t4, %g
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ret float %t5
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}
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define float @fmac_sequence_innermost_fmul_intrinsics(float %a, float %b, float %c, float %d, float %e, float %f, float %g) {
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; CHECK-LABEL: fmac_sequence_innermost_fmul_intrinsics:
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; CHECK: // %bb.0:
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; CHECK-NEXT: fmadd s0, s0, s1, s6
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; CHECK-NEXT: fmadd s0, s2, s3, s0
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; CHECK-NEXT: fmadd s0, s4, s5, s0
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; CHECK-NEXT: ret
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%t0 = fmul float %a, %b
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%t1 = call float @llvm.fma.f32(float %c, float %d, float %t0)
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%t2 = call float @llvm.fma.f32(float %e, float %f, float %t1)
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%t5 = fadd contract reassoc float %t2, %g
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ret float %t5
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}
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declare float @llvm.fma.f32(float, float, float)
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declare void @use(double)
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