OSchip
/
llvm-project
mirror of https://github.com/THU-DSP-LAB/llvm-project.git
13
0
Fork 2
Code Issues Packages Projects Releases Wiki Activity

[VENTUS][RISC][NFC] Use getAnalysis to get MachinePostDominatorTree.

This commit is contained in:
yanming 2023-07-03 10:31:35 +08:00
parent 9292350319
commit db2c4417fb
1 changed files with 11 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

16
llvm/lib/Target/RISCV/VentusInsertJoinToVBranch.cpp
View File

@ -57,16 +57,20 @@ class VentusInsertJoinToVBranch : public MachineFunctionPass {
public:
const RISCVInstrInfo *TII;
static char ID;
MachinePostDominatorTree *MPDT = new MachinePostDominatorTree();
MachinePostDominatorTree *MPDT;
VentusInsertJoinToVBranch() : MachineFunctionPass(ID) {
VentusInsertJoinToVBranch()
: MachineFunctionPass(ID), TII(nullptr), MPDT(nullptr) {
initializeVentusInsertJoinToVBranchPass(*PassRegistry::getPassRegistry());
}
~VentusInsertJoinToVBranch() { delete MPDT; }
bool runOnMachineFunction(MachineFunction &MF) override;
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.addRequired<MachinePostDominatorTree>();
MachineFunctionPass::getAnalysisUsage(AU);
}
MachineInstr *getDivergentBranchInstr(MachineBasicBlock &MBB);
bool convergeReturnBlock(MachineFunction &MF);
@ -80,10 +84,12 @@ char VentusInsertJoinToVBranch::ID = 0;
bool VentusInsertJoinToVBranch::runOnMachineFunction(MachineFunction &MF) {
TII = static_cast<const RISCVInstrInfo *>(MF.getSubtarget().getInstrInfo());
MPDT = &getAnalysis<MachinePostDominatorTree>();
// After this, all return blocks are expected to be legal
bool IsChanged = convergeReturnBlock(MF);
MPDT->getBase().recalculate(MF);
if (IsChanged)
MPDT->getBase().recalculate(MF);
#ifndef NDEBUG
unsigned NumberRetBB = 0;