[AMDGPU] Increate hazard for store dwordx3/4 to 2 waitstates on gfx940
Fixes: SWDEV-327053 Differential Revision: https://reviews.llvm.org/D123687
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@ -794,7 +794,7 @@ GCNHazardRecognizer::checkVALUHazardsHelper(const MachineOperand &Def,
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// 8 bytes can have there store data over written by the next instruction.
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const SIRegisterInfo *TRI = ST.getRegisterInfo();
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const int VALUWaitStates = 1;
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const int VALUWaitStates = ST.hasGFX940Insts() ? 2 : 1;
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int WaitStatesNeeded = 0;
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if (!TRI->isVectorRegister(MRI, Def.getReg()))
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@ -215,3 +215,29 @@ body: |
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$vgpr1 = V_ADD_CO_U32_e32 $vgpr0, $vgpr0, implicit-def $vcc, implicit $exec
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$sgpr1 = V_READFIRSTLANE_B32 $vgpr1, implicit $exec
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...
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# GCN-LABEL: name: global_store_dwordx4_data_hazard
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# GCN: GLOBAL_STORE_DWORDX4
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# GCN-NEXT: S_NOP 1
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# GCN-NEXT: V_MOV_B32_e32
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name: global_store_dwordx4_data_hazard
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1, $vgpr2_vgpr3_vgpr4_vgpr5
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GLOBAL_STORE_DWORDX4 $vgpr0_vgpr1, $vgpr2_vgpr3_vgpr4_vgpr5, 0, 0, implicit $exec
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$vgpr2 = V_MOV_B32_e32 0, implicit $exec
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...
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# GCN-LABEL: name: global_store_dwordx3_data_hazard
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# GCN: GLOBAL_STORE_DWORDX3
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# GCN-NEXT: S_NOP 1
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# GCN-NEXT: V_MOV_B32_e32
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name: global_store_dwordx3_data_hazard
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1, $vgpr2_vgpr3_vgpr4
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GLOBAL_STORE_DWORDX3 $vgpr0_vgpr1, $vgpr2_vgpr3_vgpr4, 0, 0, implicit $exec
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$vgpr2 = V_MOV_B32_e32 0, implicit $exec
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...
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@ -1155,7 +1155,7 @@ body: |
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...
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# GCN-LABEL: name: flat_store_data_agpr_overwritten
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# GCN: FLAT_STORE_DWORDX4
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# GCN-NEXT: S_NOP 0
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# GCN-NEXT: S_NOP 1
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# GCN-NEXT: V_ACCVGPR_WRITE_B32_e64
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name: flat_store_data_agpr_overwritten
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body: |
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