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[ARM] Introduce an empty "armv8.8-a" architecture. 

This is the first commit in a series that implements support for
"armv8.8-a" architecture. This should contain all the necessary
boilerplate to make the 8.8-A architecture exist from LLVM and Clang's
point of view: it adds the new arch as a subtarget feature, a definition
in TargetParser, a name on the command line, an appropriate set of
predefined macros, and adds appropriate tests. The new architecture name
is supported in both AArch32 and AArch64.

However, in this commit, no actual _functionality_ is added as part of
the new architecture. If you specify -march=armv8.8a, the compiler
will accept it and set the right predefines, but generate no code any
differently.

Differential Revision: https://reviews.llvm.org/D115694
This commit is contained in:
Simon Tatham 2021-02-11 11:11:55 +00:00 committed by Tomas Matheson
parent b8db442513
commit d50072f74e
19 changed files with 140 additions and 27 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

11
clang/lib/Basic/Targets/AArch64.cpp
View File

@ -223,6 +223,12 @@ void AArch64TargetInfo::getTargetDefinesARMV87A(const LangOptions &Opts,
getTargetDefinesARMV86A(Opts, Builder);
}
void AArch64TargetInfo::getTargetDefinesARMV88A(const LangOptions &Opts,
MacroBuilder &Builder) const {
// Also include the Armv8.7 defines
getTargetDefinesARMV87A(Opts, Builder);
}
void AArch64TargetInfo::getTargetDefinesARMV9A(const LangOptions &Opts,
MacroBuilder &Builder) const {
// Armv9-A maps to Armv8.5-A
@ -446,6 +452,9 @@ void AArch64TargetInfo::getTargetDefines(const LangOptions &Opts,
case llvm::AArch64::ArchKind::ARMV8_7A:
getTargetDefinesARMV87A(Opts, Builder);
break;
case llvm::AArch64::ArchKind::ARMV8_8A:
getTargetDefinesARMV88A(Opts, Builder);
break;
case llvm::AArch64::ArchKind::ARMV9A:
getTargetDefinesARMV9A(Opts, Builder);
break;
@ -603,6 +612,8 @@ bool AArch64TargetInfo::handleTargetFeatures(std::vector<std::string> &Features,
ArchKind = llvm::AArch64::ArchKind::ARMV8_6A;
if (Feature == "+v8.7a")
ArchKind = llvm::AArch64::ArchKind::ARMV8_7A;
if (Feature == "+v8.8a")
ArchKind = llvm::AArch64::ArchKind::ARMV8_8A;
if (Feature == "+v9a")
ArchKind = llvm::AArch64::ArchKind::ARMV9A;
if (Feature == "+v9.1a")

2
clang/lib/Basic/Targets/AArch64.h
View File

@ -92,6 +92,8 @@ public:
MacroBuilder &Builder) const;
void getTargetDefinesARMV87A(const LangOptions &Opts,
MacroBuilder &Builder) const;
void getTargetDefinesARMV88A(const LangOptions &Opts,
MacroBuilder &Builder) const;
void getTargetDefinesARMV9A(const LangOptions &Opts,
MacroBuilder &Builder) const;
void getTargetDefinesARMV91A(const LangOptions &Opts,

3
clang/lib/Basic/Targets/ARM.cpp
View File

@ -212,6 +212,8 @@ StringRef ARMTargetInfo::getCPUAttr() const {
return "8_6A";
case llvm::ARM::ArchKind::ARMV8_7A:
return "8_7A";
case llvm::ARM::ArchKind::ARMV8_8A:
return "8_8A";
case llvm::ARM::ArchKind::ARMV9A:
return "9A";
case llvm::ARM::ArchKind::ARMV9_1A:
@ -930,6 +932,7 @@ void ARMTargetInfo::getTargetDefines(const LangOptions &Opts,
case llvm::ARM::ArchKind::ARMV8_4A:
case llvm::ARM::ArchKind::ARMV8_5A:
case llvm::ARM::ArchKind::ARMV8_6A:
case llvm::ARM::ArchKind::ARMV8_8A:
case llvm::ARM::ArchKind::ARMV9A:
case llvm::ARM::ArchKind::ARMV9_1A:
case llvm::ARM::ArchKind::ARMV9_2A:

8
clang/lib/Driver/ToolChains/Arch/AArch64.cpp
View File

@ -98,10 +98,11 @@ static bool DecodeAArch64Features(const Driver &D, StringRef text,
Features.push_back("-sve2-sm4");
}
// +sve implies +f32mm if the base architecture is v8.6A, v8.7A, v9.1A or
// v9.2A. It isn't the case in general that sve implies both f64mm and f32mm
// +sve implies +f32mm if the base architecture is >= v8.6A (except v9A)
// It isn't the case in general that sve implies both f64mm and f32mm
if ((ArchKind == llvm::AArch64::ArchKind::ARMV8_6A ||
ArchKind == llvm::AArch64::ArchKind::ARMV8_7A ||
ArchKind == llvm::AArch64::ArchKind::ARMV8_8A ||
ArchKind == llvm::AArch64::ArchKind::ARMV9_1A ||
ArchKind == llvm::AArch64::ArchKind::ARMV9_2A) &&
Feature == "sve")
@ -390,6 +391,7 @@ fp16_fml_fallthrough:
}
if (std::find(ItBegin, ItEnd, "+v8.4a") != ItEnd ||
std::find(ItBegin, ItEnd, "+v8.8a") != ItEnd ||
std::find(ItBegin, ItEnd, "+v9a") != ItEnd ||
std::find(ItBegin, ItEnd, "+v9.1a") != ItEnd ||
std::find(ItBegin, ItEnd, "+v9.2a") != ItEnd) {
@ -451,7 +453,7 @@ fp16_fml_fallthrough:
}
}
const char *Archs[] = {"+v8.6a", "+v8.7a", "+v9.1a", "+v9.2a"};
const char *Archs[] = {"+v8.6a", "+v8.7a", "+v8.8a", "+v9.1a", "+v9.2a"};
auto Pos = std::find_first_of(Features.begin(), Features.end(),
std::begin(Archs), std::end(Archs));
if (Pos != std::end(Features))

16
clang/test/Driver/aarch64-cpus.c
View File

@ -803,6 +803,22 @@
// NO-LS64-NOT: "-target-feature" "+ls64"
// LS64: "-target-feature" "+ls64"
// RUN: %clang -target aarch64 -march=armv8.8a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV88A %s
// RUN: %clang -target aarch64 -march=armv8.8-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV88A %s
// RUN: %clang -target aarch64 -mlittle-endian -march=armv8.8a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV88A %s
// RUN: %clang -target aarch64 -mlittle-endian -march=armv8.8-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV88A %s
// RUN: %clang -target aarch64_be -mlittle-endian -march=armv8.8a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV88A %s
// RUN: %clang -target aarch64_be -mlittle-endian -march=armv8.8-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV88A %s
// GENERICV88A: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "generic" "-target-feature" "+neon" "-target-feature" "+v8.8a"
// RUN: %clang -target aarch64_be -march=armv8.8a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV88A-BE %s
// RUN: %clang -target aarch64_be -march=armv8.8-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV88A-BE %s
// RUN: %clang -target aarch64 -mbig-endian -march=armv8.8a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV88A-BE %s
// RUN: %clang -target aarch64 -mbig-endian -march=armv8.8-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV88A-BE %s
// RUN: %clang -target aarch64_be -mbig-endian -march=armv8.8a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV88A-BE %s
// RUN: %clang -target aarch64_be -mbig-endian -march=armv8.8-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV88A-BE %s
// GENERICV88A-BE: "-cc1"{{.*}} "-triple" "aarch64_be{{.*}}" "-target-cpu" "generic" "-target-feature" "+neon" "-target-feature" "+v8.8a"
//
// RUN: %clang -target aarch64 -march=armv9a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV9A %s
// RUN: %clang -target aarch64 -march=armv9-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV9A %s
// RUN: %clang -target aarch64 -mlittle-endian -march=armv9a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV9A %s

17
clang/test/Driver/arm-cortex-cpus.c
View File

@ -369,6 +369,23 @@
// RUN: %clang -target arm -march=armebv8.7-a -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V87A %s
// CHECK-BE-V87A: "-cc1"{{.*}} "-triple" "armebv8.7{{.*}}" "-target-cpu" "generic"
// RUN: %clang -target armv8.8a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V88A %s
// RUN: %clang -target arm -march=armv8.8a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V88A %s
// RUN: %clang -target arm -march=armv8.8-a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V88A %s
// RUN: %clang -target arm -march=armv8.8a -mlittle-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V88A %s
// RUN: %clang -target armv8.8a -mlittle-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V88A %s
// RUN: %clang -target arm -march=armv8.8a -mlittle-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V88A %s
// RUN: %clang -target arm -mlittle-endian -march=armv8.8-a -mlittle-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V88A %s
// CHECK-V88A: "-cc1"{{.*}} "-triple" "armv8.8{{.*}}" "-target-cpu" "generic"
// RUN: %clang -target armebv8.8a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V88A %s
// RUN: %clang -target armv8.8a -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V88A %s
// RUN: %clang -target armeb -march=armebv8.8a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V88A %s
// RUN: %clang -target armeb -march=armebv8.8-a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V88A %s
// RUN: %clang -target arm -march=armebv8.8a -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V88A %s
// RUN: %clang -target arm -march=armebv8.8-a -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V88A %s
// CHECK-BE-V88A: "-cc1"{{.*}} "-triple" "armebv8.8{{.*}}" "-target-cpu" "generic"
// RUN: %clang -target armv9a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V9A %s
// RUN: %clang -target arm -march=armv9a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V9A %s
// RUN: %clang -target arm -march=armv9-a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V9A %s

5
clang/test/Preprocessor/arm-target-features.c
View File

@ -859,6 +859,11 @@
// CHECK-V87A: #define __ARM_ARCH_8_7A__ 1
// CHECK-V87A: #define __ARM_ARCH_PROFILE 'A'
// RUN: %clang -target armv8.8a-none-none-eabi -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-V88A %s
// CHECK-V88A: #define __ARM_ARCH 8
// CHECK-V88A: #define __ARM_ARCH_8_8A__ 1
// CHECK-V88A: #define __ARM_ARCH_PROFILE 'A'
//
// RUN: %clang -target armv9a-none-none-eabi -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-V9A %s
// CHECK-V9A: #define __ARM_ARCH 9
// CHECK-V9A: #define __ARM_ARCH_9A__ 1

1
llvm/include/llvm/ADT/Triple.h
View File

@ -110,6 +110,7 @@ public:
ARMSubArch_v9_2a,
ARMSubArch_v9_1a,
ARMSubArch_v9,
ARMSubArch_v8_8a,
ARMSubArch_v8_7a,
ARMSubArch_v8_6a,
ARMSubArch_v8_5a,

7
llvm/include/llvm/Support/AArch64TargetParser.def
View File

@ -58,6 +58,13 @@ AARCH64_ARCH("armv8.7-a", ARMV8_7A, "8.7-A", "v8.7a",
AArch64::AEK_RDM | AArch64::AEK_RCPC | AArch64::AEK_DOTPROD |
AArch64::AEK_SM4 | AArch64::AEK_SHA3 | AArch64::AEK_BF16 |
AArch64::AEK_SHA2 | AArch64::AEK_AES | AArch64::AEK_I8MM))
AARCH64_ARCH("armv8.8-a", ARMV8_8A, "8.8-A", "v8.8a",
ARMBuildAttrs::CPUArch::v8_A, FK_CRYPTO_NEON_FP_ARMV8,
(AArch64::AEK_CRC | AArch64::AEK_FP |
AArch64::AEK_SIMD | AArch64::AEK_RAS | AArch64::AEK_LSE |
AArch64::AEK_RDM | AArch64::AEK_RCPC | AArch64::AEK_DOTPROD |
AArch64::AEK_SM4 | AArch64::AEK_SHA3 | AArch64::AEK_BF16 |
AArch64::AEK_SHA2 | AArch64::AEK_AES | AArch64::AEK_I8MM))
AARCH64_ARCH("armv9-a", ARMV9A, "9-A", "v9a",
ARMBuildAttrs::CPUArch::v8_A, FK_NEON_FP_ARMV8,
(AArch64::AEK_CRC | AArch64::AEK_FP |

6
llvm/include/llvm/Support/ARMTargetParser.def
View File

@ -122,6 +122,12 @@ ARM_ARCH("armv8.7-a", ARMV8_7A, "8.7-A", "v8.7a",
(ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM |
ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | ARM::AEK_CRC | ARM::AEK_RAS |
ARM::AEK_DOTPROD | ARM::AEK_BF16 | ARM::AEK_I8MM))
ARM_ARCH("armv8.8-a", ARMV8_8A, "8.8-A", "v8.8a",
ARMBuildAttrs::CPUArch::v8_A, FK_CRYPTO_NEON_FP_ARMV8,
(ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM |
ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | ARM::AEK_CRC | ARM::AEK_RAS |
ARM::AEK_DOTPROD | ARM::AEK_BF16 | ARM::AEK_SHA2 | ARM::AEK_AES |
ARM::AEK_I8MM))
ARM_ARCH("armv9-a", ARMV9A, "9-A", "v9a",
ARMBuildAttrs::CPUArch::v8_A, FK_NEON_FP_ARMV8,
(ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM |

2
llvm/lib/Support/AArch64TargetParser.cpp
View File

@ -136,6 +136,8 @@ bool AArch64::getArchFeatures(AArch64::ArchKind AK,
Features.push_back("+v8.6a");
if (AK == AArch64::ArchKind::ARMV8_7A)
Features.push_back("+v8.7a");
if (AK == AArch64::ArchKind::ARMV8_8A)
Features.push_back("+v8.8a");
if (AK == AArch64::ArchKind::ARMV9A)
Features.push_back("+v9a");
if (AK == AArch64::ArchKind::ARMV9_1A)

3
llvm/lib/Support/ARMTargetParser.cpp
View File

@ -77,6 +77,7 @@ unsigned ARM::parseArchVersion(StringRef Arch) {
case ArchKind::ARMV8_5A:
case ArchKind::ARMV8_6A:
case ArchKind::ARMV8_7A:
case ArchKind::ARMV8_8A:
case ArchKind::ARMV8R:
case ArchKind::ARMV8MBaseline:
case ArchKind::ARMV8MMainline:
@ -117,6 +118,7 @@ ARM::ProfileKind ARM::parseArchProfile(StringRef Arch) {
case ArchKind::ARMV8_5A:
case ArchKind::ARMV8_6A:
case ArchKind::ARMV8_7A:
case ArchKind::ARMV8_8A:
case ArchKind::ARMV9A:
case ArchKind::ARMV9_1A:
case ArchKind::ARMV9_2A:
@ -164,6 +166,7 @@ StringRef ARM::getArchSynonym(StringRef Arch) {
.Case("v8.5a", "v8.5-a")
.Case("v8.6a", "v8.6-a")
.Case("v8.7a", "v8.7-a")
.Case("v8.8a", "v8.8-a")
.Case("v8r", "v8-r")
.Cases("v9", "v9a", "v9-a")
.Case("v9.1a", "v9.1-a")

2
llvm/lib/Support/Triple.cpp
View File

@ -663,6 +663,8 @@ static Triple::SubArchType parseSubArch(StringRef SubArchName) {
return Triple::ARMSubArch_v8_6a;
case ARM::ArchKind::ARMV8_7A:
return Triple::ARMSubArch_v8_7a;
case ARM::ArchKind::ARMV8_8A:
return Triple::ARMSubArch_v8_8a;
case ARM::ArchKind::ARMV9A:
return Triple::ARMSubArch_v9;
case ARM::ArchKind::ARMV9_1A:

4
llvm/lib/Target/AArch64/AArch64.td
View File

@ -497,6 +497,10 @@ def HasV8_7aOps : SubtargetFeature<
"v8.7a", "HasV8_7aOps", "true", "Support ARM v8.7a instructions",
[HasV8_6aOps, FeatureXS, FeatureWFxT, FeatureHCX]>;
def HasV8_8aOps : SubtargetFeature<
"v8.8a", "HasV8_8aOps", "true", "Support ARM v8.8a instructions",
[HasV8_7aOps]>;
def HasV9_0aOps : SubtargetFeature<
"v9a", "HasV9_0aOps", "true", "Support ARM v9a instructions",
[HasV8_5aOps, FeatureSVE2]>;

1
llvm/lib/Target/AArch64/AArch64Subtarget.h
View File

@ -94,6 +94,7 @@ protected:
bool HasV8_5aOps = false;
bool HasV8_6aOps = false;
bool HasV8_7aOps = false;
bool HasV8_8aOps = false;
bool HasV9_0aOps = false;
bool HasV9_1aOps = false;
bool HasV9_2aOps = false;

4
llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
View File

@ -3307,6 +3307,8 @@ static void setRequiredFeatureString(FeatureBitset FBS, std::string &Str) {
Str += "ARMv8.6a";
else if (FBS[AArch64::HasV8_7aOps])
Str += "ARMv8.7a";
else if (FBS[AArch64::HasV8_8aOps])
Str += "ARMv8.8a";
else if (FBS[AArch64::HasV9_0aOps])
Str += "ARMv9-a";
else if (FBS[AArch64::HasV9_1aOps])
@ -5931,6 +5933,7 @@ static void ExpandCryptoAEK(AArch64::ArchKind ArchKind,
case AArch64::ArchKind::ARMV8_5A:
case AArch64::ArchKind::ARMV8_6A:
case AArch64::ArchKind::ARMV8_7A:
case AArch64::ArchKind::ARMV8_8A:
case AArch64::ArchKind::ARMV9A:
case AArch64::ArchKind::ARMV9_1A:
case AArch64::ArchKind::ARMV9_2A:
@ -5956,6 +5959,7 @@ static void ExpandCryptoAEK(AArch64::ArchKind ArchKind,
case AArch64::ArchKind::ARMV8_5A:
case AArch64::ArchKind::ARMV8_6A:
case AArch64::ArchKind::ARMV8_7A:
case AArch64::ArchKind::ARMV8_8A:
case AArch64::ArchKind::ARMV9A:
case AArch64::ArchKind::ARMV9_1A:
case AArch64::ArchKind::ARMV9_2A:

17
llvm/lib/Target/ARM/ARM.td
View File

@ -553,6 +553,10 @@ def HasV8_7aOps : SubtargetFeature<"v8.7a", "HasV8_7aOps", "true",
"Support ARM v8.7a instructions",
[HasV8_6aOps]>;
def HasV8_8aOps : SubtargetFeature<"v8.8a", "HasV8_8aOps", "true",
"Support ARM v8.8a instructions",
[HasV8_7aOps]>;
def HasV9_0aOps : SubtargetFeature<"v9a", "HasV9_0aOps", "true",
"Support ARM v9a instructions",
[HasV8_5aOps]>;
@ -894,6 +898,19 @@ def ARMv87a : Architecture<"armv8.7-a", "ARMv87a", [HasV8_7aOps,
FeatureCRC,
FeatureRAS,
FeatureDotProd]>;
def ARMv88a : Architecture<"armv8.8-a", "ARMv88a", [HasV8_8aOps,
FeatureAClass,
FeatureDB,
FeatureFPARMv8,
FeatureNEON,
FeatureDSP,
FeatureTrustZone,
FeatureMP,
FeatureVirtualization,
FeatureCrypto,
FeatureCRC,
FeatureRAS,
FeatureDotProd]>;
def ARMv9a : Architecture<"armv9-a", "ARMv9a", [HasV9_0aOps,
FeatureAClass,

3
llvm/lib/Target/ARM/ARMSubtarget.h
View File

@ -121,6 +121,7 @@ protected:
ARMv85a,
ARMv86a,
ARMv87a,
ARMv88a,
ARMv8a,
ARMv8mBaseline,
ARMv8mMainline,
@ -174,6 +175,7 @@ protected:
bool HasV8_4aOps = false;
bool HasV8_5aOps = false;
bool HasV8_6aOps = false;
bool HasV8_8aOps = false;
bool HasV8_7aOps = false;
bool HasV9_0aOps = false;
bool HasV9_1aOps = false;
@ -635,6 +637,7 @@ public:
bool hasV8_5aOps() const { return HasV8_5aOps; }
bool hasV8_6aOps() const { return HasV8_6aOps; }
bool hasV8_7aOps() const { return HasV8_7aOps; }
bool hasV8_8aOps() const { return HasV8_8aOps; }
bool hasV9_0aOps() const { return HasV9_0aOps; }
bool hasV9_1aOps() const { return HasV9_1aOps; }
bool hasV9_2aOps() const { return HasV9_2aOps; }

55
llvm/unittests/Support/TargetParserTest.cpp
View File

@ -18,21 +18,21 @@ using namespace llvm;
namespace {
const char *ARMArch[] = {
"armv2", "armv2a", "armv3", "armv3m", "armv4",
"armv4t", "armv5", "armv5t", "armv5e", "armv5te",
"armv5tej", "armv6", "armv6j", "armv6k", "armv6hl",
"armv6t2", "armv6kz", "armv6z", "armv6zk", "armv6-m",
"armv6m", "armv6sm", "armv6s-m", "armv7-a", "armv7",
"armv7a", "armv7ve", "armv7hl", "armv7l", "armv7-r",
"armv7r", "armv7-m", "armv7m", "armv7k", "armv7s",
"armv7e-m", "armv7em", "armv8-a", "armv8", "armv8a",
"armv8l", "armv8.1-a", "armv8.1a", "armv8.2-a", "armv8.2a",
"armv8.3-a", "armv8.3a", "armv8.4-a", "armv8.4a", "armv8.5-a",
"armv8.5a", "armv8.6-a", "armv8.6a", "armv8.7-a", "armv8.7a",
"armv8-r", "armv8r", "armv8-m.base","armv8m.base", "armv8-m.main",
"armv8m.main", "iwmmxt", "iwmmxt2", "xscale", "armv8.1-m.main",
"armv9-a", "armv9", "armv9a", "armv9.1-a", "armv9.1a",
"armv9.2-a", "armv9.2a",
"armv2", "armv2a", "armv3", "armv3m", "armv4",
"armv4t", "armv5", "armv5t", "armv5e", "armv5te",
"armv5tej", "armv6", "armv6j", "armv6k", "armv6hl",
"armv6t2", "armv6kz", "armv6z", "armv6zk", "armv6-m",
"armv6m", "armv6sm", "armv6s-m", "armv7-a", "armv7",
"armv7a", "armv7ve", "armv7hl", "armv7l", "armv7-r",
"armv7r", "armv7-m", "armv7m", "armv7k", "armv7s",
"armv7e-m", "armv7em", "armv8-a", "armv8", "armv8a",
"armv8l", "armv8.1-a", "armv8.1a", "armv8.2-a", "armv8.2a",
"armv8.3-a", "armv8.3a", "armv8.4-a", "armv8.4a", "armv8.5-a",
"armv8.5a", "armv8.6-a", "armv8.6a", "armv8.7-a", "armv8.7a",
"armv8.8-a", "armv8.8a", "armv8-r", "armv8r", "armv8-m.base",
"armv8m.base", "armv8-m.main", "armv8m.main", "iwmmxt", "iwmmxt2",
"xscale", "armv8.1-m.main", "armv9-a", "armv9", "armv9a",
"armv9.1-a", "armv9.1a", "armv9.2-a", "armv9.2a",
};
template <ARM::ISAKind ISAKind>
@ -501,6 +501,8 @@ TEST(TargetParserTest, testARMArch) {
EXPECT_TRUE(
testARMArch("armv8.7-a", "generic", "v8.7a",
ARMBuildAttrs::CPUArch::v8_A));
EXPECT_TRUE(testARMArch("armv8.8-a", "generic", "v8.8a",
ARMBuildAttrs::CPUArch::v8_A));
EXPECT_TRUE(
testARMArch("armv9-a", "generic", "v9a",
ARMBuildAttrs::CPUArch::v8_A));
@ -765,15 +767,17 @@ TEST(TargetParserTest, ARMparseHWDiv) {
TEST(TargetParserTest, ARMparseArchEndianAndISA) {
const char *Arch[] = {
"v2", "v2a", "v3", "v3m", "v4", "v4t", "v5", "v5t",
"v5e", "v5te", "v5tej", "v6", "v6j", "v6k", "v6hl", "v6t2",
"v6kz", "v6z", "v6zk", "v6-m", "v6m", "v6sm", "v6s-m", "v7-a",
"v7", "v7a", "v7ve", "v7hl", "v7l", "v7-r", "v7r", "v7-m",
"v7m", "v7k", "v7s", "v7e-m", "v7em", "v8-a", "v8", "v8a",
"v8l", "v8.1-a", "v8.1a", "v8.2-a", "v8.2a", "v8.3-a", "v8.3a", "v8.4-a",
"v8.4a", "v8.5-a","v8.5a", "v8.6-a", "v8.6a", "v8.7-a", "v8.7a", "v8-r",
"v8m.base", "v8m.main", "v8.1m.main"
};
"v2", "v2a", "v3", "v3m", "v4", "v4t",
"v5", "v5t", "v5e", "v5te", "v5tej", "v6",
"v6j", "v6k", "v6hl", "v6t2", "v6kz", "v6z",
"v6zk", "v6-m", "v6m", "v6sm", "v6s-m", "v7-a",
"v7", "v7a", "v7ve", "v7hl", "v7l", "v7-r",
"v7r", "v7-m", "v7m", "v7k", "v7s", "v7e-m",
"v7em", "v8-a", "v8", "v8a", "v8l", "v8.1-a",
"v8.1a", "v8.2-a", "v8.2a", "v8.3-a", "v8.3a", "v8.4-a",
"v8.4a", "v8.5-a", "v8.5a", "v8.6-a", "v8.6a", "v8.7-a",
"v8.7a", "v8.8-a", "v8.8a", "v8-r", "v8m.base", "v8m.main",
"v8.1m.main"};
for (unsigned i = 0; i < array_lengthof(Arch); i++) {
std::string arm_1 = "armeb" + (std::string)(Arch[i]);
@ -839,6 +843,7 @@ TEST(TargetParserTest, ARMparseArchProfile) {
case ARM::ArchKind::ARMV8_5A:
case ARM::ArchKind::ARMV8_6A:
case ARM::ArchKind::ARMV8_7A:
case ARM::ArchKind::ARMV8_8A:
case ARM::ArchKind::ARMV9A:
case ARM::ArchKind::ARMV9_1A:
case ARM::ArchKind::ARMV9_2A:
@ -1266,6 +1271,8 @@ TEST(TargetParserTest, testAArch64Arch) {
ARMBuildAttrs::CPUArch::v8_A));
EXPECT_TRUE(testAArch64Arch("armv8.7-a", "generic", "v8.7a",
ARMBuildAttrs::CPUArch::v8_A));
EXPECT_TRUE(testAArch64Arch("armv8.8-a", "generic", "v8.8a",
ARMBuildAttrs::CPUArch::v8_A));
EXPECT_TRUE(testAArch64Arch("armv9-a", "generic", "v9a",
ARMBuildAttrs::CPUArch::v8_A));
EXPECT_TRUE(testAArch64Arch("armv9.1-a", "generic", "v9.1a",