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[VENTUS][RISCV] Skip TargetOpcode::KILL instruction in regext insertion pass.

This commit is contained in:
yanming 2023-07-07 13:43:26 +08:00
parent bd1c51d245
commit c0b7829a87
1 changed files with 4 additions and 0 deletions
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4
llvm/lib/Target/RISCV/VentusRegextInsertion.cpp
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@ -67,6 +67,10 @@ bool VentusRegextInsertion::runOnMachineFunction(MachineFunction &MF) {
bool VentusRegextInsertion::runOnMachineBasicBlock(MachineBasicBlock &MBB) { bool VentusRegextInsertion::runOnMachineBasicBlock(MachineBasicBlock &MBB) {
bool Modified = false; bool Modified = false;
for (auto &MI : MBB) { for (auto &MI : MBB) {
// Skip KILL instruction
if (MI.getOpcode() == TargetOpcode::KILL)
continue;
Modified |= insertRegext(MBB, MI); Modified |= insertRegext(MBB, MI);
} }
return Modified; return Modified;