[PowerPC] Add vector pair calling convention for AIX
This is AIX part of update after https://reviews.llvm.org/D117225 Fixed the issue that AIX64 with vector pair enabled saw redundant spill/reload of callee saved vector registers. Based on original patch by: Kai Luo Reviewed By: lkail Differential Revision: https://reviews.llvm.org/D133466
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Ting Wang
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31327c29fb
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bc5e969ca1
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@ -386,3 +386,9 @@ def CSR_SVR64_ColdCC_R2_VSRP : CalleeSavedRegs<(add CSR_SVR64_ColdCC_VSRP, X2)>;
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def CSR_64_AllRegs_VSRP :
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CalleeSavedRegs<(add CSR_64_AllRegs_VSX, CSR_ALL_VSRP)>;
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def CSR_AIX64_VSRP : CalleeSavedRegs<(add CSR_PPC64_Altivec, CSR_VSRP)>;
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def CSR_AIX64_R2_VSRP : CalleeSavedRegs<(add CSR_AIX64_VSRP, X2)>;
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def CSR_AIX32_VSRP : CalleeSavedRegs<(add CSR_AIX32_Altivec, CSR_VSRP)>;
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@ -237,8 +237,14 @@ PPCRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
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}
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// Standard calling convention CSRs.
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if (TM.isPPC64()) {
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if (Subtarget.pairedVectorMemops())
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if (Subtarget.pairedVectorMemops()) {
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if (Subtarget.isAIXABI()) {
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if (!TM.getAIXExtendedAltivecABI())
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return SaveR2 ? CSR_PPC64_R2_SaveList : CSR_PPC64_SaveList;
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return SaveR2 ? CSR_AIX64_R2_VSRP_SaveList : CSR_AIX64_VSRP_SaveList;
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}
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return SaveR2 ? CSR_SVR464_R2_VSRP_SaveList : CSR_SVR464_VSRP_SaveList;
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}
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if (Subtarget.hasAltivec() &&
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(!Subtarget.isAIXABI() || TM.getAIXExtendedAltivecABI())) {
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return SaveR2 ? CSR_PPC64_R2_Altivec_SaveList
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@ -248,6 +254,9 @@ PPCRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
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}
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// 32-bit targets.
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if (Subtarget.isAIXABI()) {
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if (Subtarget.pairedVectorMemops())
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return TM.getAIXExtendedAltivecABI() ? CSR_AIX32_VSRP_SaveList
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: CSR_AIX32_SaveList;
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if (Subtarget.hasAltivec())
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return TM.getAIXExtendedAltivecABI() ? CSR_AIX32_Altivec_SaveList
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: CSR_AIX32_SaveList;
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@ -286,6 +295,11 @@ PPCRegisterInfo::getCallPreservedMask(const MachineFunction &MF,
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}
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if (Subtarget.isAIXABI()) {
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if (Subtarget.pairedVectorMemops()) {
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if (!TM.getAIXExtendedAltivecABI())
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return TM.isPPC64() ? CSR_PPC64_RegMask : CSR_AIX32_RegMask;
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return TM.isPPC64() ? CSR_AIX64_VSRP_RegMask : CSR_AIX32_VSRP_RegMask;
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}
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return TM.isPPC64()
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? ((Subtarget.hasAltivec() && TM.getAIXExtendedAltivecABI())
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? CSR_PPC64_Altivec_RegMask
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@ -3,32 +3,20 @@
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; RUN: llc -O0 -mtriple=powerpc64-ibm-aix-xcoff -mcpu=pwr10 -vec-extabi -stop-after=prologepilog -verify-machineinstrs < %s | \
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; RUN: FileCheck --check-prefix=CHECK-VEXT %s
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; Error pattern will be fixed in https://reviews.llvm.org/D133466
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; CHECK-LABEL: name: foo
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; CHECK: spill-slot
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; CHECK-NEXT: callee-saved-register: '$v31'
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; CHECK: spill-slot
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; CHECK-NEXT: callee-saved-register: '$v30'
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; CHECK: spill-slot
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; CHECK-NEXT: callee-saved-register: '$v29'
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; CHECK: spill-slot
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; CHECK-NEXT: callee-saved-register: '$v28'
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; CHECK: spill-slot
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; CHECK-NEXT: callee-saved-register: '$v27'
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; CHECK: spill-slot
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; CHECK-NEXT: callee-saved-register: '$v26'
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; CHECK: spill-slot
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; CHECK-NEXT: callee-saved-register: '$v25'
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; CHECK: spill-slot
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; CHECK-NEXT: callee-saved-register: '$v24'
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; CHECK: spill-slot
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; CHECK-NEXT: callee-saved-register: '$v23'
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; CHECK: spill-slot
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; CHECK-NEXT: callee-saved-register: '$v22'
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; CHECK: spill-slot
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; CHECK-NEXT: callee-saved-register: '$v21'
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; CHECK: spill-slot
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; CHECK-NEXT: callee-saved-register: '$v20'
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; CHECK-NOT: spill-slot
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; CHECK-NOT: callee-saved-register: '$v31'
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; CHECK-NOT: callee-saved-register: '$v30'
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; CHECK-NOT: callee-saved-register: '$v29'
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; CHECK-NOT: callee-saved-register: '$v28'
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; CHECK-NOT: callee-saved-register: '$v27'
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; CHECK-NOT: callee-saved-register: '$v26'
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; CHECK-NOT: callee-saved-register: '$v25'
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; CHECK-NOT: callee-saved-register: '$v24'
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; CHECK-NOT: callee-saved-register: '$v23'
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; CHECK-NOT: callee-saved-register: '$v22'
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; CHECK-NOT: callee-saved-register: '$v21'
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; CHECK-NOT: callee-saved-register: '$v20'
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; CHECK-VEXT-LABEL: name: foo
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; CHECK-VEXT-NOT: spill-slot
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@ -50,32 +38,20 @@ entry:
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ret void
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}
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; Error pattern will be fixed in https://reviews.llvm.org/D133466
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; CHECK-LABEL: name: spill
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; CHECK: spill-slot
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; CHECK-NEXT: callee-saved-register: '$v31'
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; CHECK: spill-slot
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; CHECK-NEXT: callee-saved-register: '$v30'
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; CHECK: spill-slot
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; CHECK-NEXT: callee-saved-register: '$v29'
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; CHECK: spill-slot
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; CHECK-NEXT: callee-saved-register: '$v28'
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; CHECK: spill-slot
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; CHECK-NEXT: callee-saved-register: '$v27'
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; CHECK: spill-slot
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; CHECK-NEXT: callee-saved-register: '$v26'
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; CHECK: spill-slot
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; CHECK-NEXT: callee-saved-register: '$v25'
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; CHECK: spill-slot
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; CHECK-NEXT: callee-saved-register: '$v24'
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; CHECK: spill-slot
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; CHECK-NEXT: callee-saved-register: '$v23'
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; CHECK: spill-slot
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; CHECK-NEXT: callee-saved-register: '$v22'
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; CHECK: spill-slot
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; CHECK-NEXT: callee-saved-register: '$v21'
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; CHECK: spill-slot
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; CHECK-NEXT: callee-saved-register: '$v20'
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; CHECK-NOT: spill-slot
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; CHECK-NOT: callee-saved-register: '$v31'
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; CHECK-NOT: callee-saved-register: '$v30'
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; CHECK-NOT: callee-saved-register: '$v29'
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; CHECK-NOT: callee-saved-register: '$v28'
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; CHECK-NOT: callee-saved-register: '$v27'
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; CHECK-NOT: callee-saved-register: '$v26'
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; CHECK-NOT: callee-saved-register: '$v25'
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; CHECK-NOT: callee-saved-register: '$v24'
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; CHECK-NOT: callee-saved-register: '$v23'
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; CHECK-NOT: callee-saved-register: '$v22'
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; CHECK-NOT: callee-saved-register: '$v21'
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; CHECK-NOT: callee-saved-register: '$v20'
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; CHECK-VEXT-LABEL: name: spill
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; CHECK-VEXT: spill-slot
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@ -9,19 +9,7 @@ define dso_local noundef signext i32 @virtualCall(ptr noundef %b) #0 {
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: mflr 0
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; CHECK-NEXT: std 0, 16(1)
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; CHECK-NEXT: stdu 1, -320(1)
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; CHECK-NEXT: stxv 52, 128(1) # 16-byte Folded Spill
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; CHECK-NEXT: stxv 53, 144(1) # 16-byte Folded Spill
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; CHECK-NEXT: stxv 54, 160(1) # 16-byte Folded Spill
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; CHECK-NEXT: stxv 55, 176(1) # 16-byte Folded Spill
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; CHECK-NEXT: stxv 56, 192(1) # 16-byte Folded Spill
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; CHECK-NEXT: stxv 57, 208(1) # 16-byte Folded Spill
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; CHECK-NEXT: stxv 58, 224(1) # 16-byte Folded Spill
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; CHECK-NEXT: stxv 59, 240(1) # 16-byte Folded Spill
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; CHECK-NEXT: stxv 60, 256(1) # 16-byte Folded Spill
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; CHECK-NEXT: stxv 61, 272(1) # 16-byte Folded Spill
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; CHECK-NEXT: stxv 62, 288(1) # 16-byte Folded Spill
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; CHECK-NEXT: stxv 63, 304(1) # 16-byte Folded Spill
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; CHECK-NEXT: stdu 1, -128(1)
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; CHECK-NEXT: std 3, 120(1)
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; CHECK-NEXT: ld 3, 120(1)
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; CHECK-NEXT: ld 4, 0(3)
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@ -37,19 +25,7 @@ define dso_local noundef signext i32 @virtualCall(ptr noundef %b) #0 {
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; CHECK-NEXT: ld 2, 40(1)
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; CHECK-NEXT: # kill: def $r3 killed $r3 killed $x3
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; CHECK-NEXT: extsw 3, 3
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; CHECK-NEXT: lxv 63, 304(1) # 16-byte Folded Reload
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; CHECK-NEXT: lxv 62, 288(1) # 16-byte Folded Reload
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; CHECK-NEXT: lxv 61, 272(1) # 16-byte Folded Reload
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; CHECK-NEXT: lxv 60, 256(1) # 16-byte Folded Reload
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; CHECK-NEXT: lxv 59, 240(1) # 16-byte Folded Reload
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; CHECK-NEXT: lxv 58, 224(1) # 16-byte Folded Reload
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; CHECK-NEXT: lxv 57, 208(1) # 16-byte Folded Reload
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; CHECK-NEXT: lxv 56, 192(1) # 16-byte Folded Reload
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; CHECK-NEXT: lxv 55, 176(1) # 16-byte Folded Reload
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; CHECK-NEXT: lxv 54, 160(1) # 16-byte Folded Reload
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; CHECK-NEXT: lxv 53, 144(1) # 16-byte Folded Reload
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; CHECK-NEXT: lxv 52, 128(1) # 16-byte Folded Reload
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; CHECK-NEXT: addi 1, 1, 320
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; CHECK-NEXT: addi 1, 1, 128
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; CHECK-NEXT: ld 0, 16(1)
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; CHECK-NEXT: mtlr 0
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; CHECK-NEXT: blr
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