[PowerPC] Support for R_PPC64_REL24_NOTOC calls where the caller has no TOC and the callee is not DSO local
This patch supports the situation where caller does not have a valid TOC and calls using the R_PPC64_REL24_NOTOC relocation and the callee is not DSO local. In this case the call cannot be made directly since the callee may or may not require a valid TOC pointer. As a result this situation require a PC-relative plt stub to set up r12. Reviewed By: sfertile, MaskRay, stefanp Differential Revision: https://reviews.llvm.org/D83669
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@ -1035,11 +1035,6 @@ bool PPC64::needsThunk(RelExpr expr, RelType type, const InputFile *file,
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type != R_PPC64_REL24_NOTOC)
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return false;
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// FIXME: Remove the fatal error once the call protocol is implemented.
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if (type == R_PPC64_REL24_NOTOC && s.isInPlt())
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fatal("unimplemented feature: external function call with the reltype"
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" R_PPC64_REL24_NOTOC");
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// If a function is in the Plt it needs to be called with a call-stub.
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if (s.isInPlt())
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return true;
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@ -305,6 +305,21 @@ public:
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void addSymbols(ThunkSection &isec) override;
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};
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// PPC64 PC-relative PLT Stub
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// When a caller that does not maintain a toc-pointer performs an extern call
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// then this stub is needed for:
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// 1) Loading the target functions address from the procedure linkage table into
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// r12 for use by the target functions global entry point, and into the count
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// register with pc-relative instructions.
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// 2) Transferring control to the target function through an indirect branch.
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class PPC64PCRelPLTStub final : public Thunk {
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public:
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PPC64PCRelPLTStub(Symbol &dest) : Thunk(dest, 0) {}
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uint32_t size() override { return 16; }
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void writeTo(uint8_t *buf) override;
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void addSymbols(ThunkSection &isec) override;
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};
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// A bl instruction uses a signed 24 bit offset, with an implicit 4 byte
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// alignment. This gives a possible 26 bits of 'reach'. If the call offset is
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// larger then that we need to emit a long-branch thunk. The target address
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@ -880,6 +895,23 @@ void PPC64R12SetupStub::addSymbols(ThunkSection &isec) {
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isec);
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}
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void PPC64PCRelPLTStub::writeTo(uint8_t *buf) {
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int64_t offset = destination.getGotPltVA() - getThunkTargetSym()->getVA();
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if (!isInt<34>(offset))
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fatal("offset must fit in 34 bits to encode in the instruction");
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uint64_t pld =
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PLD_R12_NO_DISP | (((offset >> 16) & 0x3ffff) << 32) | (offset & 0xffff);
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writePrefixedInstruction(buf + 0, pld); // pld r12, func@plt@pcrel
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write32(buf + 8, MTCTR_R12); // mtctr r12
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write32(buf + 12, BCTR); // bctr
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}
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void PPC64PCRelPLTStub::addSymbols(ThunkSection &isec) {
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addSymbol(saver.save("__plt_pcrel_" + destination.getName()), STT_FUNC, 0,
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isec);
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}
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void PPC64LongBranchThunk::writeTo(uint8_t *buf) {
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int64_t offset = in.ppc64LongBranchTarget->getEntryVA(&destination, addend) -
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getPPC64TocBase();
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@ -1007,7 +1039,8 @@ static Thunk *addThunkPPC64(RelType type, Symbol &s, int64_t a) {
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type == R_PPC64_REL24_NOTOC) &&
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"unexpected relocation type for thunk");
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if (s.isInPlt())
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return make<PPC64PltCallStub>(s);
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return type == R_PPC64_REL24_NOTOC ? (Thunk *)make<PPC64PCRelPLTStub>(s)
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: (Thunk *)make<PPC64PltCallStub>(s);
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// This check looks at the st_other bits of the callee. If the value is 1
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// then the callee clobbers the TOC and we need an R2 save stub.
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@ -0,0 +1,131 @@
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# REQUIRES: ppc
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# RUN: echo 'SECTIONS { \
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# RUN: .text_caller1 0x10010000 : { *(.text_caller1) } \
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# RUN: .text_caller2 0x10020000 : { *(.text_caller2) } \
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# RUN: .text_caller3 0x10030000 : { *(.text_caller3) } \
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# RUN: }' > %t.script
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# RUN: llvm-mc -filetype=obj -triple=powerpc64le --defsym AUX=1 %s -o %t1.o
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# RUN: llvm-mc -filetype=obj -triple=powerpc64le %s -o %t2.o
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# RUN: ld.lld --shared %t2.o -o %t2.so
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# RUN: ld.lld -T %t.script %t1.o %t2.so -o %t
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# RUN: llvm-readelf -s %t | FileCheck %s --check-prefix=SYMBOL
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# RUN: llvm-readelf -S -d %t | FileCheck %s --check-prefix=SEC
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# RUN: llvm-readobj -r %t | FileCheck %s --check-prefix=REL
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# RUN: llvm-objdump -d --no-show-raw-insn --mcpu=pwr10 %t | FileCheck %s
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# RUN: llvm-mc -filetype=obj -triple=powerpc64 --defsym AUX=1 %s -o %t1.o
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# RUN: llvm-mc -filetype=obj -triple=powerpc64 %s -o %t2.o
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# RUN: ld.lld --shared %t2.o -o %t2.so
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# RUN: ld.lld -T %t.script %t1.o %t2.so -o %t
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# RUN: llvm-readelf -s %t | FileCheck %s --check-prefix=SYMBOL
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# RUN: llvm-readelf -S -d %t | FileCheck %s --check-prefix=SEC
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# RUN: llvm-readobj -r %t | FileCheck %s --check-prefix=REL
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# RUN: llvm-objdump -d --no-show-raw-insn --mcpu=pwr10 %t | FileCheck %s
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## The test is created to check that when a function without TOC access an
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## external function, a r12 setup stub is inserted.
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# SYMBOL: Symbol table '.dynsym' contains 4 entries:
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# SYMBOL: 1: 0000000000000000 0 NOTYPE GLOBAL DEFAULT [<other: 0x60>] UND callee_global_TOC
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# SYMBOL-NEXT: 2: 0000000000000000 0 NOTYPE GLOBAL DEFAULT UND callee_global_stother0
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# SYMBOL-NEXT: 3: 0000000000000000 0 NOTYPE GLOBAL DEFAULT [<other: 0x20>] UND callee_global_stother1
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# SYMBOL: Symbol table '.symtab' contains 12 entries:
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# SYMBOL: 2: 0000000010010000 0 NOTYPE LOCAL DEFAULT [<other: 0x20>] 6 caller1
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# SYMBOL-NEXT: 3: 0000000010020000 0 NOTYPE LOCAL DEFAULT [<other: 0x20>] 7 caller2
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# SYMBOL-NEXT: 4: 0000000010030000 0 NOTYPE LOCAL DEFAULT [<other: 0x20>] 8 caller3
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# SYMBOL: 6: 0000000010010008 16 FUNC LOCAL DEFAULT 6 __plt_pcrel_callee_global_stother0
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# SYMBOL-NEXT: 7: 0000000010020008 16 FUNC LOCAL DEFAULT 7 __plt_pcrel_callee_global_stother1
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# SYMBOL-NEXT: 8: 0000000010030008 16 FUNC LOCAL DEFAULT 8 __plt_pcrel_callee_global_TOC
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# SYMBOL-NEXT: 9: 0000000000000000 0 NOTYPE GLOBAL DEFAULT [<other: 0x60>] UND callee_global_TOC
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# SYMBOL-NEXT: 10: 0000000000000000 0 NOTYPE GLOBAL DEFAULT UND callee_global_stother0
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# SYMBOL-NEXT: 11: 0000000000000000 0 NOTYPE GLOBAL DEFAULT [<other: 0x20>] UND callee_global_stother1
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## DT_PLTGOT points to .plt
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# SEC: .plt NOBITS 0000000010030140 040140 000028 00 WA 0 0 8
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# SEC: 0x0000000000000003 (PLTGOT) 0x10030140
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## The first 2 entries in the .plt are reserved for the dynamic linkers
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## usage. The JMP_SLOT relocations are stored at .plt[2], .plt[3], .plt[4].
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## Check that we emit 3 R_PPC64_JMP_SLOT in .rela.plt.
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# REL: .rela.plt {
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# REL-NEXT: 0x10030150 R_PPC64_JMP_SLOT callee_global_stother0 0x0
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# REL-NEXT: 0x10030158 R_PPC64_JMP_SLOT callee_global_stother1 0x0
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# REL-NEXT: 0x10030160 R_PPC64_JMP_SLOT callee_global_TOC 0x0
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# REL-NEXT: }
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# CHECK-LABEL: <caller1>:
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# CHECK: 10010000: bl 0x10010008
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# CHECK-NEXT: 10010004: blr
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## .plt[2] - 0x10010008 = 0x10030150 - 0x10010008 = 0x20148 = 131400
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# CHECK-LABEL: <__plt_pcrel_callee_global_stother0>:
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# CHECK: 10010008: pld 12, 131400(0), 1
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# CHECK-NEXT: 10010010: mtctr 12
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# CHECK-NEXT: 10010014: bctr
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# CHECK-LABEL: <caller2>:
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# CHECK: 10020000: bl 0x10020008
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# CHECK-NEXT: 10020004: blr
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## .plt[3] - 0x10020008 = 0x10030158 - 0x10020008 = 0x10150 = 65872
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# CHECK-LABEL: <__plt_pcrel_callee_global_stother1>:
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# CHECK: 10020008: pld 12, 65872(0), 1
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# CHECK-NEXT: 10020010: mtctr 12
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# CHECK-NEXT: 10020014: bctr
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# CHECK-LABEL: <caller3>:
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# CHECK: 10030000: bl 0x10030008
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# CHECK-NEXT: 10030004: blr
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## .plt[4] - 0x10030008 = 0x10030160 - 0x10030008 = 0x158 = 344
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# CHECK-LABEL: <__plt_pcrel_callee_global_TOC>:
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# CHECK: 10030008: pld 12, 344(0), 1
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# CHECK-NEXT: 10030010: mtctr 12
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# CHECK-NEXT: 10030014: bctr
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.ifdef AUX
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.section .text_caller1, "ax", %progbits
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caller1:
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.localentry caller1, 1
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bl callee_global_stother0@notoc
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blr
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.section .text_caller2, "ax", %progbits
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caller2:
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.localentry caller2, 1
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bl callee_global_stother1@notoc
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blr
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.section .text_caller3, "ax", %progbits
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caller3:
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.localentry caller3, 1
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bl callee_global_TOC@notoc
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blr
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.else
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func_extern:
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blr
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.globl callee_global_stother0
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callee_global_stother0:
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blr
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.globl callee_global_stother1
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callee_global_stother1:
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.localentry callee_global_stother1, 1
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## nop is not needed after bl for R_PPC64_REL24_NOTOC
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bl func_extern@notoc
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blr
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.globl callee_global_TOC
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callee_global_TOC:
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.Lfunc_gep1:
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addis 2, 12, .TOC.-.Lfunc_gep1@ha
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addi 2, 2, .TOC.-.Lfunc_gep1@l
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.Lfunc_lep1:
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.localentry callee_global_TOC, .Lfunc_lep1-.Lfunc_gep1
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addis 4, 2, global@toc@ha
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lwz 3, global@toc@l(4)
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blr
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global:
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.long 0
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.size global, 4
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.endif
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@ -50,6 +50,7 @@ static inline Error createError(const Twine &Err) {
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enum PPCInstrMasks : uint64_t {
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PADDI_R12_NO_DISP = 0x0610000039800000,
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PLD_R12_NO_DISP = 0x04100000E5800000,
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MTCTR_R12 = 0x7D8903A6,
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BCTR = 0x4E800420,
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};
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