Convert Optional<CodeModel> to std::optional<CodeModel>

This commit is contained in:
Krzysztof Parzyszek 2022-12-03 11:06:12 -06:00
parent d98c172712
commit 8c7c20f033
67 changed files with 280 additions and 159 deletions

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@ -92,6 +92,7 @@
#include "llvm/Transforms/Utils/NameAnonGlobals.h" #include "llvm/Transforms/Utils/NameAnonGlobals.h"
#include "llvm/Transforms/Utils/SymbolRewriter.h" #include "llvm/Transforms/Utils/SymbolRewriter.h"
#include <memory> #include <memory>
#include <optional>
using namespace clang; using namespace clang;
using namespace llvm; using namespace llvm;
@ -312,7 +313,7 @@ static CodeGenOpt::Level getCGOptLevel(const CodeGenOptions &CodeGenOpts) {
} }
} }
static Optional<llvm::CodeModel::Model> static std::optional<llvm::CodeModel::Model>
getCodeModel(const CodeGenOptions &CodeGenOpts) { getCodeModel(const CodeGenOptions &CodeGenOpts) {
unsigned CodeModel = llvm::StringSwitch<unsigned>(CodeGenOpts.CodeModel) unsigned CodeModel = llvm::StringSwitch<unsigned>(CodeGenOpts.CodeModel)
.Case("tiny", llvm::CodeModel::Tiny) .Case("tiny", llvm::CodeModel::Tiny)
@ -324,7 +325,7 @@ getCodeModel(const CodeGenOptions &CodeGenOpts) {
.Default(~0u); .Default(~0u);
assert(CodeModel != ~0u && "invalid code model!"); assert(CodeModel != ~0u && "invalid code model!");
if (CodeModel == ~1u) if (CodeModel == ~1u)
return None; return std::nullopt;
return static_cast<llvm::CodeModel::Model>(CodeModel); return static_cast<llvm::CodeModel::Model>(CodeModel);
} }
@ -572,7 +573,7 @@ void EmitAssemblyHelper::CreateTargetMachine(bool MustCreateTM) {
return; return;
} }
Optional<llvm::CodeModel::Model> CM = getCodeModel(CodeGenOpts); std::optional<llvm::CodeModel::Model> CM = getCodeModel(CodeGenOpts);
std::string FeaturesStr = std::string FeaturesStr =
llvm::join(TargetOpts.Features.begin(), TargetOpts.Features.end(), ","); llvm::join(TargetOpts.Features.begin(), TargetOpts.Features.end(), ",");
llvm::Reloc::Model RM = CodeGenOpts.RelocationModel; llvm::Reloc::Model RM = CodeGenOpts.RelocationModel;

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@ -10,6 +10,7 @@
#include "llvm/ADT/Triple.h" #include "llvm/ADT/Triple.h"
#include "llvm/CodeGen/CommandFlags.h" #include "llvm/CodeGen/CommandFlags.h"
#include "llvm/Target/TargetOptions.h" #include "llvm/Target/TargetOptions.h"
#include <optional>
llvm::TargetOptions lld::initTargetOptionsFromCodeGenFlags() { llvm::TargetOptions lld::initTargetOptionsFromCodeGenFlags() {
return llvm::codegen::InitTargetOptionsFromCodeGenFlags(llvm::Triple()); return llvm::codegen::InitTargetOptionsFromCodeGenFlags(llvm::Triple());
@ -19,7 +20,7 @@ llvm::Optional<llvm::Reloc::Model> lld::getRelocModelFromCMModel() {
return llvm::codegen::getExplicitRelocModel(); return llvm::codegen::getExplicitRelocModel();
} }
llvm::Optional<llvm::CodeModel::Model> lld::getCodeModelFromCMModel() { std::optional<llvm::CodeModel::Model> lld::getCodeModelFromCMModel() {
return llvm::codegen::getExplicitCodeModel(); return llvm::codegen::getExplicitCodeModel();
} }

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@ -16,11 +16,12 @@
#include "llvm/ADT/Optional.h" #include "llvm/ADT/Optional.h"
#include "llvm/Support/CodeGen.h" #include "llvm/Support/CodeGen.h"
#include "llvm/Target/TargetOptions.h" #include "llvm/Target/TargetOptions.h"
#include <optional>
namespace lld { namespace lld {
llvm::TargetOptions initTargetOptionsFromCodeGenFlags(); llvm::TargetOptions initTargetOptionsFromCodeGenFlags();
llvm::Optional<llvm::Reloc::Model> getRelocModelFromCMModel(); llvm::Optional<llvm::Reloc::Model> getRelocModelFromCMModel();
llvm::Optional<llvm::CodeModel::Model> getCodeModelFromCMModel(); std::optional<llvm::CodeModel::Model> getCodeModelFromCMModel();
std::string getCPUStr(); std::string getCPUStr();
std::vector<std::string> getMAttrs(); std::vector<std::string> getMAttrs();
} }

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@ -18,6 +18,7 @@
#include "llvm/ADT/FloatingPointMode.h" #include "llvm/ADT/FloatingPointMode.h"
#include "llvm/Support/CodeGen.h" #include "llvm/Support/CodeGen.h"
#include "llvm/Target/TargetOptions.h" #include "llvm/Target/TargetOptions.h"
#include <optional>
#include <string> #include <string>
#include <vector> #include <vector>
@ -42,7 +43,7 @@ Optional<Reloc::Model> getExplicitRelocModel();
ThreadModel::Model getThreadModel(); ThreadModel::Model getThreadModel();
CodeModel::Model getCodeModel(); CodeModel::Model getCodeModel();
Optional<CodeModel::Model> getExplicitCodeModel(); std::optional<CodeModel::Model> getExplicitCodeModel();
llvm::ExceptionHandling getExceptionModel(); llvm::ExceptionHandling getExceptionModel();

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@ -35,6 +35,7 @@
#include <functional> #include <functional>
#include <map> #include <map>
#include <memory> #include <memory>
#include <optional>
#include <string> #include <string>
#include <vector> #include <vector>
@ -541,7 +542,7 @@ private:
std::shared_ptr<LegacyJITSymbolResolver> Resolver; std::shared_ptr<LegacyJITSymbolResolver> Resolver;
TargetOptions Options; TargetOptions Options;
Optional<Reloc::Model> RelocModel; Optional<Reloc::Model> RelocModel;
Optional<CodeModel::Model> CMModel; std::optional<CodeModel::Model> CMModel;
std::string MArch; std::string MArch;
std::string MCPU; std::string MCPU;
SmallVector<std::string, 4> MAttrs; SmallVector<std::string, 4> MAttrs;

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@ -21,6 +21,7 @@
#include "llvm/Target/TargetMachine.h" #include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetOptions.h" #include "llvm/Target/TargetOptions.h"
#include <memory> #include <memory>
#include <optional>
#include <string> #include <string>
#include <vector> #include <vector>
@ -92,13 +93,13 @@ public:
const Optional<Reloc::Model> &getRelocationModel() const { return RM; } const Optional<Reloc::Model> &getRelocationModel() const { return RM; }
/// Set the code model. /// Set the code model.
JITTargetMachineBuilder &setCodeModel(Optional<CodeModel::Model> CM) { JITTargetMachineBuilder &setCodeModel(std::optional<CodeModel::Model> CM) {
this->CM = std::move(CM); this->CM = std::move(CM);
return *this; return *this;
} }
/// Get the code model. /// Get the code model.
const Optional<CodeModel::Model> &getCodeModel() const { return CM; } const std::optional<CodeModel::Model> &getCodeModel() const { return CM; }
/// Set the LLVM CodeGen optimization level. /// Set the LLVM CodeGen optimization level.
JITTargetMachineBuilder &setCodeGenOptLevel(CodeGenOpt::Level OptLevel) { JITTargetMachineBuilder &setCodeGenOptLevel(CodeGenOpt::Level OptLevel) {
@ -151,7 +152,7 @@ private:
SubtargetFeatures Features; SubtargetFeatures Features;
TargetOptions Options; TargetOptions Options;
Optional<Reloc::Model> RM; Optional<Reloc::Model> RM;
Optional<CodeModel::Model> CM; std::optional<CodeModel::Model> CM;
CodeGenOpt::Level OptLevel = CodeGenOpt::Default; CodeGenOpt::Level OptLevel = CodeGenOpt::Default;
}; };

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@ -36,6 +36,7 @@
#include <cstdint> #include <cstdint>
#include <iterator> #include <iterator>
#include <memory> #include <memory>
#include <optional>
#include <string> #include <string>
#include <vector> #include <vector>
@ -863,7 +864,7 @@ public:
/// @{ /// @{
/// Returns the code model (tiny, small, kernel, medium or large model) /// Returns the code model (tiny, small, kernel, medium or large model)
Optional<CodeModel::Model> getCodeModel() const; std::optional<CodeModel::Model> getCodeModel() const;
/// Set the code model (tiny, small, kernel, medium or large) /// Set the code model (tiny, small, kernel, medium or large)
void setCodeModel(CodeModel::Model CL); void setCodeModel(CodeModel::Model CL);

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@ -25,6 +25,7 @@
#include "llvm/Target/TargetOptions.h" #include "llvm/Target/TargetOptions.h"
#include <functional> #include <functional>
#include <optional>
namespace llvm { namespace llvm {
@ -52,7 +53,7 @@ struct Config {
/// For adding passes that run right before codegen. /// For adding passes that run right before codegen.
std::function<void(legacy::PassManager &)> PreCodeGenPassesHook; std::function<void(legacy::PassManager &)> PreCodeGenPassesHook;
Optional<Reloc::Model> RelocModel = Reloc::PIC_; Optional<Reloc::Model> RelocModel = Reloc::PIC_;
Optional<CodeModel::Model> CodeModel = std::nullopt; std::optional<CodeModel::Model> CodeModel = std::nullopt;
CodeGenOpt::Level CGOptLevel = CodeGenOpt::Default; CodeGenOpt::Level CGOptLevel = CodeGenOpt::Default;
CodeGenFileType CGFileType = CGFT_ObjectFile; CodeGenFileType CGFileType = CGFT_ObjectFile;
unsigned OptLevel = 2; unsigned OptLevel = 2;

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@ -31,6 +31,7 @@
#include <cstddef> #include <cstddef>
#include <iterator> #include <iterator>
#include <memory> #include <memory>
#include <optional>
#include <string> #include <string>
namespace llvm { namespace llvm {
@ -167,7 +168,7 @@ public:
using TargetMachineCtorTy = TargetMachine using TargetMachineCtorTy = TargetMachine
*(*)(const Target &T, const Triple &TT, StringRef CPU, StringRef Features, *(*)(const Target &T, const Triple &TT, StringRef CPU, StringRef Features,
const TargetOptions &Options, Optional<Reloc::Model> RM, const TargetOptions &Options, Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT); std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT);
// If it weren't for layering issues (this header is in llvm/Support, but // If it weren't for layering issues (this header is in llvm/Support, but
// depends on MC?) this should take the Streamer by value rather than rvalue // depends on MC?) this should take the Streamer by value rather than rvalue
// reference. // reference.
@ -481,7 +482,7 @@ public:
TargetMachine * TargetMachine *
createTargetMachine(StringRef TT, StringRef CPU, StringRef Features, createTargetMachine(StringRef TT, StringRef CPU, StringRef Features,
const TargetOptions &Options, Optional<Reloc::Model> RM, const TargetOptions &Options, Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM = std::nullopt, std::optional<CodeModel::Model> CM = std::nullopt,
CodeGenOpt::Level OL = CodeGenOpt::Default, CodeGenOpt::Level OL = CodeGenOpt::Default,
bool JIT = false) const { bool JIT = false) const {
if (!TargetMachineCtorFn) if (!TargetMachineCtorFn)
@ -1358,10 +1359,12 @@ template <class TargetMachineImpl> struct RegisterTargetMachine {
} }
private: private:
static TargetMachine * static TargetMachine *Allocator(const Target &T, const Triple &TT,
Allocator(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, StringRef CPU, StringRef FS,
const TargetOptions &Options, Optional<Reloc::Model> RM, const TargetOptions &Options,
Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT) { Optional<Reloc::Model> RM,
std::optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT) {
return new TargetMachineImpl(T, TT, CPU, FS, Options, RM, CM, OL, JIT); return new TargetMachineImpl(T, TT, CPU, FS, Options, RM, CM, OL, JIT);
} }
}; };

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@ -19,10 +19,11 @@
#include "llvm/ADT/Optional.h" #include "llvm/ADT/Optional.h"
#include "llvm/Support/CodeGen.h" #include "llvm/Support/CodeGen.h"
#include "llvm/Support/ErrorHandling.h" #include "llvm/Support/ErrorHandling.h"
#include <optional>
namespace llvm { namespace llvm {
inline Optional<CodeModel::Model> unwrap(LLVMCodeModel Model, bool &JIT) { inline std::optional<CodeModel::Model> unwrap(LLVMCodeModel Model, bool &JIT) {
JIT = false; JIT = false;
switch (Model) { switch (Model) {
case LLVMCodeModelJITDefault: case LLVMCodeModelJITDefault:

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@ -23,6 +23,7 @@
#include "llvm/Support/PGOOptions.h" #include "llvm/Support/PGOOptions.h"
#include "llvm/Target/CGPassBuilderOption.h" #include "llvm/Target/CGPassBuilderOption.h"
#include "llvm/Target/TargetOptions.h" #include "llvm/Target/TargetOptions.h"
#include <optional>
#include <string> #include <string>
#include <utility> #include <utility>
@ -497,8 +498,9 @@ public:
/// CM does not have a value. The tiny and kernel models will produce /// CM does not have a value. The tiny and kernel models will produce
/// an error, so targets that support them or require more complex codemodel /// an error, so targets that support them or require more complex codemodel
/// selection logic should implement and call their own getEffectiveCodeModel. /// selection logic should implement and call their own getEffectiveCodeModel.
inline CodeModel::Model getEffectiveCodeModel(Optional<CodeModel::Model> CM, inline CodeModel::Model
CodeModel::Model Default) { getEffectiveCodeModel(std::optional<CodeModel::Model> CM,
CodeModel::Model Default) {
if (CM) { if (CM) {
// By default, targets do not support the tiny and kernel models. // By default, targets do not support the tiny and kernel models.
if (*CM == CodeModel::Tiny) if (*CM == CodeModel::Tiny)

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@ -23,6 +23,7 @@
#include "llvm/Support/CommandLine.h" #include "llvm/Support/CommandLine.h"
#include "llvm/Support/Host.h" #include "llvm/Support/Host.h"
#include "llvm/Support/MemoryBuffer.h" #include "llvm/Support/MemoryBuffer.h"
#include <optional>
using namespace llvm; using namespace llvm;
@ -50,12 +51,23 @@ using namespace llvm;
return None; \ return None; \
} }
// Temporary macro for incremental transition to std::optional.
#define CGSTDOPT_EXP(TY, NAME) \
CGOPT(TY, NAME) \
std::optional<TY> codegen::getExplicit##NAME() { \
if (NAME##View->getNumOccurrences()) { \
TY res = *NAME##View; \
return res; \
} \
return std::nullopt; \
}
CGOPT(std::string, MArch) CGOPT(std::string, MArch)
CGOPT(std::string, MCPU) CGOPT(std::string, MCPU)
CGLIST(std::string, MAttrs) CGLIST(std::string, MAttrs)
CGOPT_EXP(Reloc::Model, RelocModel) CGOPT_EXP(Reloc::Model, RelocModel)
CGOPT(ThreadModel::Model, ThreadModel) CGOPT(ThreadModel::Model, ThreadModel)
CGOPT_EXP(CodeModel::Model, CodeModel) CGSTDOPT_EXP(CodeModel::Model, CodeModel)
CGOPT(ExceptionHandling, ExceptionModel) CGOPT(ExceptionHandling, ExceptionModel)
CGOPT_EXP(CodeGenFileType, FileType) CGOPT_EXP(CodeGenFileType, FileType)
CGOPT(FramePointerKind, FramePointerUsage) CGOPT(FramePointerKind, FramePointerUsage)

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@ -21,6 +21,7 @@
#include "llvm/Target/CodeGenCWrappers.h" #include "llvm/Target/CodeGenCWrappers.h"
#include "llvm/Target/TargetOptions.h" #include "llvm/Target/TargetOptions.h"
#include <cstring> #include <cstring>
#include <optional>
using namespace llvm; using namespace llvm;
@ -199,7 +200,7 @@ LLVMBool LLVMCreateMCJITCompilerForModule(
.setOptLevel((CodeGenOpt::Level)options.OptLevel) .setOptLevel((CodeGenOpt::Level)options.OptLevel)
.setTargetOptions(targetOptions); .setTargetOptions(targetOptions);
bool JIT; bool JIT;
if (Optional<CodeModel::Model> CM = unwrap(options.CodeModel, JIT)) if (std::optional<CodeModel::Model> CM = unwrap(options.CodeModel, JIT))
builder.setCodeModel(*CM); builder.setCodeModel(*CM);
if (options.MCJMM) if (options.MCJMM)
builder.setMCJITMemoryManager( builder.setMCJITMemoryManager(

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@ -616,7 +616,7 @@ void Module::setPIELevel(PIELevel::Level PL) {
addModuleFlag(ModFlagBehavior::Max, "PIE Level", PL); addModuleFlag(ModFlagBehavior::Max, "PIE Level", PL);
} }
Optional<CodeModel::Model> Module::getCodeModel() const { std::optional<CodeModel::Model> Module::getCodeModel() const {
auto *Val = cast_or_null<ConstantAsMetadata>(getModuleFlag("Code Model")); auto *Val = cast_or_null<ConstantAsMetadata>(getModuleFlag("Code Model"));
if (!Val) if (!Val)

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@ -44,6 +44,7 @@
#include "llvm/Transforms/Scalar/LoopPassManager.h" #include "llvm/Transforms/Scalar/LoopPassManager.h"
#include "llvm/Transforms/Utils/FunctionImportUtils.h" #include "llvm/Transforms/Utils/FunctionImportUtils.h"
#include "llvm/Transforms/Utils/SplitModule.h" #include "llvm/Transforms/Utils/SplitModule.h"
#include <optional>
using namespace llvm; using namespace llvm;
using namespace lto; using namespace lto;
@ -214,7 +215,7 @@ createTargetMachine(const Config &Conf, const Target *TheTarget, Module &M) {
RelocModel = RelocModel =
M.getPICLevel() == PICLevel::NotPIC ? Reloc::Static : Reloc::PIC_; M.getPICLevel() == PICLevel::NotPIC ? Reloc::Static : Reloc::PIC_;
Optional<CodeModel::Model> CodeModel; std::optional<CodeModel::Model> CodeModel;
if (Conf.CodeModel) if (Conf.CodeModel)
CodeModel = *Conf.CodeModel; CodeModel = *Conf.CodeModel;
else else

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@ -288,8 +288,8 @@ static Reloc::Model getEffectiveRelocModel(const Triple &TT,
} }
static CodeModel::Model static CodeModel::Model
getEffectiveAArch64CodeModel(const Triple &TT, Optional<CodeModel::Model> CM, getEffectiveAArch64CodeModel(const Triple &TT,
bool JIT) { std::optional<CodeModel::Model> CM, bool JIT) {
if (CM) { if (CM) {
if (*CM != CodeModel::Small && *CM != CodeModel::Tiny && if (*CM != CodeModel::Small && *CM != CodeModel::Tiny &&
*CM != CodeModel::Large) { *CM != CodeModel::Large) {
@ -316,7 +316,7 @@ AArch64TargetMachine::AArch64TargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS, StringRef CPU, StringRef FS,
const TargetOptions &Options, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM, std::optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT, CodeGenOpt::Level OL, bool JIT,
bool LittleEndian) bool LittleEndian)
: LLVMTargetMachine(T, : LLVMTargetMachine(T,
@ -455,7 +455,7 @@ void AArch64leTargetMachine::anchor() { }
AArch64leTargetMachine::AArch64leTargetMachine( AArch64leTargetMachine::AArch64leTargetMachine(
const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const Target &T, const Triple &TT, StringRef CPU, StringRef FS,
const TargetOptions &Options, Optional<Reloc::Model> RM, const TargetOptions &Options, Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT) std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT)
: AArch64TargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, JIT, true) {} : AArch64TargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, JIT, true) {}
void AArch64beTargetMachine::anchor() { } void AArch64beTargetMachine::anchor() { }
@ -463,7 +463,7 @@ void AArch64beTargetMachine::anchor() { }
AArch64beTargetMachine::AArch64beTargetMachine( AArch64beTargetMachine::AArch64beTargetMachine(
const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const Target &T, const Triple &TT, StringRef CPU, StringRef FS,
const TargetOptions &Options, Optional<Reloc::Model> RM, const TargetOptions &Options, Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT) std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT)
: AArch64TargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, JIT, false) {} : AArch64TargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, JIT, false) {}
namespace { namespace {

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@ -17,6 +17,7 @@
#include "AArch64Subtarget.h" #include "AArch64Subtarget.h"
#include "llvm/IR/DataLayout.h" #include "llvm/IR/DataLayout.h"
#include "llvm/Target/TargetMachine.h" #include "llvm/Target/TargetMachine.h"
#include <optional>
namespace llvm { namespace llvm {
@ -28,8 +29,9 @@ protected:
public: public:
AArch64TargetMachine(const Target &T, const Triple &TT, StringRef CPU, AArch64TargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options, StringRef FS, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, Optional<Reloc::Model> RM,
CodeGenOpt::Level OL, bool JIT, bool IsLittleEndian); std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL,
bool JIT, bool IsLittleEndian);
~AArch64TargetMachine() override; ~AArch64TargetMachine() override;
const AArch64Subtarget *getSubtargetImpl(const Function &F) const override; const AArch64Subtarget *getSubtargetImpl(const Function &F) const override;
@ -69,24 +71,26 @@ private:
// //
class AArch64leTargetMachine : public AArch64TargetMachine { class AArch64leTargetMachine : public AArch64TargetMachine {
virtual void anchor(); virtual void anchor();
public: public:
AArch64leTargetMachine(const Target &T, const Triple &TT, StringRef CPU, AArch64leTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options, StringRef FS, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, std::optional<CodeModel::Model> CM,
bool JIT); CodeGenOpt::Level OL, bool JIT);
}; };
// AArch64 big endian target machine. // AArch64 big endian target machine.
// //
class AArch64beTargetMachine : public AArch64TargetMachine { class AArch64beTargetMachine : public AArch64TargetMachine {
virtual void anchor(); virtual void anchor();
public: public:
AArch64beTargetMachine(const Target &T, const Triple &TT, StringRef CPU, AArch64beTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options, StringRef FS, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, std::optional<CodeModel::Model> CM,
bool JIT); CodeGenOpt::Level OL, bool JIT);
}; };
} // end namespace llvm } // end namespace llvm

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@ -57,6 +57,7 @@
#include "llvm/Transforms/Utils.h" #include "llvm/Transforms/Utils.h"
#include "llvm/Transforms/Utils/SimplifyLibCalls.h" #include "llvm/Transforms/Utils/SimplifyLibCalls.h"
#include "llvm/Transforms/Vectorize.h" #include "llvm/Transforms/Vectorize.h"
#include <optional>
using namespace llvm; using namespace llvm;
using namespace llvm::PatternMatch; using namespace llvm::PatternMatch;
@ -531,7 +532,7 @@ AMDGPUTargetMachine::AMDGPUTargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS, StringRef CPU, StringRef FS,
TargetOptions Options, TargetOptions Options,
Optional<Reloc::Model> RM, Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM, std::optional<CodeModel::Model> CM,
CodeGenOpt::Level OptLevel) CodeGenOpt::Level OptLevel)
: LLVMTargetMachine(T, computeDataLayout(TT), TT, getGPUOrDefault(TT, CPU), : LLVMTargetMachine(T, computeDataLayout(TT), TT, getGPUOrDefault(TT, CPU),
FS, Options, getEffectiveRelocModel(RM), FS, Options, getEffectiveRelocModel(RM),
@ -801,7 +802,7 @@ GCNTargetMachine::GCNTargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS, StringRef CPU, StringRef FS,
TargetOptions Options, TargetOptions Options,
Optional<Reloc::Model> RM, Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM, std::optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT) CodeGenOpt::Level OL, bool JIT)
: AMDGPUTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL) {} : AMDGPUTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL) {}

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@ -17,6 +17,7 @@
#include "GCNSubtarget.h" #include "GCNSubtarget.h"
#include "llvm/CodeGen/TargetPassConfig.h" #include "llvm/CodeGen/TargetPassConfig.h"
#include "llvm/Target/TargetMachine.h" #include "llvm/Target/TargetMachine.h"
#include <optional>
#include <utility> #include <utility>
namespace llvm { namespace llvm {
@ -39,8 +40,8 @@ public:
AMDGPUTargetMachine(const Target &T, const Triple &TT, StringRef CPU, AMDGPUTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, TargetOptions Options, StringRef FS, TargetOptions Options,
Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, Optional<Reloc::Model> RM,
CodeGenOpt::Level OL); std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL);
~AMDGPUTargetMachine() override; ~AMDGPUTargetMachine() override;
const TargetSubtargetInfo *getSubtargetImpl() const; const TargetSubtargetInfo *getSubtargetImpl() const;
@ -77,8 +78,9 @@ private:
public: public:
GCNTargetMachine(const Target &T, const Triple &TT, StringRef CPU, GCNTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, TargetOptions Options, StringRef FS, TargetOptions Options,
Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, Optional<Reloc::Model> RM,
CodeGenOpt::Level OL, bool JIT); std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL,
bool JIT);
TargetPassConfig *createPassConfig(PassManagerBase &PM) override; TargetPassConfig *createPassConfig(PassManagerBase &PM) override;

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@ -18,6 +18,7 @@
#include "R600MachineScheduler.h" #include "R600MachineScheduler.h"
#include "R600TargetTransformInfo.h" #include "R600TargetTransformInfo.h"
#include "llvm/Transforms/Scalar.h" #include "llvm/Transforms/Scalar.h"
#include <optional>
using namespace llvm; using namespace llvm;
@ -51,7 +52,7 @@ R600TargetMachine::R600TargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS, StringRef CPU, StringRef FS,
TargetOptions Options, TargetOptions Options,
Optional<Reloc::Model> RM, Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM, std::optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT) CodeGenOpt::Level OL, bool JIT)
: AMDGPUTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL) { : AMDGPUTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL) {
setRequiresStructuredCFG(true); setRequiresStructuredCFG(true);

View File

@ -17,6 +17,7 @@
#include "AMDGPUTargetMachine.h" #include "AMDGPUTargetMachine.h"
#include "R600Subtarget.h" #include "R600Subtarget.h"
#include "llvm/Target/TargetMachine.h" #include "llvm/Target/TargetMachine.h"
#include <optional>
namespace llvm { namespace llvm {
@ -31,8 +32,9 @@ private:
public: public:
R600TargetMachine(const Target &T, const Triple &TT, StringRef CPU, R600TargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, TargetOptions Options, StringRef FS, TargetOptions Options,
Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, Optional<Reloc::Model> RM,
CodeGenOpt::Level OL, bool JIT); std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL,
bool JIT);
TargetPassConfig *createPassConfig(PassManagerBase &PM) override; TargetPassConfig *createPassConfig(PassManagerBase &PM) override;

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@ -17,6 +17,7 @@
#include "llvm/CodeGen/TargetLoweringObjectFileImpl.h" #include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"
#include "llvm/CodeGen/TargetPassConfig.h" #include "llvm/CodeGen/TargetPassConfig.h"
#include "llvm/MC/TargetRegistry.h" #include "llvm/MC/TargetRegistry.h"
#include <optional>
using namespace llvm; using namespace llvm;
@ -29,7 +30,7 @@ ARCTargetMachine::ARCTargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS, StringRef CPU, StringRef FS,
const TargetOptions &Options, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM, std::optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT) CodeGenOpt::Level OL, bool JIT)
: LLVMTargetMachine(T, : LLVMTargetMachine(T,
"e-m:e-p:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-" "e-m:e-p:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-"

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@ -15,6 +15,7 @@
#include "ARCSubtarget.h" #include "ARCSubtarget.h"
#include "llvm/Target/TargetMachine.h" #include "llvm/Target/TargetMachine.h"
#include <optional>
namespace llvm { namespace llvm {
@ -27,8 +28,9 @@ class ARCTargetMachine : public LLVMTargetMachine {
public: public:
ARCTargetMachine(const Target &T, const Triple &TT, StringRef CPU, ARCTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options, StringRef FS, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, Optional<Reloc::Model> RM,
CodeGenOpt::Level OL, bool JIT); std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL,
bool JIT);
~ARCTargetMachine() override; ~ARCTargetMachine() override;
const ARCSubtarget *getSubtargetImpl() const { return &Subtarget; } const ARCSubtarget *getSubtargetImpl() const { return &Subtarget; }

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@ -53,6 +53,7 @@
#include "llvm/Transforms/Scalar.h" #include "llvm/Transforms/Scalar.h"
#include <cassert> #include <cassert>
#include <memory> #include <memory>
#include <optional>
#include <string> #include <string>
using namespace llvm; using namespace llvm;
@ -217,7 +218,7 @@ ARMBaseTargetMachine::ARMBaseTargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS, StringRef CPU, StringRef FS,
const TargetOptions &Options, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM, std::optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool isLittle) CodeGenOpt::Level OL, bool isLittle)
: LLVMTargetMachine(T, computeDataLayout(TT, CPU, Options, isLittle), TT, : LLVMTargetMachine(T, computeDataLayout(TT, CPU, Options, isLittle), TT,
CPU, FS, Options, getEffectiveRelocModel(TT, RM), CPU, FS, Options, getEffectiveRelocModel(TT, RM),
@ -317,7 +318,7 @@ ARMLETargetMachine::ARMLETargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS, StringRef CPU, StringRef FS,
const TargetOptions &Options, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM, std::optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT) CodeGenOpt::Level OL, bool JIT)
: ARMBaseTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) {} : ARMBaseTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) {}
@ -325,7 +326,7 @@ ARMBETargetMachine::ARMBETargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS, StringRef CPU, StringRef FS,
const TargetOptions &Options, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM, std::optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT) CodeGenOpt::Level OL, bool JIT)
: ARMBaseTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {} : ARMBaseTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {}

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@ -21,6 +21,7 @@
#include "llvm/Support/CodeGen.h" #include "llvm/Support/CodeGen.h"
#include "llvm/Target/TargetMachine.h" #include "llvm/Target/TargetMachine.h"
#include <memory> #include <memory>
#include <optional>
namespace llvm { namespace llvm {
@ -41,8 +42,9 @@ protected:
public: public:
ARMBaseTargetMachine(const Target &T, const Triple &TT, StringRef CPU, ARMBaseTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options, StringRef FS, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, Optional<Reloc::Model> RM,
CodeGenOpt::Level OL, bool isLittle); std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL,
bool isLittle);
~ARMBaseTargetMachine() override; ~ARMBaseTargetMachine() override;
const ARMSubtarget *getSubtargetImpl(const Function &F) const override; const ARMSubtarget *getSubtargetImpl(const Function &F) const override;
@ -86,8 +88,9 @@ class ARMLETargetMachine : public ARMBaseTargetMachine {
public: public:
ARMLETargetMachine(const Target &T, const Triple &TT, StringRef CPU, ARMLETargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options, StringRef FS, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, Optional<Reloc::Model> RM,
CodeGenOpt::Level OL, bool JIT); std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL,
bool JIT);
}; };
/// ARM/Thumb big endian target machine. /// ARM/Thumb big endian target machine.
@ -96,8 +99,9 @@ class ARMBETargetMachine : public ARMBaseTargetMachine {
public: public:
ARMBETargetMachine(const Target &T, const Triple &TT, StringRef CPU, ARMBETargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options, StringRef FS, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, Optional<Reloc::Model> RM,
CodeGenOpt::Level OL, bool JIT); std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL,
bool JIT);
}; };
} // end namespace llvm } // end namespace llvm

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@ -23,6 +23,8 @@
#include "MCTargetDesc/AVRMCTargetDesc.h" #include "MCTargetDesc/AVRMCTargetDesc.h"
#include "TargetInfo/AVRTargetInfo.h" #include "TargetInfo/AVRTargetInfo.h"
#include <optional>
namespace llvm { namespace llvm {
static const char *AVRDataLayout = static const char *AVRDataLayout =
@ -45,7 +47,7 @@ AVRTargetMachine::AVRTargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS, StringRef CPU, StringRef FS,
const TargetOptions &Options, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM, std::optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT) CodeGenOpt::Level OL, bool JIT)
: LLVMTargetMachine(T, AVRDataLayout, TT, getCPU(CPU), FS, Options, : LLVMTargetMachine(T, AVRDataLayout, TT, getCPU(CPU), FS, Options,
getEffectiveRelocModel(RM), getEffectiveRelocModel(RM),

View File

@ -22,6 +22,8 @@
#include "AVRSelectionDAGInfo.h" #include "AVRSelectionDAGInfo.h"
#include "AVRSubtarget.h" #include "AVRSubtarget.h"
#include <optional>
namespace llvm { namespace llvm {
/// A generic AVR implementation. /// A generic AVR implementation.
@ -29,8 +31,9 @@ class AVRTargetMachine : public LLVMTargetMachine {
public: public:
AVRTargetMachine(const Target &T, const Triple &TT, StringRef CPU, AVRTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options, StringRef FS, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, Optional<Reloc::Model> RM,
CodeGenOpt::Level OL, bool JIT); std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL,
bool JIT);
const AVRSubtarget *getSubtargetImpl() const; const AVRSubtarget *getSubtargetImpl() const;
const AVRSubtarget *getSubtargetImpl(const Function &) const override; const AVRSubtarget *getSubtargetImpl(const Function &) const override;

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@ -27,6 +27,7 @@
#include "llvm/Transforms/Scalar.h" #include "llvm/Transforms/Scalar.h"
#include "llvm/Transforms/Scalar/SimplifyCFG.h" #include "llvm/Transforms/Scalar/SimplifyCFG.h"
#include "llvm/Transforms/Utils/SimplifyCFGOptions.h" #include "llvm/Transforms/Utils/SimplifyCFGOptions.h"
#include <optional>
using namespace llvm; using namespace llvm;
static cl:: static cl::
@ -65,7 +66,7 @@ BPFTargetMachine::BPFTargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS, StringRef CPU, StringRef FS,
const TargetOptions &Options, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM, std::optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT) CodeGenOpt::Level OL, bool JIT)
: LLVMTargetMachine(T, computeDataLayout(TT), TT, CPU, FS, Options, : LLVMTargetMachine(T, computeDataLayout(TT), TT, CPU, FS, Options,
getEffectiveRelocModel(RM), getEffectiveRelocModel(RM),

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@ -15,6 +15,7 @@
#include "BPFSubtarget.h" #include "BPFSubtarget.h"
#include "llvm/Target/TargetMachine.h" #include "llvm/Target/TargetMachine.h"
#include <optional>
namespace llvm { namespace llvm {
class BPFTargetMachine : public LLVMTargetMachine { class BPFTargetMachine : public LLVMTargetMachine {
@ -24,8 +25,9 @@ class BPFTargetMachine : public LLVMTargetMachine {
public: public:
BPFTargetMachine(const Target &T, const Triple &TT, StringRef CPU, BPFTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options, StringRef FS, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, Optional<Reloc::Model> RM,
CodeGenOpt::Level OL, bool JIT); std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL,
bool JIT);
const BPFSubtarget *getSubtargetImpl() const { return &Subtarget; } const BPFSubtarget *getSubtargetImpl() const { return &Subtarget; }
const BPFSubtarget *getSubtargetImpl(const Function &) const override { const BPFSubtarget *getSubtargetImpl(const Function &) const override {

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@ -20,6 +20,7 @@
#include "llvm/CodeGen/TargetPassConfig.h" #include "llvm/CodeGen/TargetPassConfig.h"
#include "llvm/CodeGen/TargetSubtargetInfo.h" #include "llvm/CodeGen/TargetSubtargetInfo.h"
#include "llvm/MC/TargetRegistry.h" #include "llvm/MC/TargetRegistry.h"
#include <optional>
using namespace llvm; using namespace llvm;
@ -49,7 +50,7 @@ CSKYTargetMachine::CSKYTargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS, StringRef CPU, StringRef FS,
const TargetOptions &Options, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM, std::optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT) CodeGenOpt::Level OL, bool JIT)
: LLVMTargetMachine(T, computeDataLayout(TT), TT, CPU, FS, Options, : LLVMTargetMachine(T, computeDataLayout(TT), TT, CPU, FS, Options,
RM.value_or(Reloc::Static), RM.value_or(Reloc::Static),

View File

@ -16,6 +16,7 @@
#include "CSKYSubtarget.h" #include "CSKYSubtarget.h"
#include "llvm/IR/DataLayout.h" #include "llvm/IR/DataLayout.h"
#include "llvm/Target/TargetMachine.h" #include "llvm/Target/TargetMachine.h"
#include <optional>
namespace llvm { namespace llvm {
@ -26,8 +27,9 @@ class CSKYTargetMachine : public LLVMTargetMachine {
public: public:
CSKYTargetMachine(const Target &T, const Triple &TT, StringRef CPU, CSKYTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options, StringRef FS, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, Optional<Reloc::Model> RM,
CodeGenOpt::Level OL, bool JIT); std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL,
bool JIT);
TargetPassConfig *createPassConfig(PassManagerBase &PM) override; TargetPassConfig *createPassConfig(PassManagerBase &PM) override;

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@ -32,6 +32,7 @@
#include "llvm/Support/Compiler.h" #include "llvm/Support/Compiler.h"
#include "llvm/Support/ErrorHandling.h" #include "llvm/Support/ErrorHandling.h"
#include "llvm/Target/TargetLoweringObjectFile.h" #include "llvm/Target/TargetLoweringObjectFile.h"
#include <optional>
using namespace llvm; using namespace llvm;
@ -83,7 +84,7 @@ DirectXTargetMachine::DirectXTargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS, StringRef CPU, StringRef FS,
const TargetOptions &Options, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM, std::optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT) CodeGenOpt::Level OL, bool JIT)
: LLVMTargetMachine(T, : LLVMTargetMachine(T,
"e-m:e-p:32:32-i1:32-i8:8-i16:16-i32:32-i64:64-f16:16-" "e-m:e-p:32:32-i1:32-i8:8-i16:16-i32:32-i64:64-f16:16-"

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@ -13,6 +13,7 @@
#include "DirectXSubtarget.h" #include "DirectXSubtarget.h"
#include "llvm/Target/TargetMachine.h" #include "llvm/Target/TargetMachine.h"
#include <optional>
namespace llvm { namespace llvm {
class Function; class Function;
@ -23,8 +24,9 @@ class DirectXTargetMachine : public LLVMTargetMachine {
public: public:
DirectXTargetMachine(const Target &T, const Triple &TT, StringRef CPU, DirectXTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options, StringRef FS, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, Optional<Reloc::Model> RM,
CodeGenOpt::Level OL, bool JIT); std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL,
bool JIT);
~DirectXTargetMachine() override; ~DirectXTargetMachine() override;

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@ -28,6 +28,7 @@
#include "llvm/Passes/PassBuilder.h" #include "llvm/Passes/PassBuilder.h"
#include "llvm/Support/CommandLine.h" #include "llvm/Support/CommandLine.h"
#include "llvm/Transforms/Scalar.h" #include "llvm/Transforms/Scalar.h"
#include <optional>
using namespace llvm; using namespace llvm;
@ -223,7 +224,7 @@ HexagonTargetMachine::HexagonTargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS, StringRef CPU, StringRef FS,
const TargetOptions &Options, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM, std::optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT) CodeGenOpt::Level OL, bool JIT)
// Specify the vector alignment explicitly. For v512x1, the calculated // Specify the vector alignment explicitly. For v512x1, the calculated
// alignment would be 512*alignment(i1), which is 512 bytes, instead of // alignment would be 512*alignment(i1), which is 512 bytes, instead of

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@ -17,6 +17,7 @@
#include "HexagonSubtarget.h" #include "HexagonSubtarget.h"
#include "HexagonTargetObjectFile.h" #include "HexagonTargetObjectFile.h"
#include "llvm/Target/TargetMachine.h" #include "llvm/Target/TargetMachine.h"
#include <optional>
namespace llvm { namespace llvm {
@ -29,8 +30,9 @@ class HexagonTargetMachine : public LLVMTargetMachine {
public: public:
HexagonTargetMachine(const Target &T, const Triple &TT, StringRef CPU, HexagonTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options, StringRef FS, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, Optional<Reloc::Model> RM,
CodeGenOpt::Level OL, bool JIT); std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL,
bool JIT);
~HexagonTargetMachine() override; ~HexagonTargetMachine() override;
const HexagonSubtarget *getSubtargetImpl(const Function &F) const override; const HexagonSubtarget *getSubtargetImpl(const Function &F) const override;

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@ -23,6 +23,7 @@
#include "llvm/MC/TargetRegistry.h" #include "llvm/MC/TargetRegistry.h"
#include "llvm/Support/FormattedStream.h" #include "llvm/Support/FormattedStream.h"
#include "llvm/Target/TargetOptions.h" #include "llvm/Target/TargetOptions.h"
#include <optional>
using namespace llvm; using namespace llvm;
@ -51,12 +52,11 @@ static Reloc::Model getEffectiveRelocModel(Optional<Reloc::Model> RM) {
return RM.value_or(Reloc::PIC_); return RM.value_or(Reloc::PIC_);
} }
LanaiTargetMachine::LanaiTargetMachine(const Target &T, const Triple &TT, LanaiTargetMachine::LanaiTargetMachine(
StringRef Cpu, StringRef FeatureString, const Target &T, const Triple &TT, StringRef Cpu, StringRef FeatureString,
const TargetOptions &Options, const TargetOptions &Options, Optional<Reloc::Model> RM,
Optional<Reloc::Model> RM, std::optional<CodeModel::Model> CodeModel, CodeGenOpt::Level OptLevel,
Optional<CodeModel::Model> CodeModel, bool JIT)
CodeGenOpt::Level OptLevel, bool JIT)
: LLVMTargetMachine(T, computeDataLayout(), TT, Cpu, FeatureString, Options, : LLVMTargetMachine(T, computeDataLayout(), TT, Cpu, FeatureString, Options,
getEffectiveRelocModel(RM), getEffectiveRelocModel(RM),
getEffectiveCodeModel(CodeModel, CodeModel::Medium), getEffectiveCodeModel(CodeModel, CodeModel::Medium),

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@ -18,6 +18,7 @@
#include "LanaiSelectionDAGInfo.h" #include "LanaiSelectionDAGInfo.h"
#include "LanaiSubtarget.h" #include "LanaiSubtarget.h"
#include "llvm/Target/TargetMachine.h" #include "llvm/Target/TargetMachine.h"
#include <optional>
namespace llvm { namespace llvm {
@ -30,7 +31,7 @@ public:
StringRef Cpu, StringRef FeatureString, StringRef Cpu, StringRef FeatureString,
const TargetOptions &Options, const TargetOptions &Options,
Optional<Reloc::Model> RelocationModel, Optional<Reloc::Model> RelocationModel,
Optional<CodeModel::Model> CodeModel, std::optional<CodeModel::Model> CodeModel,
CodeGenOpt::Level OptLevel, bool JIT); CodeGenOpt::Level OptLevel, bool JIT);
const LanaiSubtarget * const LanaiSubtarget *

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@ -18,6 +18,7 @@
#include "llvm/CodeGen/TargetLoweringObjectFileImpl.h" #include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"
#include "llvm/CodeGen/TargetPassConfig.h" #include "llvm/CodeGen/TargetPassConfig.h"
#include "llvm/MC/TargetRegistry.h" #include "llvm/MC/TargetRegistry.h"
#include <optional>
using namespace llvm; using namespace llvm;
@ -46,7 +47,7 @@ static Reloc::Model getEffectiveRelocModel(const Triple &TT,
LoongArchTargetMachine::LoongArchTargetMachine( LoongArchTargetMachine::LoongArchTargetMachine(
const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const Target &T, const Triple &TT, StringRef CPU, StringRef FS,
const TargetOptions &Options, Optional<Reloc::Model> RM, const TargetOptions &Options, Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT) std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT)
: LLVMTargetMachine(T, computeDataLayout(TT), TT, CPU, FS, Options, : LLVMTargetMachine(T, computeDataLayout(TT), TT, CPU, FS, Options,
getEffectiveRelocModel(TT, RM), getEffectiveRelocModel(TT, RM),
getEffectiveCodeModel(CM, CodeModel::Small), OL), getEffectiveCodeModel(CM, CodeModel::Small), OL),

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@ -15,6 +15,7 @@
#include "LoongArchSubtarget.h" #include "LoongArchSubtarget.h"
#include "llvm/Target/TargetMachine.h" #include "llvm/Target/TargetMachine.h"
#include <optional>
namespace llvm { namespace llvm {
@ -26,8 +27,8 @@ public:
LoongArchTargetMachine(const Target &T, const Triple &TT, StringRef CPU, LoongArchTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options, StringRef FS, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, std::optional<CodeModel::Model> CM,
bool JIT); CodeGenOpt::Level OL, bool JIT);
~LoongArchTargetMachine() override; ~LoongArchTargetMachine() override;
const LoongArchSubtarget *getSubtargetImpl(const Function &F) const override; const LoongArchSubtarget *getSubtargetImpl(const Function &F) const override;

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@ -27,6 +27,7 @@
#include "llvm/MC/TargetRegistry.h" #include "llvm/MC/TargetRegistry.h"
#include "llvm/PassRegistry.h" #include "llvm/PassRegistry.h"
#include <memory> #include <memory>
#include <optional>
using namespace llvm; using namespace llvm;
@ -78,7 +79,7 @@ Reloc::Model getEffectiveRelocModel(const Triple &TT,
return *RM; return *RM;
} }
CodeModel::Model getEffectiveCodeModel(Optional<CodeModel::Model> CM, CodeModel::Model getEffectiveCodeModel(std::optional<CodeModel::Model> CM,
bool JIT) { bool JIT) {
if (!CM) { if (!CM) {
return CodeModel::Small; return CodeModel::Small;
@ -95,7 +96,7 @@ M68kTargetMachine::M68kTargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS, StringRef CPU, StringRef FS,
const TargetOptions &Options, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM, std::optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT) CodeGenOpt::Level OL, bool JIT)
: LLVMTargetMachine(T, computeDataLayout(TT, CPU, Options), TT, CPU, FS, : LLVMTargetMachine(T, computeDataLayout(TT, CPU, Options), TT, CPU, FS,
Options, getEffectiveRelocModel(TT, RM), Options, getEffectiveRelocModel(TT, RM),

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@ -22,6 +22,8 @@
#include "llvm/CodeGen/TargetFrameLowering.h" #include "llvm/CodeGen/TargetFrameLowering.h"
#include "llvm/Target/TargetMachine.h" #include "llvm/Target/TargetMachine.h"
#include <optional>
namespace llvm { namespace llvm {
class formatted_raw_ostream; class formatted_raw_ostream;
class M68kRegisterInfo; class M68kRegisterInfo;
@ -35,8 +37,9 @@ class M68kTargetMachine : public LLVMTargetMachine {
public: public:
M68kTargetMachine(const Target &T, const Triple &TT, StringRef CPU, M68kTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options, StringRef FS, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, Optional<Reloc::Model> RM,
CodeGenOpt::Level OL, bool JIT); std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL,
bool JIT);
~M68kTargetMachine() override; ~M68kTargetMachine() override;

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@ -19,6 +19,7 @@
#include "llvm/IR/LegacyPassManager.h" #include "llvm/IR/LegacyPassManager.h"
#include "llvm/MC/MCAsmInfo.h" #include "llvm/MC/MCAsmInfo.h"
#include "llvm/MC/TargetRegistry.h" #include "llvm/MC/TargetRegistry.h"
#include <optional>
using namespace llvm; using namespace llvm;
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeMSP430Target() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeMSP430Target() {
@ -39,7 +40,7 @@ MSP430TargetMachine::MSP430TargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS, StringRef CPU, StringRef FS,
const TargetOptions &Options, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM, std::optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT) CodeGenOpt::Level OL, bool JIT)
: LLVMTargetMachine(T, computeDataLayout(TT, CPU, Options), TT, CPU, FS, : LLVMTargetMachine(T, computeDataLayout(TT, CPU, Options), TT, CPU, FS,
Options, getEffectiveRelocModel(RM), Options, getEffectiveRelocModel(RM),

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@ -16,6 +16,7 @@
#include "MSP430Subtarget.h" #include "MSP430Subtarget.h"
#include "llvm/Target/TargetMachine.h" #include "llvm/Target/TargetMachine.h"
#include <optional>
namespace llvm { namespace llvm {
class StringRef; class StringRef;
@ -24,13 +25,14 @@ class StringRef;
/// ///
class MSP430TargetMachine : public LLVMTargetMachine { class MSP430TargetMachine : public LLVMTargetMachine {
std::unique_ptr<TargetLoweringObjectFile> TLOF; std::unique_ptr<TargetLoweringObjectFile> TLOF;
MSP430Subtarget Subtarget; MSP430Subtarget Subtarget;
public: public:
MSP430TargetMachine(const Target &T, const Triple &TT, StringRef CPU, MSP430TargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options, StringRef FS, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, Optional<Reloc::Model> RM,
CodeGenOpt::Level OL, bool JIT); std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL,
bool JIT);
~MSP430TargetMachine() override; ~MSP430TargetMachine() override;
const MSP430Subtarget *getSubtargetImpl(const Function &F) const override { const MSP430Subtarget *getSubtargetImpl(const Function &F) const override {

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@ -41,6 +41,7 @@
#include "llvm/Support/Debug.h" #include "llvm/Support/Debug.h"
#include "llvm/Support/raw_ostream.h" #include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetOptions.h" #include "llvm/Target/TargetOptions.h"
#include <optional>
#include <string> #include <string>
using namespace llvm; using namespace llvm;
@ -120,7 +121,7 @@ MipsTargetMachine::MipsTargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS, StringRef CPU, StringRef FS,
const TargetOptions &Options, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM, std::optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT, CodeGenOpt::Level OL, bool JIT,
bool isLittle) bool isLittle)
: LLVMTargetMachine(T, computeDataLayout(TT, CPU, Options, isLittle), TT, : LLVMTargetMachine(T, computeDataLayout(TT, CPU, Options, isLittle), TT,
@ -149,7 +150,7 @@ MipsebTargetMachine::MipsebTargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS, StringRef CPU, StringRef FS,
const TargetOptions &Options, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM, std::optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT) CodeGenOpt::Level OL, bool JIT)
: MipsTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, JIT, false) {} : MipsTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, JIT, false) {}
@ -159,7 +160,7 @@ MipselTargetMachine::MipselTargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS, StringRef CPU, StringRef FS,
const TargetOptions &Options, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM, std::optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT) CodeGenOpt::Level OL, bool JIT)
: MipsTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, JIT, true) {} : MipsTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, JIT, true) {}

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@ -21,6 +21,7 @@
#include "llvm/Support/CodeGen.h" #include "llvm/Support/CodeGen.h"
#include "llvm/Target/TargetMachine.h" #include "llvm/Target/TargetMachine.h"
#include <memory> #include <memory>
#include <optional>
namespace llvm { namespace llvm {
@ -39,8 +40,9 @@ class MipsTargetMachine : public LLVMTargetMachine {
public: public:
MipsTargetMachine(const Target &T, const Triple &TT, StringRef CPU, MipsTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options, StringRef FS, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, Optional<Reloc::Model> RM,
CodeGenOpt::Level OL, bool JIT, bool isLittle); std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL,
bool JIT, bool isLittle);
~MipsTargetMachine() override; ~MipsTargetMachine() override;
TargetTransformInfo getTargetTransformInfo(const Function &F) const override; TargetTransformInfo getTargetTransformInfo(const Function &F) const override;
@ -83,8 +85,9 @@ class MipsebTargetMachine : public MipsTargetMachine {
public: public:
MipsebTargetMachine(const Target &T, const Triple &TT, StringRef CPU, MipsebTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options, StringRef FS, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, Optional<Reloc::Model> RM,
CodeGenOpt::Level OL, bool JIT); std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL,
bool JIT);
}; };
/// Mips32/64 little endian target machine. /// Mips32/64 little endian target machine.
@ -95,8 +98,9 @@ class MipselTargetMachine : public MipsTargetMachine {
public: public:
MipselTargetMachine(const Target &T, const Triple &TT, StringRef CPU, MipselTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options, StringRef FS, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, Optional<Reloc::Model> RM,
CodeGenOpt::Level OL, bool JIT); std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL,
bool JIT);
}; };
} // end namespace llvm } // end namespace llvm

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@ -35,6 +35,7 @@
#include "llvm/Transforms/Scalar/GVN.h" #include "llvm/Transforms/Scalar/GVN.h"
#include "llvm/Transforms/Vectorize.h" #include "llvm/Transforms/Vectorize.h"
#include <cassert> #include <cassert>
#include <optional>
#include <string> #include <string>
using namespace llvm; using namespace llvm;
@ -112,7 +113,7 @@ NVPTXTargetMachine::NVPTXTargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS, StringRef CPU, StringRef FS,
const TargetOptions &Options, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM, std::optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool is64bit) CodeGenOpt::Level OL, bool is64bit)
// The pic relocation model is used regardless of what the client has // The pic relocation model is used regardless of what the client has
// specified, as it is the only relocation model currently supported. // specified, as it is the only relocation model currently supported.
@ -139,7 +140,7 @@ NVPTXTargetMachine32::NVPTXTargetMachine32(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS, StringRef CPU, StringRef FS,
const TargetOptions &Options, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM, std::optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT) CodeGenOpt::Level OL, bool JIT)
: NVPTXTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {} : NVPTXTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {}
@ -149,7 +150,7 @@ NVPTXTargetMachine64::NVPTXTargetMachine64(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS, StringRef CPU, StringRef FS,
const TargetOptions &Options, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM, std::optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT) CodeGenOpt::Level OL, bool JIT)
: NVPTXTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) {} : NVPTXTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) {}

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@ -16,6 +16,7 @@
#include "ManagedStringPool.h" #include "ManagedStringPool.h"
#include "NVPTXSubtarget.h" #include "NVPTXSubtarget.h"
#include "llvm/Target/TargetMachine.h" #include "llvm/Target/TargetMachine.h"
#include <optional>
#include <utility> #include <utility>
namespace llvm { namespace llvm {
@ -36,9 +37,9 @@ class NVPTXTargetMachine : public LLVMTargetMachine {
public: public:
NVPTXTargetMachine(const Target &T, const Triple &TT, StringRef CPU, NVPTXTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options, StringRef FS, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, Optional<Reloc::Model> RM,
CodeGenOpt::Level OP, bool is64bit); std::optional<CodeModel::Model> CM, CodeGenOpt::Level OP,
bool is64bit);
~NVPTXTargetMachine() override; ~NVPTXTargetMachine() override;
const NVPTXSubtarget *getSubtargetImpl(const Function &) const override { const NVPTXSubtarget *getSubtargetImpl(const Function &) const override {
return &Subtarget; return &Subtarget;
@ -76,20 +77,24 @@ public:
class NVPTXTargetMachine32 : public NVPTXTargetMachine { class NVPTXTargetMachine32 : public NVPTXTargetMachine {
virtual void anchor(); virtual void anchor();
public: public:
NVPTXTargetMachine32(const Target &T, const Triple &TT, StringRef CPU, NVPTXTargetMachine32(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options, StringRef FS, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, Optional<Reloc::Model> RM,
CodeGenOpt::Level OL, bool JIT); std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL,
bool JIT);
}; };
class NVPTXTargetMachine64 : public NVPTXTargetMachine { class NVPTXTargetMachine64 : public NVPTXTargetMachine {
virtual void anchor(); virtual void anchor();
public: public:
NVPTXTargetMachine64(const Target &T, const Triple &TT, StringRef CPU, NVPTXTargetMachine64(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options, StringRef FS, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, Optional<Reloc::Model> RM,
CodeGenOpt::Level OL, bool JIT); std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL,
bool JIT);
}; };
} // end namespace llvm } // end namespace llvm

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@ -46,6 +46,7 @@
#include "llvm/Transforms/Scalar.h" #include "llvm/Transforms/Scalar.h"
#include <cassert> #include <cassert>
#include <memory> #include <memory>
#include <optional>
#include <string> #include <string>
using namespace llvm; using namespace llvm;
@ -260,9 +261,9 @@ static Reloc::Model getEffectiveRelocModel(const Triple &TT,
return Reloc::Static; return Reloc::Static;
} }
static CodeModel::Model getEffectivePPCCodeModel(const Triple &TT, static CodeModel::Model
Optional<CodeModel::Model> CM, getEffectivePPCCodeModel(const Triple &TT, std::optional<CodeModel::Model> CM,
bool JIT) { bool JIT) {
if (CM) { if (CM) {
if (*CM == CodeModel::Tiny) if (*CM == CodeModel::Tiny)
report_fatal_error("Target does not support the tiny CodeModel", false); report_fatal_error("Target does not support the tiny CodeModel", false);
@ -325,7 +326,7 @@ PPCTargetMachine::PPCTargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS, StringRef CPU, StringRef FS,
const TargetOptions &Options, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM, std::optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT) CodeGenOpt::Level OL, bool JIT)
: LLVMTargetMachine(T, getDataLayoutString(TT), TT, CPU, : LLVMTargetMachine(T, getDataLayoutString(TT), TT, CPU,
computeFSAdditions(FS, OL, TT), Options, computeFSAdditions(FS, OL, TT), Options,

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@ -17,6 +17,7 @@
#include "PPCSubtarget.h" #include "PPCSubtarget.h"
#include "llvm/IR/DataLayout.h" #include "llvm/IR/DataLayout.h"
#include "llvm/Target/TargetMachine.h" #include "llvm/Target/TargetMachine.h"
#include <optional>
namespace llvm { namespace llvm {
@ -37,8 +38,9 @@ private:
public: public:
PPCTargetMachine(const Target &T, const Triple &TT, StringRef CPU, PPCTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options, StringRef FS, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, Optional<Reloc::Model> RM,
CodeGenOpt::Level OL, bool JIT); std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL,
bool JIT);
~PPCTargetMachine() override; ~PPCTargetMachine() override;

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@ -35,6 +35,7 @@
#include "llvm/Support/FormattedStream.h" #include "llvm/Support/FormattedStream.h"
#include "llvm/Target/TargetOptions.h" #include "llvm/Target/TargetOptions.h"
#include "llvm/Transforms/IPO.h" #include "llvm/Transforms/IPO.h"
#include <optional>
using namespace llvm; using namespace llvm;
static cl::opt<bool> EnableRedundantCopyElimination( static cl::opt<bool> EnableRedundantCopyElimination(
@ -83,7 +84,7 @@ RISCVTargetMachine::RISCVTargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS, StringRef CPU, StringRef FS,
const TargetOptions &Options, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM, std::optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT) CodeGenOpt::Level OL, bool JIT)
: LLVMTargetMachine(T, computeDataLayout(TT), TT, CPU, FS, Options, : LLVMTargetMachine(T, computeDataLayout(TT), TT, CPU, FS, Options,
getEffectiveRelocModel(TT, RM), getEffectiveRelocModel(TT, RM),

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@ -18,6 +18,7 @@
#include "llvm/CodeGen/SelectionDAGTargetInfo.h" #include "llvm/CodeGen/SelectionDAGTargetInfo.h"
#include "llvm/IR/DataLayout.h" #include "llvm/IR/DataLayout.h"
#include "llvm/Target/TargetMachine.h" #include "llvm/Target/TargetMachine.h"
#include <optional>
namespace llvm { namespace llvm {
class RISCVTargetMachine : public LLVMTargetMachine { class RISCVTargetMachine : public LLVMTargetMachine {
@ -27,8 +28,9 @@ class RISCVTargetMachine : public LLVMTargetMachine {
public: public:
RISCVTargetMachine(const Target &T, const Triple &TT, StringRef CPU, RISCVTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options, StringRef FS, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, Optional<Reloc::Model> RM,
CodeGenOpt::Level OL, bool JIT); std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL,
bool JIT);
const RISCVSubtarget *getSubtargetImpl(const Function &F) const override; const RISCVSubtarget *getSubtargetImpl(const Function &F) const override;
// DO NOT IMPLEMENT: There is no such thing as a valid default subtarget, // DO NOT IMPLEMENT: There is no such thing as a valid default subtarget,

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@ -30,6 +30,7 @@
#include "llvm/MC/TargetRegistry.h" #include "llvm/MC/TargetRegistry.h"
#include "llvm/Pass.h" #include "llvm/Pass.h"
#include "llvm/Target/TargetOptions.h" #include "llvm/Target/TargetOptions.h"
#include <optional>
using namespace llvm; using namespace llvm;
@ -65,7 +66,7 @@ SPIRVTargetMachine::SPIRVTargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS, StringRef CPU, StringRef FS,
const TargetOptions &Options, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM, std::optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT) CodeGenOpt::Level OL, bool JIT)
: LLVMTargetMachine(T, computeDataLayout(TT), TT, CPU, FS, Options, : LLVMTargetMachine(T, computeDataLayout(TT), TT, CPU, FS, Options,
getEffectiveRelocModel(RM), getEffectiveRelocModel(RM),

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@ -15,6 +15,7 @@
#include "SPIRVSubtarget.h" #include "SPIRVSubtarget.h"
#include "llvm/Target/TargetMachine.h" #include "llvm/Target/TargetMachine.h"
#include <optional>
namespace llvm { namespace llvm {
class SPIRVTargetMachine : public LLVMTargetMachine { class SPIRVTargetMachine : public LLVMTargetMachine {
@ -24,8 +25,9 @@ class SPIRVTargetMachine : public LLVMTargetMachine {
public: public:
SPIRVTargetMachine(const Target &T, const Triple &TT, StringRef CPU, SPIRVTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options, StringRef FS, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, Optional<Reloc::Model> RM,
CodeGenOpt::Level OL, bool JIT); std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL,
bool JIT);
const SPIRVSubtarget *getSubtargetImpl() const { return &Subtarget; } const SPIRVSubtarget *getSubtargetImpl() const { return &Subtarget; }

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@ -18,6 +18,7 @@
#include "llvm/CodeGen/TargetPassConfig.h" #include "llvm/CodeGen/TargetPassConfig.h"
#include "llvm/IR/LegacyPassManager.h" #include "llvm/IR/LegacyPassManager.h"
#include "llvm/MC/TargetRegistry.h" #include "llvm/MC/TargetRegistry.h"
#include <optional>
using namespace llvm; using namespace llvm;
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeSparcTarget() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeSparcTarget() {
@ -69,7 +70,7 @@ static Reloc::Model getEffectiveRelocModel(Optional<Reloc::Model> RM) {
// //
// All code models require that the text segment is smaller than 2GB. // All code models require that the text segment is smaller than 2GB.
static CodeModel::Model static CodeModel::Model
getEffectiveSparcCodeModel(Optional<CodeModel::Model> CM, Reloc::Model RM, getEffectiveSparcCodeModel(std::optional<CodeModel::Model> CM, Reloc::Model RM,
bool Is64Bit, bool JIT) { bool Is64Bit, bool JIT) {
if (CM) { if (CM) {
if (*CM == CodeModel::Tiny) if (*CM == CodeModel::Tiny)
@ -87,10 +88,13 @@ getEffectiveSparcCodeModel(Optional<CodeModel::Model> CM, Reloc::Model RM,
} }
/// Create an ILP32 architecture model /// Create an ILP32 architecture model
SparcTargetMachine::SparcTargetMachine( SparcTargetMachine::SparcTargetMachine(const Target &T, const Triple &TT,
const Target &T, const Triple &TT, StringRef CPU, StringRef FS, StringRef CPU, StringRef FS,
const TargetOptions &Options, Optional<Reloc::Model> RM, const TargetOptions &Options,
Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT, bool is64bit) Optional<Reloc::Model> RM,
std::optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT,
bool is64bit)
: LLVMTargetMachine(T, computeDataLayout(TT, is64bit), TT, CPU, FS, Options, : LLVMTargetMachine(T, computeDataLayout(TT, is64bit), TT, CPU, FS, Options,
getEffectiveRelocModel(RM), getEffectiveRelocModel(RM),
getEffectiveSparcCodeModel( getEffectiveSparcCodeModel(
@ -188,7 +192,7 @@ SparcV8TargetMachine::SparcV8TargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS, StringRef CPU, StringRef FS,
const TargetOptions &Options, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM, std::optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT) CodeGenOpt::Level OL, bool JIT)
: SparcTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, JIT, false) {} : SparcTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, JIT, false) {}
@ -198,7 +202,7 @@ SparcV9TargetMachine::SparcV9TargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS, StringRef CPU, StringRef FS,
const TargetOptions &Options, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM, std::optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT) CodeGenOpt::Level OL, bool JIT)
: SparcTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, JIT, true) {} : SparcTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, JIT, true) {}
@ -208,6 +212,6 @@ SparcelTargetMachine::SparcelTargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS, StringRef CPU, StringRef FS,
const TargetOptions &Options, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM, std::optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT) CodeGenOpt::Level OL, bool JIT)
: SparcTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, JIT, false) {} : SparcTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, JIT, false) {}

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@ -16,6 +16,7 @@
#include "SparcInstrInfo.h" #include "SparcInstrInfo.h"
#include "SparcSubtarget.h" #include "SparcSubtarget.h"
#include "llvm/Target/TargetMachine.h" #include "llvm/Target/TargetMachine.h"
#include <optional>
namespace llvm { namespace llvm {
@ -24,11 +25,13 @@ class SparcTargetMachine : public LLVMTargetMachine {
SparcSubtarget Subtarget; SparcSubtarget Subtarget;
bool is64Bit; bool is64Bit;
mutable StringMap<std::unique_ptr<SparcSubtarget>> SubtargetMap; mutable StringMap<std::unique_ptr<SparcSubtarget>> SubtargetMap;
public: public:
SparcTargetMachine(const Target &T, const Triple &TT, StringRef CPU, SparcTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options, StringRef FS, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, Optional<Reloc::Model> RM,
CodeGenOpt::Level OL, bool JIT, bool is64bit); std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL,
bool JIT, bool is64bit);
~SparcTargetMachine() override; ~SparcTargetMachine() override;
const SparcSubtarget *getSubtargetImpl() const { return &Subtarget; } const SparcSubtarget *getSubtargetImpl() const { return &Subtarget; }
@ -45,22 +48,26 @@ public:
/// ///
class SparcV8TargetMachine : public SparcTargetMachine { class SparcV8TargetMachine : public SparcTargetMachine {
virtual void anchor(); virtual void anchor();
public: public:
SparcV8TargetMachine(const Target &T, const Triple &TT, StringRef CPU, SparcV8TargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options, StringRef FS, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, Optional<Reloc::Model> RM,
CodeGenOpt::Level OL, bool JIT); std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL,
bool JIT);
}; };
/// Sparc 64-bit target machine /// Sparc 64-bit target machine
/// ///
class SparcV9TargetMachine : public SparcTargetMachine { class SparcV9TargetMachine : public SparcTargetMachine {
virtual void anchor(); virtual void anchor();
public: public:
SparcV9TargetMachine(const Target &T, const Triple &TT, StringRef CPU, SparcV9TargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options, StringRef FS, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, Optional<Reloc::Model> RM,
CodeGenOpt::Level OL, bool JIT); std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL,
bool JIT);
}; };
class SparcelTargetMachine : public SparcTargetMachine { class SparcelTargetMachine : public SparcTargetMachine {
@ -69,8 +76,9 @@ class SparcelTargetMachine : public SparcTargetMachine {
public: public:
SparcelTargetMachine(const Target &T, const Triple &TT, StringRef CPU, SparcelTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options, StringRef FS, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, Optional<Reloc::Model> RM,
CodeGenOpt::Level OL, bool JIT); std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL,
bool JIT);
}; };
} // end namespace llvm } // end namespace llvm

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@ -25,6 +25,7 @@
#include "llvm/Support/CodeGen.h" #include "llvm/Support/CodeGen.h"
#include "llvm/Target/TargetLoweringObjectFile.h" #include "llvm/Target/TargetLoweringObjectFile.h"
#include "llvm/Transforms/Scalar.h" #include "llvm/Transforms/Scalar.h"
#include <optional>
#include <string> #include <string>
using namespace llvm; using namespace llvm;
@ -122,8 +123,8 @@ static Reloc::Model getEffectiveRelocModel(Optional<Reloc::Model> RM) {
// of copy relocs, so locally-binding data symbols might not be in // of copy relocs, so locally-binding data symbols might not be in
// the range of LARL. We need the Medium model in that case. // the range of LARL. We need the Medium model in that case.
static CodeModel::Model static CodeModel::Model
getEffectiveSystemZCodeModel(Optional<CodeModel::Model> CM, Reloc::Model RM, getEffectiveSystemZCodeModel(std::optional<CodeModel::Model> CM,
bool JIT) { Reloc::Model RM, bool JIT) {
if (CM) { if (CM) {
if (*CM == CodeModel::Tiny) if (*CM == CodeModel::Tiny)
report_fatal_error("Target does not support the tiny CodeModel", false); report_fatal_error("Target does not support the tiny CodeModel", false);
@ -140,7 +141,7 @@ SystemZTargetMachine::SystemZTargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS, StringRef CPU, StringRef FS,
const TargetOptions &Options, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM, std::optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT) CodeGenOpt::Level OL, bool JIT)
: LLVMTargetMachine( : LLVMTargetMachine(
T, computeDataLayout(TT), TT, CPU, FS, Options, T, computeDataLayout(TT), TT, CPU, FS, Options,

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@ -21,6 +21,7 @@
#include "llvm/Support/CodeGen.h" #include "llvm/Support/CodeGen.h"
#include "llvm/Target/TargetMachine.h" #include "llvm/Target/TargetMachine.h"
#include <memory> #include <memory>
#include <optional>
namespace llvm { namespace llvm {
@ -32,8 +33,9 @@ class SystemZTargetMachine : public LLVMTargetMachine {
public: public:
SystemZTargetMachine(const Target &T, const Triple &TT, StringRef CPU, SystemZTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options, StringRef FS, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, Optional<Reloc::Model> RM,
CodeGenOpt::Level OL, bool JIT); std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL,
bool JIT);
~SystemZTargetMachine() override; ~SystemZTargetMachine() override;
const SystemZSubtarget *getSubtargetImpl(const Function &) const override; const SystemZSubtarget *getSubtargetImpl(const Function &) const override;

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@ -24,6 +24,7 @@
#include "llvm/Target/CodeGenCWrappers.h" #include "llvm/Target/CodeGenCWrappers.h"
#include "llvm/Target/TargetMachine.h" #include "llvm/Target/TargetMachine.h"
#include <cstring> #include <cstring>
#include <optional>
using namespace llvm; using namespace llvm;
@ -124,7 +125,7 @@ LLVMTargetMachineRef LLVMCreateTargetMachine(LLVMTargetRef T,
} }
bool JIT; bool JIT;
Optional<CodeModel::Model> CM = unwrap(CodeModel, JIT); std::optional<CodeModel::Model> CM = unwrap(CodeModel, JIT);
CodeGenOpt::Level OL; CodeGenOpt::Level OL;
switch (Level) { switch (Level) {

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@ -18,6 +18,7 @@
#include "llvm/CodeGen/TargetPassConfig.h" #include "llvm/CodeGen/TargetPassConfig.h"
#include "llvm/IR/LegacyPassManager.h" #include "llvm/IR/LegacyPassManager.h"
#include "llvm/MC/TargetRegistry.h" #include "llvm/MC/TargetRegistry.h"
#include <optional>
using namespace llvm; using namespace llvm;
@ -80,7 +81,7 @@ VETargetMachine::VETargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS, StringRef CPU, StringRef FS,
const TargetOptions &Options, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM, std::optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT) CodeGenOpt::Level OL, bool JIT)
: LLVMTargetMachine(T, computeDataLayout(TT), TT, CPU, FS, Options, : LLVMTargetMachine(T, computeDataLayout(TT), TT, CPU, FS, Options,
getEffectiveRelocModel(RM), getEffectiveRelocModel(RM),

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@ -16,6 +16,7 @@
#include "VEInstrInfo.h" #include "VEInstrInfo.h"
#include "VESubtarget.h" #include "VESubtarget.h"
#include "llvm/Target/TargetMachine.h" #include "llvm/Target/TargetMachine.h"
#include <optional>
namespace llvm { namespace llvm {
@ -29,7 +30,7 @@ class VETargetMachine : public LLVMTargetMachine {
public: public:
VETargetMachine(const Target &T, const Triple &TT, StringRef CPU, VETargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options, StringRef FS, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, Optional<Reloc::Model> RM, std::optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT); CodeGenOpt::Level OL, bool JIT);
~VETargetMachine() override; ~VETargetMachine() override;

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@ -32,6 +32,7 @@
#include "llvm/Transforms/Scalar.h" #include "llvm/Transforms/Scalar.h"
#include "llvm/Transforms/Scalar/LowerAtomicPass.h" #include "llvm/Transforms/Scalar/LowerAtomicPass.h"
#include "llvm/Transforms/Utils.h" #include "llvm/Transforms/Utils.h"
#include <optional>
using namespace llvm; using namespace llvm;
#define DEBUG_TYPE "wasm" #define DEBUG_TYPE "wasm"
@ -109,7 +110,7 @@ static Reloc::Model getEffectiveRelocModel(Optional<Reloc::Model> RM,
WebAssemblyTargetMachine::WebAssemblyTargetMachine( WebAssemblyTargetMachine::WebAssemblyTargetMachine(
const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const Target &T, const Triple &TT, StringRef CPU, StringRef FS,
const TargetOptions &Options, Optional<Reloc::Model> RM, const TargetOptions &Options, Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT) std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT)
: LLVMTargetMachine( : LLVMTargetMachine(
T, T,
TT.isArch64Bit() TT.isArch64Bit()

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@ -17,6 +17,7 @@
#include "WebAssemblySubtarget.h" #include "WebAssemblySubtarget.h"
#include "llvm/Target/TargetMachine.h" #include "llvm/Target/TargetMachine.h"
#include <optional>
namespace llvm { namespace llvm {
@ -28,8 +29,8 @@ public:
WebAssemblyTargetMachine(const Target &T, const Triple &TT, StringRef CPU, WebAssemblyTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options, StringRef FS, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, std::optional<CodeModel::Model> CM,
bool JIT); CodeGenOpt::Level OL, bool JIT);
~WebAssemblyTargetMachine() override; ~WebAssemblyTargetMachine() override;

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@ -51,6 +51,7 @@
#include "llvm/Target/TargetOptions.h" #include "llvm/Target/TargetOptions.h"
#include "llvm/Transforms/CFGuard.h" #include "llvm/Transforms/CFGuard.h"
#include <memory> #include <memory>
#include <optional>
#include <string> #include <string>
using namespace llvm; using namespace llvm;
@ -204,8 +205,9 @@ static Reloc::Model getEffectiveRelocModel(const Triple &TT,
return *RM; return *RM;
} }
static CodeModel::Model getEffectiveX86CodeModel(Optional<CodeModel::Model> CM, static CodeModel::Model
bool JIT, bool Is64Bit) { getEffectiveX86CodeModel(std::optional<CodeModel::Model> CM, bool JIT,
bool Is64Bit) {
if (CM) { if (CM) {
if (*CM == CodeModel::Tiny) if (*CM == CodeModel::Tiny)
report_fatal_error("Target does not support the tiny CodeModel", false); report_fatal_error("Target does not support the tiny CodeModel", false);
@ -222,7 +224,7 @@ X86TargetMachine::X86TargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS, StringRef CPU, StringRef FS,
const TargetOptions &Options, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM, std::optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT) CodeGenOpt::Level OL, bool JIT)
: LLVMTargetMachine( : LLVMTargetMachine(
T, computeDataLayout(TT), TT, CPU, FS, Options, T, computeDataLayout(TT), TT, CPU, FS, Options,

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@ -19,6 +19,7 @@
#include "llvm/Support/CodeGen.h" #include "llvm/Support/CodeGen.h"
#include "llvm/Target/TargetMachine.h" #include "llvm/Target/TargetMachine.h"
#include <memory> #include <memory>
#include <optional>
namespace llvm { namespace llvm {
@ -34,8 +35,9 @@ class X86TargetMachine final : public LLVMTargetMachine {
public: public:
X86TargetMachine(const Target &T, const Triple &TT, StringRef CPU, X86TargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options, StringRef FS, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, Optional<Reloc::Model> RM,
CodeGenOpt::Level OL, bool JIT); std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL,
bool JIT);
~X86TargetMachine() override; ~X86TargetMachine() override;
const X86Subtarget *getSubtargetImpl(const Function &F) const override; const X86Subtarget *getSubtargetImpl(const Function &F) const override;

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@ -22,6 +22,7 @@
#include "llvm/CodeGen/TargetPassConfig.h" #include "llvm/CodeGen/TargetPassConfig.h"
#include "llvm/MC/TargetRegistry.h" #include "llvm/MC/TargetRegistry.h"
#include "llvm/Support/CodeGen.h" #include "llvm/Support/CodeGen.h"
#include <optional>
using namespace llvm; using namespace llvm;
@ -30,7 +31,7 @@ static Reloc::Model getEffectiveRelocModel(Optional<Reloc::Model> RM) {
} }
static CodeModel::Model static CodeModel::Model
getEffectiveXCoreCodeModel(Optional<CodeModel::Model> CM) { getEffectiveXCoreCodeModel(std::optional<CodeModel::Model> CM) {
if (CM) { if (CM) {
if (*CM != CodeModel::Small && *CM != CodeModel::Large) if (*CM != CodeModel::Small && *CM != CodeModel::Large)
report_fatal_error("Target only supports CodeModel Small or Large"); report_fatal_error("Target only supports CodeModel Small or Large");
@ -45,7 +46,7 @@ XCoreTargetMachine::XCoreTargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS, StringRef CPU, StringRef FS,
const TargetOptions &Options, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM, std::optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT) CodeGenOpt::Level OL, bool JIT)
: LLVMTargetMachine( : LLVMTargetMachine(
T, "e-m:e-p:32:32-i1:8:32-i8:8:32-i16:16:32-i64:32-f64:32-a:0:32-n32", T, "e-m:e-p:32:32-i1:8:32-i8:8:32-i16:16:32-i64:32-f64:32-a:0:32-n32",

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@ -19,6 +19,7 @@
#include "llvm/Support/CodeGen.h" #include "llvm/Support/CodeGen.h"
#include "llvm/Target/TargetMachine.h" #include "llvm/Target/TargetMachine.h"
#include <memory> #include <memory>
#include <optional>
namespace llvm { namespace llvm {
class StringRef; class StringRef;
@ -30,8 +31,9 @@ class XCoreTargetMachine : public LLVMTargetMachine {
public: public:
XCoreTargetMachine(const Target &T, const Triple &TT, StringRef CPU, XCoreTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options, StringRef FS, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, Optional<Reloc::Model> RM,
CodeGenOpt::Level OL, bool JIT); std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL,
bool JIT);
~XCoreTargetMachine() override; ~XCoreTargetMachine() override;
const XCoreSubtarget *getSubtargetImpl() const { return &Subtarget; } const XCoreSubtarget *getSubtargetImpl() const { return &Subtarget; }

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@ -56,6 +56,7 @@
#include "llvm/Target/TargetMachine.h" #include "llvm/Target/TargetMachine.h"
#include "llvm/Transforms/Utils/Cloning.h" #include "llvm/Transforms/Utils/Cloning.h"
#include <memory> #include <memory>
#include <optional>
using namespace llvm; using namespace llvm;
static codegen::RegisterCodeGenFlags CGF; static codegen::RegisterCodeGenFlags CGF;
@ -520,7 +521,7 @@ static int compileModule(char **argv, LLVMContext &Context) {
}; };
Optional<Reloc::Model> RM = codegen::getExplicitRelocModel(); Optional<Reloc::Model> RM = codegen::getExplicitRelocModel();
Optional<CodeModel::Model> CM = codegen::getExplicitCodeModel(); std::optional<CodeModel::Model> CM = codegen::getExplicitCodeModel();
const Target *TheTarget = nullptr; const Target *TheTarget = nullptr;
std::unique_ptr<TargetMachine> Target; std::unique_ptr<TargetMachine> Target;
@ -574,7 +575,7 @@ static int compileModule(char **argv, LLVMContext &Context) {
if (!TargetTriple.empty()) if (!TargetTriple.empty())
M->setTargetTriple(Triple::normalize(TargetTriple)); M->setTargetTriple(Triple::normalize(TargetTriple));
Optional<CodeModel::Model> CM_IR = M->getCodeModel(); std::optional<CodeModel::Model> CM_IR = M->getCodeModel();
if (!CM && CM_IR) if (!CM && CM_IR)
Target->setCodeModel(CM_IR.value()); Target->setCodeModel(CM_IR.value());
} else { } else {