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Convert Optional<CodeModel> to std::optional<CodeModel>

This commit is contained in:
Krzysztof Parzyszek 2022-12-03 11:06:12 -06:00
parent d98c172712
commit 8c7c20f033
67 changed files with 280 additions and 159 deletions
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7
clang/lib/CodeGen/BackendUtil.cpp
View File

@ -92,6 +92,7 @@
#include "llvm/Transforms/Utils/NameAnonGlobals.h"
#include "llvm/Transforms/Utils/SymbolRewriter.h"
#include <memory>
#include <optional>
using namespace clang;
using namespace llvm;
@ -312,7 +313,7 @@ static CodeGenOpt::Level getCGOptLevel(const CodeGenOptions &CodeGenOpts) {
}
}
static Optional<llvm::CodeModel::Model>
static std::optional<llvm::CodeModel::Model>
getCodeModel(const CodeGenOptions &CodeGenOpts) {
unsigned CodeModel = llvm::StringSwitch<unsigned>(CodeGenOpts.CodeModel)
.Case("tiny", llvm::CodeModel::Tiny)
@ -324,7 +325,7 @@ getCodeModel(const CodeGenOptions &CodeGenOpts) {
.Default(~0u);
assert(CodeModel != ~0u && "invalid code model!");
if (CodeModel == ~1u)
return None;
return std::nullopt;
return static_cast<llvm::CodeModel::Model>(CodeModel);
}
@ -572,7 +573,7 @@ void EmitAssemblyHelper::CreateTargetMachine(bool MustCreateTM) {
return;
}
Optional<llvm::CodeModel::Model> CM = getCodeModel(CodeGenOpts);
std::optional<llvm::CodeModel::Model> CM = getCodeModel(CodeGenOpts);
std::string FeaturesStr =
llvm::join(TargetOpts.Features.begin(), TargetOpts.Features.end(), ",");
llvm::Reloc::Model RM = CodeGenOpts.RelocationModel;

3
lld/Common/TargetOptionsCommandFlags.cpp
View File

@ -10,6 +10,7 @@
#include "llvm/ADT/Triple.h"
#include "llvm/CodeGen/CommandFlags.h"
#include "llvm/Target/TargetOptions.h"
#include <optional>
llvm::TargetOptions lld::initTargetOptionsFromCodeGenFlags() {
return llvm::codegen::InitTargetOptionsFromCodeGenFlags(llvm::Triple());
@ -19,7 +20,7 @@ llvm::Optional<llvm::Reloc::Model> lld::getRelocModelFromCMModel() {
return llvm::codegen::getExplicitRelocModel();
}
llvm::Optional<llvm::CodeModel::Model> lld::getCodeModelFromCMModel() {
std::optional<llvm::CodeModel::Model> lld::getCodeModelFromCMModel() {
return llvm::codegen::getExplicitCodeModel();
}

3
lld/include/lld/Common/TargetOptionsCommandFlags.h
View File

@ -16,11 +16,12 @@
#include "llvm/ADT/Optional.h"
#include "llvm/Support/CodeGen.h"
#include "llvm/Target/TargetOptions.h"
#include <optional>
namespace lld {
llvm::TargetOptions initTargetOptionsFromCodeGenFlags();
llvm::Optional<llvm::Reloc::Model> getRelocModelFromCMModel();
llvm::Optional<llvm::CodeModel::Model> getCodeModelFromCMModel();
std::optional<llvm::CodeModel::Model> getCodeModelFromCMModel();
std::string getCPUStr();
std::vector<std::string> getMAttrs();
}

3
llvm/include/llvm/CodeGen/CommandFlags.h
View File

@ -18,6 +18,7 @@
#include "llvm/ADT/FloatingPointMode.h"
#include "llvm/Support/CodeGen.h"
#include "llvm/Target/TargetOptions.h"
#include <optional>
#include <string>
#include <vector>
@ -42,7 +43,7 @@ Optional<Reloc::Model> getExplicitRelocModel();
ThreadModel::Model getThreadModel();
CodeModel::Model getCodeModel();
Optional<CodeModel::Model> getExplicitCodeModel();
std::optional<CodeModel::Model> getExplicitCodeModel();
llvm::ExceptionHandling getExceptionModel();

3
llvm/include/llvm/ExecutionEngine/ExecutionEngine.h
View File

@ -35,6 +35,7 @@
#include <functional>
#include <map>
#include <memory>
#include <optional>
#include <string>
#include <vector>
@ -541,7 +542,7 @@ private:
std::shared_ptr<LegacyJITSymbolResolver> Resolver;
TargetOptions Options;
Optional<Reloc::Model> RelocModel;
Optional<CodeModel::Model> CMModel;
std::optional<CodeModel::Model> CMModel;
std::string MArch;
std::string MCPU;
SmallVector<std::string, 4> MAttrs;

7
llvm/include/llvm/ExecutionEngine/Orc/JITTargetMachineBuilder.h
View File

@ -21,6 +21,7 @@
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetOptions.h"
#include <memory>
#include <optional>
#include <string>
#include <vector>
@ -92,13 +93,13 @@ public:
const Optional<Reloc::Model> &getRelocationModel() const { return RM; }
/// Set the code model.
JITTargetMachineBuilder &setCodeModel(Optional<CodeModel::Model> CM) {
JITTargetMachineBuilder &setCodeModel(std::optional<CodeModel::Model> CM) {
this->CM = std::move(CM);
return *this;
}
/// Get the code model.
const Optional<CodeModel::Model> &getCodeModel() const { return CM; }
const std::optional<CodeModel::Model> &getCodeModel() const { return CM; }
/// Set the LLVM CodeGen optimization level.
JITTargetMachineBuilder &setCodeGenOptLevel(CodeGenOpt::Level OptLevel) {
@ -151,7 +152,7 @@ private:
SubtargetFeatures Features;
TargetOptions Options;
Optional<Reloc::Model> RM;
Optional<CodeModel::Model> CM;
std::optional<CodeModel::Model> CM;
CodeGenOpt::Level OptLevel = CodeGenOpt::Default;
};

3
llvm/include/llvm/IR/Module.h
View File

@ -36,6 +36,7 @@
#include <cstdint>
#include <iterator>
#include <memory>
#include <optional>
#include <string>
#include <vector>
@ -863,7 +864,7 @@ public:
/// @{
/// Returns the code model (tiny, small, kernel, medium or large model)
Optional<CodeModel::Model> getCodeModel() const;
std::optional<CodeModel::Model> getCodeModel() const;
/// Set the code model (tiny, small, kernel, medium or large)
void setCodeModel(CodeModel::Model CL);

3
llvm/include/llvm/LTO/Config.h
View File

@ -25,6 +25,7 @@
#include "llvm/Target/TargetOptions.h"
#include <functional>
#include <optional>
namespace llvm {
@ -52,7 +53,7 @@ struct Config {
/// For adding passes that run right before codegen.
std::function<void(legacy::PassManager &)> PreCodeGenPassesHook;
Optional<Reloc::Model> RelocModel = Reloc::PIC_;
Optional<CodeModel::Model> CodeModel = std::nullopt;
std::optional<CodeModel::Model> CodeModel = std::nullopt;
CodeGenOpt::Level CGOptLevel = CodeGenOpt::Default;
CodeGenFileType CGFileType = CGFT_ObjectFile;
unsigned OptLevel = 2;

15
llvm/include/llvm/MC/TargetRegistry.h
View File

@ -31,6 +31,7 @@
#include <cstddef>
#include <iterator>
#include <memory>
#include <optional>
#include <string>
namespace llvm {
@ -167,7 +168,7 @@ public:
using TargetMachineCtorTy = TargetMachine
*(*)(const Target &T, const Triple &TT, StringRef CPU, StringRef Features,
const TargetOptions &Options, Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT);
std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT);
// If it weren't for layering issues (this header is in llvm/Support, but
// depends on MC?) this should take the Streamer by value rather than rvalue
// reference.
@ -481,7 +482,7 @@ public:
TargetMachine *
createTargetMachine(StringRef TT, StringRef CPU, StringRef Features,
const TargetOptions &Options, Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM = std::nullopt,
std::optional<CodeModel::Model> CM = std::nullopt,
CodeGenOpt::Level OL = CodeGenOpt::Default,
bool JIT = false) const {
if (!TargetMachineCtorFn)
@ -1358,10 +1359,12 @@ template <class TargetMachineImpl> struct RegisterTargetMachine {
}
private:
static TargetMachine *
Allocator(const Target &T, const Triple &TT, StringRef CPU, StringRef FS,
const TargetOptions &Options, Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT) {
static TargetMachine *Allocator(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS,
const TargetOptions &Options,
Optional<Reloc::Model> RM,
std::optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT) {
return new TargetMachineImpl(T, TT, CPU, FS, Options, RM, CM, OL, JIT);
}
};

3
llvm/include/llvm/Target/CodeGenCWrappers.h
View File

@ -19,10 +19,11 @@
#include "llvm/ADT/Optional.h"
#include "llvm/Support/CodeGen.h"
#include "llvm/Support/ErrorHandling.h"
#include <optional>
namespace llvm {
inline Optional<CodeModel::Model> unwrap(LLVMCodeModel Model, bool &JIT) {
inline std::optional<CodeModel::Model> unwrap(LLVMCodeModel Model, bool &JIT) {
JIT = false;
switch (Model) {
case LLVMCodeModelJITDefault:

6
llvm/include/llvm/Target/TargetMachine.h
View File

@ -23,6 +23,7 @@
#include "llvm/Support/PGOOptions.h"
#include "llvm/Target/CGPassBuilderOption.h"
#include "llvm/Target/TargetOptions.h"
#include <optional>
#include <string>
#include <utility>
@ -497,8 +498,9 @@ public:
/// CM does not have a value. The tiny and kernel models will produce
/// an error, so targets that support them or require more complex codemodel
/// selection logic should implement and call their own getEffectiveCodeModel.
inline CodeModel::Model getEffectiveCodeModel(Optional<CodeModel::Model> CM,
CodeModel::Model Default) {
inline CodeModel::Model
getEffectiveCodeModel(std::optional<CodeModel::Model> CM,
CodeModel::Model Default) {
if (CM) {
// By default, targets do not support the tiny and kernel models.
if (*CM == CodeModel::Tiny)

14
llvm/lib/CodeGen/CommandFlags.cpp
View File

@ -23,6 +23,7 @@
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Host.h"
#include "llvm/Support/MemoryBuffer.h"
#include <optional>
using namespace llvm;
@ -50,12 +51,23 @@ using namespace llvm;
return None; \
}
// Temporary macro for incremental transition to std::optional.
#define CGSTDOPT_EXP(TY, NAME) \
CGOPT(TY, NAME) \
std::optional<TY> codegen::getExplicit##NAME() { \
if (NAME##View->getNumOccurrences()) { \
TY res = *NAME##View; \
return res; \
} \
return std::nullopt; \
}
CGOPT(std::string, MArch)
CGOPT(std::string, MCPU)
CGLIST(std::string, MAttrs)
CGOPT_EXP(Reloc::Model, RelocModel)
CGOPT(ThreadModel::Model, ThreadModel)
CGOPT_EXP(CodeModel::Model, CodeModel)
CGSTDOPT_EXP(CodeModel::Model, CodeModel)
CGOPT(ExceptionHandling, ExceptionModel)
CGOPT_EXP(CodeGenFileType, FileType)
CGOPT(FramePointerKind, FramePointerUsage)

3
llvm/lib/ExecutionEngine/ExecutionEngineBindings.cpp
View File

@ -21,6 +21,7 @@
#include "llvm/Target/CodeGenCWrappers.h"
#include "llvm/Target/TargetOptions.h"
#include <cstring>
#include <optional>
using namespace llvm;
@ -199,7 +200,7 @@ LLVMBool LLVMCreateMCJITCompilerForModule(
.setOptLevel((CodeGenOpt::Level)options.OptLevel)
.setTargetOptions(targetOptions);
bool JIT;
if (Optional<CodeModel::Model> CM = unwrap(options.CodeModel, JIT))
if (std::optional<CodeModel::Model> CM = unwrap(options.CodeModel, JIT))
builder.setCodeModel(*CM);
if (options.MCJMM)
builder.setMCJITMemoryManager(

2
llvm/lib/IR/Module.cpp
View File

@ -616,7 +616,7 @@ void Module::setPIELevel(PIELevel::Level PL) {
addModuleFlag(ModFlagBehavior::Max, "PIE Level", PL);
}
Optional<CodeModel::Model> Module::getCodeModel() const {
std::optional<CodeModel::Model> Module::getCodeModel() const {
auto *Val = cast_or_null<ConstantAsMetadata>(getModuleFlag("Code Model"));
if (!Val)

3
llvm/lib/LTO/LTOBackend.cpp
View File

@ -44,6 +44,7 @@
#include "llvm/Transforms/Scalar/LoopPassManager.h"
#include "llvm/Transforms/Utils/FunctionImportUtils.h"
#include "llvm/Transforms/Utils/SplitModule.h"
#include <optional>
using namespace llvm;
using namespace lto;
@ -214,7 +215,7 @@ createTargetMachine(const Config &Conf, const Target *TheTarget, Module &M) {
RelocModel =
M.getPICLevel() == PICLevel::NotPIC ? Reloc::Static : Reloc::PIC_;
Optional<CodeModel::Model> CodeModel;
std::optional<CodeModel::Model> CodeModel;
if (Conf.CodeModel)
CodeModel = *Conf.CodeModel;
else

10
llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
View File

@ -288,8 +288,8 @@ static Reloc::Model getEffectiveRelocModel(const Triple &TT,
}
static CodeModel::Model
getEffectiveAArch64CodeModel(const Triple &TT, Optional<CodeModel::Model> CM,
bool JIT) {
getEffectiveAArch64CodeModel(const Triple &TT,
std::optional<CodeModel::Model> CM, bool JIT) {
if (CM) {
if (*CM != CodeModel::Small && *CM != CodeModel::Tiny &&
*CM != CodeModel::Large) {
@ -316,7 +316,7 @@ AArch64TargetMachine::AArch64TargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS,
const TargetOptions &Options,
Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM,
std::optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT,
bool LittleEndian)
: LLVMTargetMachine(T,
@ -455,7 +455,7 @@ void AArch64leTargetMachine::anchor() { }
AArch64leTargetMachine::AArch64leTargetMachine(
const Target &T, const Triple &TT, StringRef CPU, StringRef FS,
const TargetOptions &Options, Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT)
std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT)
: AArch64TargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, JIT, true) {}
void AArch64beTargetMachine::anchor() { }
@ -463,7 +463,7 @@ void AArch64beTargetMachine::anchor() { }
AArch64beTargetMachine::AArch64beTargetMachine(
const Target &T, const Triple &TT, StringRef CPU, StringRef FS,
const TargetOptions &Options, Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT)
std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT)
: AArch64TargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, JIT, false) {}
namespace {

16
llvm/lib/Target/AArch64/AArch64TargetMachine.h
View File

@ -17,6 +17,7 @@
#include "AArch64Subtarget.h"
#include "llvm/IR/DataLayout.h"
#include "llvm/Target/TargetMachine.h"
#include <optional>
namespace llvm {
@ -28,8 +29,9 @@ protected:
public:
AArch64TargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT, bool IsLittleEndian);
Optional<Reloc::Model> RM,
std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL,
bool JIT, bool IsLittleEndian);
~AArch64TargetMachine() override;
const AArch64Subtarget *getSubtargetImpl(const Function &F) const override;
@ -69,24 +71,26 @@ private:
//
class AArch64leTargetMachine : public AArch64TargetMachine {
virtual void anchor();
public:
AArch64leTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options,
Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM, CodeGenOpt::Level OL,
bool JIT);
std::optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT);
};
// AArch64 big endian target machine.
//
class AArch64beTargetMachine : public AArch64TargetMachine {
virtual void anchor();
public:
AArch64beTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options,
Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM, CodeGenOpt::Level OL,
bool JIT);
std::optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT);
};
} // end namespace llvm

5
llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
View File

@ -57,6 +57,7 @@
#include "llvm/Transforms/Utils.h"
#include "llvm/Transforms/Utils/SimplifyLibCalls.h"
#include "llvm/Transforms/Vectorize.h"
#include <optional>
using namespace llvm;
using namespace llvm::PatternMatch;
@ -531,7 +532,7 @@ AMDGPUTargetMachine::AMDGPUTargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS,
TargetOptions Options,
Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM,
std::optional<CodeModel::Model> CM,
CodeGenOpt::Level OptLevel)
: LLVMTargetMachine(T, computeDataLayout(TT), TT, getGPUOrDefault(TT, CPU),
FS, Options, getEffectiveRelocModel(RM),
@ -801,7 +802,7 @@ GCNTargetMachine::GCNTargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS,
TargetOptions Options,
Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM,
std::optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT)
: AMDGPUTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL) {}

10
llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
View File

@ -17,6 +17,7 @@
#include "GCNSubtarget.h"
#include "llvm/CodeGen/TargetPassConfig.h"
#include "llvm/Target/TargetMachine.h"
#include <optional>
#include <utility>
namespace llvm {
@ -39,8 +40,8 @@ public:
AMDGPUTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, TargetOptions Options,
Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
CodeGenOpt::Level OL);
Optional<Reloc::Model> RM,
std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL);
~AMDGPUTargetMachine() override;
const TargetSubtargetInfo *getSubtargetImpl() const;
@ -77,8 +78,9 @@ private:
public:
GCNTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, TargetOptions Options,
Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT);
Optional<Reloc::Model> RM,
std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL,
bool JIT);
TargetPassConfig *createPassConfig(PassManagerBase &PM) override;

3
llvm/lib/Target/AMDGPU/R600TargetMachine.cpp
View File

@ -18,6 +18,7 @@
#include "R600MachineScheduler.h"
#include "R600TargetTransformInfo.h"
#include "llvm/Transforms/Scalar.h"
#include <optional>
using namespace llvm;
@ -51,7 +52,7 @@ R600TargetMachine::R600TargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS,
TargetOptions Options,
Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM,
std::optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT)
: AMDGPUTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL) {
setRequiresStructuredCFG(true);

6
llvm/lib/Target/AMDGPU/R600TargetMachine.h
View File

@ -17,6 +17,7 @@
#include "AMDGPUTargetMachine.h"
#include "R600Subtarget.h"
#include "llvm/Target/TargetMachine.h"
#include <optional>
namespace llvm {
@ -31,8 +32,9 @@ private:
public:
R600TargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, TargetOptions Options,
Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT);
Optional<Reloc::Model> RM,
std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL,
bool JIT);
TargetPassConfig *createPassConfig(PassManagerBase &PM) override;

3
llvm/lib/Target/ARC/ARCTargetMachine.cpp
View File

@ -17,6 +17,7 @@
#include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"
#include "llvm/CodeGen/TargetPassConfig.h"
#include "llvm/MC/TargetRegistry.h"
#include <optional>
using namespace llvm;
@ -29,7 +30,7 @@ ARCTargetMachine::ARCTargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS,
const TargetOptions &Options,
Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM,
std::optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT)
: LLVMTargetMachine(T,
"e-m:e-p:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-"

6
llvm/lib/Target/ARC/ARCTargetMachine.h
View File

@ -15,6 +15,7 @@
#include "ARCSubtarget.h"
#include "llvm/Target/TargetMachine.h"
#include <optional>
namespace llvm {
@ -27,8 +28,9 @@ class ARCTargetMachine : public LLVMTargetMachine {
public:
ARCTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT);
Optional<Reloc::Model> RM,
std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL,
bool JIT);
~ARCTargetMachine() override;
const ARCSubtarget *getSubtargetImpl() const { return &Subtarget; }

7
llvm/lib/Target/ARM/ARMTargetMachine.cpp
View File

@ -53,6 +53,7 @@
#include "llvm/Transforms/Scalar.h"
#include <cassert>
#include <memory>
#include <optional>
#include <string>
using namespace llvm;
@ -217,7 +218,7 @@ ARMBaseTargetMachine::ARMBaseTargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS,
const TargetOptions &Options,
Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM,
std::optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool isLittle)
: LLVMTargetMachine(T, computeDataLayout(TT, CPU, Options, isLittle), TT,
CPU, FS, Options, getEffectiveRelocModel(TT, RM),
@ -317,7 +318,7 @@ ARMLETargetMachine::ARMLETargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS,
const TargetOptions &Options,
Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM,
std::optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT)
: ARMBaseTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) {}
@ -325,7 +326,7 @@ ARMBETargetMachine::ARMBETargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS,
const TargetOptions &Options,
Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM,
std::optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT)
: ARMBaseTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {}

16
llvm/lib/Target/ARM/ARMTargetMachine.h
View File

@ -21,6 +21,7 @@
#include "llvm/Support/CodeGen.h"
#include "llvm/Target/TargetMachine.h"
#include <memory>
#include <optional>
namespace llvm {
@ -41,8 +42,9 @@ protected:
public:
ARMBaseTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool isLittle);
Optional<Reloc::Model> RM,
std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL,
bool isLittle);
~ARMBaseTargetMachine() override;
const ARMSubtarget *getSubtargetImpl(const Function &F) const override;
@ -86,8 +88,9 @@ class ARMLETargetMachine : public ARMBaseTargetMachine {
public:
ARMLETargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT);
Optional<Reloc::Model> RM,
std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL,
bool JIT);
};
/// ARM/Thumb big endian target machine.
@ -96,8 +99,9 @@ class ARMBETargetMachine : public ARMBaseTargetMachine {
public:
ARMBETargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT);
Optional<Reloc::Model> RM,
std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL,
bool JIT);
};
} // end namespace llvm

4
llvm/lib/Target/AVR/AVRTargetMachine.cpp
View File

@ -23,6 +23,8 @@
#include "MCTargetDesc/AVRMCTargetDesc.h"
#include "TargetInfo/AVRTargetInfo.h"
#include <optional>
namespace llvm {
static const char *AVRDataLayout =
@ -45,7 +47,7 @@ AVRTargetMachine::AVRTargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS,
const TargetOptions &Options,
Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM,
std::optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT)
: LLVMTargetMachine(T, AVRDataLayout, TT, getCPU(CPU), FS, Options,
getEffectiveRelocModel(RM),

7
llvm/lib/Target/AVR/AVRTargetMachine.h
View File

@ -22,6 +22,8 @@
#include "AVRSelectionDAGInfo.h"
#include "AVRSubtarget.h"
#include <optional>
namespace llvm {
/// A generic AVR implementation.
@ -29,8 +31,9 @@ class AVRTargetMachine : public LLVMTargetMachine {
public:
AVRTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT);
Optional<Reloc::Model> RM,
std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL,
bool JIT);
const AVRSubtarget *getSubtargetImpl() const;
const AVRSubtarget *getSubtargetImpl(const Function &) const override;

3
llvm/lib/Target/BPF/BPFTargetMachine.cpp
View File

@ -27,6 +27,7 @@
#include "llvm/Transforms/Scalar.h"
#include "llvm/Transforms/Scalar/SimplifyCFG.h"
#include "llvm/Transforms/Utils/SimplifyCFGOptions.h"
#include <optional>
using namespace llvm;
static cl::
@ -65,7 +66,7 @@ BPFTargetMachine::BPFTargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS,
const TargetOptions &Options,
Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM,
std::optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT)
: LLVMTargetMachine(T, computeDataLayout(TT), TT, CPU, FS, Options,
getEffectiveRelocModel(RM),

6
llvm/lib/Target/BPF/BPFTargetMachine.h
View File

@ -15,6 +15,7 @@
#include "BPFSubtarget.h"
#include "llvm/Target/TargetMachine.h"
#include <optional>
namespace llvm {
class BPFTargetMachine : public LLVMTargetMachine {
@ -24,8 +25,9 @@ class BPFTargetMachine : public LLVMTargetMachine {
public:
BPFTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT);
Optional<Reloc::Model> RM,
std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL,
bool JIT);
const BPFSubtarget *getSubtargetImpl() const { return &Subtarget; }
const BPFSubtarget *getSubtargetImpl(const Function &) const override {

3
llvm/lib/Target/CSKY/CSKYTargetMachine.cpp
View File

@ -20,6 +20,7 @@
#include "llvm/CodeGen/TargetPassConfig.h"
#include "llvm/CodeGen/TargetSubtargetInfo.h"
#include "llvm/MC/TargetRegistry.h"
#include <optional>
using namespace llvm;
@ -49,7 +50,7 @@ CSKYTargetMachine::CSKYTargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS,
const TargetOptions &Options,
Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM,
std::optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT)
: LLVMTargetMachine(T, computeDataLayout(TT), TT, CPU, FS, Options,
RM.value_or(Reloc::Static),

6
llvm/lib/Target/CSKY/CSKYTargetMachine.h
View File

@ -16,6 +16,7 @@
#include "CSKYSubtarget.h"
#include "llvm/IR/DataLayout.h"
#include "llvm/Target/TargetMachine.h"
#include <optional>
namespace llvm {
@ -26,8 +27,9 @@ class CSKYTargetMachine : public LLVMTargetMachine {
public:
CSKYTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT);
Optional<Reloc::Model> RM,
std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL,
bool JIT);
TargetPassConfig *createPassConfig(PassManagerBase &PM) override;

3
llvm/lib/Target/DirectX/DirectXTargetMachine.cpp
View File

@ -32,6 +32,7 @@
#include "llvm/Support/Compiler.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Target/TargetLoweringObjectFile.h"
#include <optional>
using namespace llvm;
@ -83,7 +84,7 @@ DirectXTargetMachine::DirectXTargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS,
const TargetOptions &Options,
Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM,
std::optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT)
: LLVMTargetMachine(T,
"e-m:e-p:32:32-i1:32-i8:8-i16:16-i32:32-i64:64-f16:16-"

6
llvm/lib/Target/DirectX/DirectXTargetMachine.h
View File

@ -13,6 +13,7 @@
#include "DirectXSubtarget.h"
#include "llvm/Target/TargetMachine.h"
#include <optional>
namespace llvm {
class Function;
@ -23,8 +24,9 @@ class DirectXTargetMachine : public LLVMTargetMachine {
public:
DirectXTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT);
Optional<Reloc::Model> RM,
std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL,
bool JIT);
~DirectXTargetMachine() override;

3
llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
View File

@ -28,6 +28,7 @@
#include "llvm/Passes/PassBuilder.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Transforms/Scalar.h"
#include <optional>
using namespace llvm;
@ -223,7 +224,7 @@ HexagonTargetMachine::HexagonTargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS,
const TargetOptions &Options,
Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM,
std::optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT)
// Specify the vector alignment explicitly. For v512x1, the calculated
// alignment would be 512*alignment(i1), which is 512 bytes, instead of

6
llvm/lib/Target/Hexagon/HexagonTargetMachine.h
View File

@ -17,6 +17,7 @@
#include "HexagonSubtarget.h"
#include "HexagonTargetObjectFile.h"
#include "llvm/Target/TargetMachine.h"
#include <optional>
namespace llvm {
@ -29,8 +30,9 @@ class HexagonTargetMachine : public LLVMTargetMachine {
public:
HexagonTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT);
Optional<Reloc::Model> RM,
std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL,
bool JIT);
~HexagonTargetMachine() override;
const HexagonSubtarget *getSubtargetImpl(const Function &F) const override;

12
llvm/lib/Target/Lanai/LanaiTargetMachine.cpp
View File

@ -23,6 +23,7 @@
#include "llvm/MC/TargetRegistry.h"
#include "llvm/Support/FormattedStream.h"
#include "llvm/Target/TargetOptions.h"
#include <optional>
using namespace llvm;
@ -51,12 +52,11 @@ static Reloc::Model getEffectiveRelocModel(Optional<Reloc::Model> RM) {
return RM.value_or(Reloc::PIC_);
}
LanaiTargetMachine::LanaiTargetMachine(const Target &T, const Triple &TT,
StringRef Cpu, StringRef FeatureString,
const TargetOptions &Options,
Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CodeModel,
CodeGenOpt::Level OptLevel, bool JIT)
LanaiTargetMachine::LanaiTargetMachine(
const Target &T, const Triple &TT, StringRef Cpu, StringRef FeatureString,
const TargetOptions &Options, Optional<Reloc::Model> RM,
std::optional<CodeModel::Model> CodeModel, CodeGenOpt::Level OptLevel,
bool JIT)
: LLVMTargetMachine(T, computeDataLayout(), TT, Cpu, FeatureString, Options,
getEffectiveRelocModel(RM),
getEffectiveCodeModel(CodeModel, CodeModel::Medium),

3
llvm/lib/Target/Lanai/LanaiTargetMachine.h
View File

@ -18,6 +18,7 @@
#include "LanaiSelectionDAGInfo.h"
#include "LanaiSubtarget.h"
#include "llvm/Target/TargetMachine.h"
#include <optional>
namespace llvm {
@ -30,7 +31,7 @@ public:
StringRef Cpu, StringRef FeatureString,
const TargetOptions &Options,
Optional<Reloc::Model> RelocationModel,
Optional<CodeModel::Model> CodeModel,
std::optional<CodeModel::Model> CodeModel,
CodeGenOpt::Level OptLevel, bool JIT);
const LanaiSubtarget *

3
llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp
View File

@ -18,6 +18,7 @@
#include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"
#include "llvm/CodeGen/TargetPassConfig.h"
#include "llvm/MC/TargetRegistry.h"
#include <optional>
using namespace llvm;
@ -46,7 +47,7 @@ static Reloc::Model getEffectiveRelocModel(const Triple &TT,
LoongArchTargetMachine::LoongArchTargetMachine(
const Target &T, const Triple &TT, StringRef CPU, StringRef FS,
const TargetOptions &Options, Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT)
std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT)
: LLVMTargetMachine(T, computeDataLayout(TT), TT, CPU, FS, Options,
getEffectiveRelocModel(TT, RM),
getEffectiveCodeModel(CM, CodeModel::Small), OL),

5
llvm/lib/Target/LoongArch/LoongArchTargetMachine.h
View File

@ -15,6 +15,7 @@
#include "LoongArchSubtarget.h"
#include "llvm/Target/TargetMachine.h"
#include <optional>
namespace llvm {
@ -26,8 +27,8 @@ public:
LoongArchTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options,
Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM, CodeGenOpt::Level OL,
bool JIT);
std::optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT);
~LoongArchTargetMachine() override;
const LoongArchSubtarget *getSubtargetImpl(const Function &F) const override;

5
llvm/lib/Target/M68k/M68kTargetMachine.cpp
View File

@ -27,6 +27,7 @@
#include "llvm/MC/TargetRegistry.h"
#include "llvm/PassRegistry.h"
#include <memory>
#include <optional>
using namespace llvm;
@ -78,7 +79,7 @@ Reloc::Model getEffectiveRelocModel(const Triple &TT,
return *RM;
}
CodeModel::Model getEffectiveCodeModel(Optional<CodeModel::Model> CM,
CodeModel::Model getEffectiveCodeModel(std::optional<CodeModel::Model> CM,
bool JIT) {
if (!CM) {
return CodeModel::Small;
@ -95,7 +96,7 @@ M68kTargetMachine::M68kTargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS,
const TargetOptions &Options,
Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM,
std::optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT)
: LLVMTargetMachine(T, computeDataLayout(TT, CPU, Options), TT, CPU, FS,
Options, getEffectiveRelocModel(TT, RM),

7
llvm/lib/Target/M68k/M68kTargetMachine.h
View File

@ -22,6 +22,8 @@
#include "llvm/CodeGen/TargetFrameLowering.h"
#include "llvm/Target/TargetMachine.h"
#include <optional>
namespace llvm {
class formatted_raw_ostream;
class M68kRegisterInfo;
@ -35,8 +37,9 @@ class M68kTargetMachine : public LLVMTargetMachine {
public:
M68kTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT);
Optional<Reloc::Model> RM,
std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL,
bool JIT);
~M68kTargetMachine() override;

3
llvm/lib/Target/MSP430/MSP430TargetMachine.cpp
View File

@ -19,6 +19,7 @@
#include "llvm/IR/LegacyPassManager.h"
#include "llvm/MC/MCAsmInfo.h"
#include "llvm/MC/TargetRegistry.h"
#include <optional>
using namespace llvm;
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeMSP430Target() {
@ -39,7 +40,7 @@ MSP430TargetMachine::MSP430TargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS,
const TargetOptions &Options,
Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM,
std::optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT)
: LLVMTargetMachine(T, computeDataLayout(TT, CPU, Options), TT, CPU, FS,
Options, getEffectiveRelocModel(RM),

8
llvm/lib/Target/MSP430/MSP430TargetMachine.h
View File

@ -16,6 +16,7 @@
#include "MSP430Subtarget.h"
#include "llvm/Target/TargetMachine.h"
#include <optional>
namespace llvm {
class StringRef;
@ -24,13 +25,14 @@ class StringRef;
///
class MSP430TargetMachine : public LLVMTargetMachine {
std::unique_ptr<TargetLoweringObjectFile> TLOF;
MSP430Subtarget Subtarget;
MSP430Subtarget Subtarget;
public:
MSP430TargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT);
Optional<Reloc::Model> RM,
std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL,
bool JIT);
~MSP430TargetMachine() override;
const MSP430Subtarget *getSubtargetImpl(const Function &F) const override {

7
llvm/lib/Target/Mips/MipsTargetMachine.cpp
View File

@ -41,6 +41,7 @@
#include "llvm/Support/Debug.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetOptions.h"
#include <optional>
#include <string>
using namespace llvm;
@ -120,7 +121,7 @@ MipsTargetMachine::MipsTargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS,
const TargetOptions &Options,
Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM,
std::optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT,
bool isLittle)
: LLVMTargetMachine(T, computeDataLayout(TT, CPU, Options, isLittle), TT,
@ -149,7 +150,7 @@ MipsebTargetMachine::MipsebTargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS,
const TargetOptions &Options,
Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM,
std::optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT)
: MipsTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, JIT, false) {}
@ -159,7 +160,7 @@ MipselTargetMachine::MipselTargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS,
const TargetOptions &Options,
Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM,
std::optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT)
: MipsTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, JIT, true) {}

16
llvm/lib/Target/Mips/MipsTargetMachine.h
View File

@ -21,6 +21,7 @@
#include "llvm/Support/CodeGen.h"
#include "llvm/Target/TargetMachine.h"
#include <memory>
#include <optional>
namespace llvm {
@ -39,8 +40,9 @@ class MipsTargetMachine : public LLVMTargetMachine {
public:
MipsTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT, bool isLittle);
Optional<Reloc::Model> RM,
std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL,
bool JIT, bool isLittle);
~MipsTargetMachine() override;
TargetTransformInfo getTargetTransformInfo(const Function &F) const override;
@ -83,8 +85,9 @@ class MipsebTargetMachine : public MipsTargetMachine {
public:
MipsebTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT);
Optional<Reloc::Model> RM,
std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL,
bool JIT);
};
/// Mips32/64 little endian target machine.
@ -95,8 +98,9 @@ class MipselTargetMachine : public MipsTargetMachine {
public:
MipselTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT);
Optional<Reloc::Model> RM,
std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL,
bool JIT);
};
} // end namespace llvm

7
llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
View File

@ -35,6 +35,7 @@
#include "llvm/Transforms/Scalar/GVN.h"
#include "llvm/Transforms/Vectorize.h"
#include <cassert>
#include <optional>
#include <string>
using namespace llvm;
@ -112,7 +113,7 @@ NVPTXTargetMachine::NVPTXTargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS,
const TargetOptions &Options,
Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM,
std::optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool is64bit)
// The pic relocation model is used regardless of what the client has
// specified, as it is the only relocation model currently supported.
@ -139,7 +140,7 @@ NVPTXTargetMachine32::NVPTXTargetMachine32(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS,
const TargetOptions &Options,
Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM,
std::optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT)
: NVPTXTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {}
@ -149,7 +150,7 @@ NVPTXTargetMachine64::NVPTXTargetMachine64(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS,
const TargetOptions &Options,
Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM,
std::optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT)
: NVPTXTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) {}

19
llvm/lib/Target/NVPTX/NVPTXTargetMachine.h
View File

@ -16,6 +16,7 @@
#include "ManagedStringPool.h"
#include "NVPTXSubtarget.h"
#include "llvm/Target/TargetMachine.h"
#include <optional>
#include <utility>
namespace llvm {
@ -36,9 +37,9 @@ class NVPTXTargetMachine : public LLVMTargetMachine {
public:
NVPTXTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
CodeGenOpt::Level OP, bool is64bit);
Optional<Reloc::Model> RM,
std::optional<CodeModel::Model> CM, CodeGenOpt::Level OP,
bool is64bit);
~NVPTXTargetMachine() override;
const NVPTXSubtarget *getSubtargetImpl(const Function &) const override {
return &Subtarget;
@ -76,20 +77,24 @@ public:
class NVPTXTargetMachine32 : public NVPTXTargetMachine {
virtual void anchor();
public:
NVPTXTargetMachine32(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT);
Optional<Reloc::Model> RM,
std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL,
bool JIT);
};
class NVPTXTargetMachine64 : public NVPTXTargetMachine {
virtual void anchor();
public:
NVPTXTargetMachine64(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT);
Optional<Reloc::Model> RM,
std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL,
bool JIT);
};
} // end namespace llvm

9
llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
View File

@ -46,6 +46,7 @@
#include "llvm/Transforms/Scalar.h"
#include <cassert>
#include <memory>
#include <optional>
#include <string>
using namespace llvm;
@ -260,9 +261,9 @@ static Reloc::Model getEffectiveRelocModel(const Triple &TT,
return Reloc::Static;
}
static CodeModel::Model getEffectivePPCCodeModel(const Triple &TT,
Optional<CodeModel::Model> CM,
bool JIT) {
static CodeModel::Model
getEffectivePPCCodeModel(const Triple &TT, std::optional<CodeModel::Model> CM,
bool JIT) {
if (CM) {
if (*CM == CodeModel::Tiny)
report_fatal_error("Target does not support the tiny CodeModel", false);
@ -325,7 +326,7 @@ PPCTargetMachine::PPCTargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS,
const TargetOptions &Options,
Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM,
std::optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT)
: LLVMTargetMachine(T, getDataLayoutString(TT), TT, CPU,
computeFSAdditions(FS, OL, TT), Options,

6
llvm/lib/Target/PowerPC/PPCTargetMachine.h
View File

@ -17,6 +17,7 @@
#include "PPCSubtarget.h"
#include "llvm/IR/DataLayout.h"
#include "llvm/Target/TargetMachine.h"
#include <optional>
namespace llvm {
@ -37,8 +38,9 @@ private:
public:
PPCTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT);
Optional<Reloc::Model> RM,
std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL,
bool JIT);
~PPCTargetMachine() override;

3
llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
View File

@ -35,6 +35,7 @@
#include "llvm/Support/FormattedStream.h"
#include "llvm/Target/TargetOptions.h"
#include "llvm/Transforms/IPO.h"
#include <optional>
using namespace llvm;
static cl::opt<bool> EnableRedundantCopyElimination(
@ -83,7 +84,7 @@ RISCVTargetMachine::RISCVTargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS,
const TargetOptions &Options,
Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM,
std::optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT)
: LLVMTargetMachine(T, computeDataLayout(TT), TT, CPU, FS, Options,
getEffectiveRelocModel(TT, RM),

6
llvm/lib/Target/RISCV/RISCVTargetMachine.h
View File

@ -18,6 +18,7 @@
#include "llvm/CodeGen/SelectionDAGTargetInfo.h"
#include "llvm/IR/DataLayout.h"
#include "llvm/Target/TargetMachine.h"
#include <optional>
namespace llvm {
class RISCVTargetMachine : public LLVMTargetMachine {
@ -27,8 +28,9 @@ class RISCVTargetMachine : public LLVMTargetMachine {
public:
RISCVTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT);
Optional<Reloc::Model> RM,
std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL,
bool JIT);
const RISCVSubtarget *getSubtargetImpl(const Function &F) const override;
// DO NOT IMPLEMENT: There is no such thing as a valid default subtarget,

3
llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
View File

@ -30,6 +30,7 @@
#include "llvm/MC/TargetRegistry.h"
#include "llvm/Pass.h"
#include "llvm/Target/TargetOptions.h"
#include <optional>
using namespace llvm;
@ -65,7 +66,7 @@ SPIRVTargetMachine::SPIRVTargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS,
const TargetOptions &Options,
Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM,
std::optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT)
: LLVMTargetMachine(T, computeDataLayout(TT), TT, CPU, FS, Options,
getEffectiveRelocModel(RM),

6
llvm/lib/Target/SPIRV/SPIRVTargetMachine.h
View File

@ -15,6 +15,7 @@
#include "SPIRVSubtarget.h"
#include "llvm/Target/TargetMachine.h"
#include <optional>
namespace llvm {
class SPIRVTargetMachine : public LLVMTargetMachine {
@ -24,8 +25,9 @@ class SPIRVTargetMachine : public LLVMTargetMachine {
public:
SPIRVTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT);
Optional<Reloc::Model> RM,
std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL,
bool JIT);
const SPIRVSubtarget *getSubtargetImpl() const { return &Subtarget; }

20
llvm/lib/Target/Sparc/SparcTargetMachine.cpp
View File

@ -18,6 +18,7 @@
#include "llvm/CodeGen/TargetPassConfig.h"
#include "llvm/IR/LegacyPassManager.h"
#include "llvm/MC/TargetRegistry.h"
#include <optional>
using namespace llvm;
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeSparcTarget() {
@ -69,7 +70,7 @@ static Reloc::Model getEffectiveRelocModel(Optional<Reloc::Model> RM) {
//
// All code models require that the text segment is smaller than 2GB.
static CodeModel::Model
getEffectiveSparcCodeModel(Optional<CodeModel::Model> CM, Reloc::Model RM,
getEffectiveSparcCodeModel(std::optional<CodeModel::Model> CM, Reloc::Model RM,
bool Is64Bit, bool JIT) {
if (CM) {
if (*CM == CodeModel::Tiny)
@ -87,10 +88,13 @@ getEffectiveSparcCodeModel(Optional<CodeModel::Model> CM, Reloc::Model RM,
}
/// Create an ILP32 architecture model
SparcTargetMachine::SparcTargetMachine(
const Target &T, const Triple &TT, StringRef CPU, StringRef FS,
const TargetOptions &Options, Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT, bool is64bit)
SparcTargetMachine::SparcTargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS,
const TargetOptions &Options,
Optional<Reloc::Model> RM,
std::optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT,
bool is64bit)
: LLVMTargetMachine(T, computeDataLayout(TT, is64bit), TT, CPU, FS, Options,
getEffectiveRelocModel(RM),
getEffectiveSparcCodeModel(
@ -188,7 +192,7 @@ SparcV8TargetMachine::SparcV8TargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS,
const TargetOptions &Options,
Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM,
std::optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT)
: SparcTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, JIT, false) {}
@ -198,7 +202,7 @@ SparcV9TargetMachine::SparcV9TargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS,
const TargetOptions &Options,
Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM,
std::optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT)
: SparcTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, JIT, true) {}
@ -208,6 +212,6 @@ SparcelTargetMachine::SparcelTargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS,
const TargetOptions &Options,
Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM,
std::optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT)
: SparcTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, JIT, false) {}

24
llvm/lib/Target/Sparc/SparcTargetMachine.h
View File

@ -16,6 +16,7 @@
#include "SparcInstrInfo.h"
#include "SparcSubtarget.h"
#include "llvm/Target/TargetMachine.h"
#include <optional>
namespace llvm {
@ -24,11 +25,13 @@ class SparcTargetMachine : public LLVMTargetMachine {
SparcSubtarget Subtarget;
bool is64Bit;
mutable StringMap<std::unique_ptr<SparcSubtarget>> SubtargetMap;
public:
SparcTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT, bool is64bit);
Optional<Reloc::Model> RM,
std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL,
bool JIT, bool is64bit);
~SparcTargetMachine() override;
const SparcSubtarget *getSubtargetImpl() const { return &Subtarget; }
@ -45,22 +48,26 @@ public:
///
class SparcV8TargetMachine : public SparcTargetMachine {
virtual void anchor();
public:
SparcV8TargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT);
Optional<Reloc::Model> RM,
std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL,
bool JIT);
};
/// Sparc 64-bit target machine
///
class SparcV9TargetMachine : public SparcTargetMachine {
virtual void anchor();
public:
SparcV9TargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT);
Optional<Reloc::Model> RM,
std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL,
bool JIT);
};
class SparcelTargetMachine : public SparcTargetMachine {
@ -69,8 +76,9 @@ class SparcelTargetMachine : public SparcTargetMachine {
public:
SparcelTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT);
Optional<Reloc::Model> RM,
std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL,
bool JIT);
};
} // end namespace llvm

7
llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp
View File

@ -25,6 +25,7 @@
#include "llvm/Support/CodeGen.h"
#include "llvm/Target/TargetLoweringObjectFile.h"
#include "llvm/Transforms/Scalar.h"
#include <optional>
#include <string>
using namespace llvm;
@ -122,8 +123,8 @@ static Reloc::Model getEffectiveRelocModel(Optional<Reloc::Model> RM) {
// of copy relocs, so locally-binding data symbols might not be in
// the range of LARL. We need the Medium model in that case.
static CodeModel::Model
getEffectiveSystemZCodeModel(Optional<CodeModel::Model> CM, Reloc::Model RM,
bool JIT) {
getEffectiveSystemZCodeModel(std::optional<CodeModel::Model> CM,
Reloc::Model RM, bool JIT) {
if (CM) {
if (*CM == CodeModel::Tiny)
report_fatal_error("Target does not support the tiny CodeModel", false);
@ -140,7 +141,7 @@ SystemZTargetMachine::SystemZTargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS,
const TargetOptions &Options,
Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM,
std::optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT)
: LLVMTargetMachine(
T, computeDataLayout(TT), TT, CPU, FS, Options,

6
llvm/lib/Target/SystemZ/SystemZTargetMachine.h
View File

@ -21,6 +21,7 @@
#include "llvm/Support/CodeGen.h"
#include "llvm/Target/TargetMachine.h"
#include <memory>
#include <optional>
namespace llvm {
@ -32,8 +33,9 @@ class SystemZTargetMachine : public LLVMTargetMachine {
public:
SystemZTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT);
Optional<Reloc::Model> RM,
std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL,
bool JIT);
~SystemZTargetMachine() override;
const SystemZSubtarget *getSubtargetImpl(const Function &) const override;

3
llvm/lib/Target/TargetMachineC.cpp
View File

@ -24,6 +24,7 @@
#include "llvm/Target/CodeGenCWrappers.h"
#include "llvm/Target/TargetMachine.h"
#include <cstring>
#include <optional>
using namespace llvm;
@ -124,7 +125,7 @@ LLVMTargetMachineRef LLVMCreateTargetMachine(LLVMTargetRef T,
}
bool JIT;
Optional<CodeModel::Model> CM = unwrap(CodeModel, JIT);
std::optional<CodeModel::Model> CM = unwrap(CodeModel, JIT);
CodeGenOpt::Level OL;
switch (Level) {

3
llvm/lib/Target/VE/VETargetMachine.cpp
View File

@ -18,6 +18,7 @@
#include "llvm/CodeGen/TargetPassConfig.h"
#include "llvm/IR/LegacyPassManager.h"
#include "llvm/MC/TargetRegistry.h"
#include <optional>
using namespace llvm;
@ -80,7 +81,7 @@ VETargetMachine::VETargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS,
const TargetOptions &Options,
Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM,
std::optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT)
: LLVMTargetMachine(T, computeDataLayout(TT), TT, CPU, FS, Options,
getEffectiveRelocModel(RM),

3
llvm/lib/Target/VE/VETargetMachine.h
View File

@ -16,6 +16,7 @@
#include "VEInstrInfo.h"
#include "VESubtarget.h"
#include "llvm/Target/TargetMachine.h"
#include <optional>
namespace llvm {
@ -29,7 +30,7 @@ class VETargetMachine : public LLVMTargetMachine {
public:
VETargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
Optional<Reloc::Model> RM, std::optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT);
~VETargetMachine() override;

3
llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
View File

@ -32,6 +32,7 @@
#include "llvm/Transforms/Scalar.h"
#include "llvm/Transforms/Scalar/LowerAtomicPass.h"
#include "llvm/Transforms/Utils.h"
#include <optional>
using namespace llvm;
#define DEBUG_TYPE "wasm"
@ -109,7 +110,7 @@ static Reloc::Model getEffectiveRelocModel(Optional<Reloc::Model> RM,
WebAssemblyTargetMachine::WebAssemblyTargetMachine(
const Target &T, const Triple &TT, StringRef CPU, StringRef FS,
const TargetOptions &Options, Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT)
std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT)
: LLVMTargetMachine(
T,
TT.isArch64Bit()

5
llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.h
View File

@ -17,6 +17,7 @@
#include "WebAssemblySubtarget.h"
#include "llvm/Target/TargetMachine.h"
#include <optional>
namespace llvm {
@ -28,8 +29,8 @@ public:
WebAssemblyTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options,
Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM, CodeGenOpt::Level OL,
bool JIT);
std::optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT);
~WebAssemblyTargetMachine() override;

8
llvm/lib/Target/X86/X86TargetMachine.cpp
View File

@ -51,6 +51,7 @@
#include "llvm/Target/TargetOptions.h"
#include "llvm/Transforms/CFGuard.h"
#include <memory>
#include <optional>
#include <string>
using namespace llvm;
@ -204,8 +205,9 @@ static Reloc::Model getEffectiveRelocModel(const Triple &TT,
return *RM;
}
static CodeModel::Model getEffectiveX86CodeModel(Optional<CodeModel::Model> CM,
bool JIT, bool Is64Bit) {
static CodeModel::Model
getEffectiveX86CodeModel(std::optional<CodeModel::Model> CM, bool JIT,
bool Is64Bit) {
if (CM) {
if (*CM == CodeModel::Tiny)
report_fatal_error("Target does not support the tiny CodeModel", false);
@ -222,7 +224,7 @@ X86TargetMachine::X86TargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS,
const TargetOptions &Options,
Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM,
std::optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT)
: LLVMTargetMachine(
T, computeDataLayout(TT), TT, CPU, FS, Options,

6
llvm/lib/Target/X86/X86TargetMachine.h
View File

@ -19,6 +19,7 @@
#include "llvm/Support/CodeGen.h"
#include "llvm/Target/TargetMachine.h"
#include <memory>
#include <optional>
namespace llvm {
@ -34,8 +35,9 @@ class X86TargetMachine final : public LLVMTargetMachine {
public:
X86TargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT);
Optional<Reloc::Model> RM,
std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL,
bool JIT);
~X86TargetMachine() override;
const X86Subtarget *getSubtargetImpl(const Function &F) const override;

5
llvm/lib/Target/XCore/XCoreTargetMachine.cpp
View File

@ -22,6 +22,7 @@
#include "llvm/CodeGen/TargetPassConfig.h"
#include "llvm/MC/TargetRegistry.h"
#include "llvm/Support/CodeGen.h"
#include <optional>
using namespace llvm;
@ -30,7 +31,7 @@ static Reloc::Model getEffectiveRelocModel(Optional<Reloc::Model> RM) {
}
static CodeModel::Model
getEffectiveXCoreCodeModel(Optional<CodeModel::Model> CM) {
getEffectiveXCoreCodeModel(std::optional<CodeModel::Model> CM) {
if (CM) {
if (*CM != CodeModel::Small && *CM != CodeModel::Large)
report_fatal_error("Target only supports CodeModel Small or Large");
@ -45,7 +46,7 @@ XCoreTargetMachine::XCoreTargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS,
const TargetOptions &Options,
Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM,
std::optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT)
: LLVMTargetMachine(
T, "e-m:e-p:32:32-i1:8:32-i8:8:32-i16:16:32-i64:32-f64:32-a:0:32-n32",

6
llvm/lib/Target/XCore/XCoreTargetMachine.h
View File

@ -19,6 +19,7 @@
#include "llvm/Support/CodeGen.h"
#include "llvm/Target/TargetMachine.h"
#include <memory>
#include <optional>
namespace llvm {
class StringRef;
@ -30,8 +31,9 @@ class XCoreTargetMachine : public LLVMTargetMachine {
public:
XCoreTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options,
Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT);
Optional<Reloc::Model> RM,
std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL,
bool JIT);
~XCoreTargetMachine() override;
const XCoreSubtarget *getSubtargetImpl() const { return &Subtarget; }

5
llvm/tools/llc/llc.cpp
View File

@ -56,6 +56,7 @@
#include "llvm/Target/TargetMachine.h"
#include "llvm/Transforms/Utils/Cloning.h"
#include <memory>
#include <optional>
using namespace llvm;
static codegen::RegisterCodeGenFlags CGF;
@ -520,7 +521,7 @@ static int compileModule(char **argv, LLVMContext &Context) {
};
Optional<Reloc::Model> RM = codegen::getExplicitRelocModel();
Optional<CodeModel::Model> CM = codegen::getExplicitCodeModel();
std::optional<CodeModel::Model> CM = codegen::getExplicitCodeModel();
const Target *TheTarget = nullptr;
std::unique_ptr<TargetMachine> Target;
@ -574,7 +575,7 @@ static int compileModule(char **argv, LLVMContext &Context) {
if (!TargetTriple.empty())
M->setTargetTriple(Triple::normalize(TargetTriple));
Optional<CodeModel::Model> CM_IR = M->getCodeModel();
std::optional<CodeModel::Model> CM_IR = M->getCodeModel();
if (!CM && CM_IR)
Target->setCodeModel(CM_IR.value());
} else {