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Merge pull request #70 from THU-DSP-LAB/resource_manage 

[VENTUS][fix] Fix the mechanism of statistical register resources
This commit is contained in:
zhoujingya 2024-02-01 13:17:45 +08:00 committed by GitHub
parent a3fc326ce4 e35b2e4fed
commit 6b17accc5f
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GPG Key ID: B5690EEEBB952194
6 changed files with 94 additions and 19 deletions
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16
llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
View File

@ -86,6 +86,7 @@ public:
private:
void emitAttributes();
int FuncCount = 0;
};
} // namespace
@ -202,14 +203,19 @@ bool RISCVAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
const_cast<VentusProgramInfo *>(STI->getVentusProgramInfo());
if (MF.getInfo<RISCVMachineFunctionInfo>()->isEntryFunction()) {
MCSectionELF *ResourceSection = OutContext.getELFSection(
".ventus.resource", ELF::SHT_PROGBITS, ELF::SHF_WRITE);
".ventus.resource." + MF.getName(), ELF::SHT_PROGBITS, ELF::SHF_WRITE);
OutStreamer->switchSection(ResourceSection);
OutStreamer->emitInt16(CurrentProgramInfo->VGPRUsage);
OutStreamer->emitInt16(CurrentProgramInfo->SGPRUsage);
OutStreamer->emitInt16(CurrentProgramInfo->LDSMemory);
OutStreamer->emitInt16(CurrentProgramInfo->PDSMemory);
OutStreamer->emitInt16(
CurrentProgramInfo->SubProgramInfoVec[FuncCount].VGPRUsage);
OutStreamer->emitInt16(
CurrentProgramInfo->SubProgramInfoVec[FuncCount].SGPRUsage);
OutStreamer->emitInt16(
CurrentProgramInfo->SubProgramInfoVec[FuncCount].LDSMemory);
OutStreamer->emitInt16(
CurrentProgramInfo->SubProgramInfoVec[FuncCount].PDSMemory);
}
FuncCount++;
SetupMachineFunction(MF);
emitFunctionBody();
return false;

17
llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
View File

@ -312,8 +312,11 @@ void RISCVFrameLowering::emitPrologue(MachineFunction &MF,
MachineFrameInfo &MFI = MF.getFrameInfo();
auto *RMFI = MF.getInfo<RISCVMachineFunctionInfo>();
const RISCVRegisterInfo *RI = STI.getRegisterInfo();
auto *CurrentProgramInfo = const_cast<VentusProgramInfo *>(
STI.getVentusProgramInfo());
const MachineRegisterInfo &MRI = MF.getRegInfo();
auto *CurrentRegisterAddedSet = const_cast<DenseSet<unsigned>*>(
STI.getCurrentRegisterAddedSet());
auto *CurrentSubProgramInfo = const_cast<SubVentusProgramInfo*>(
STI.getCurrentSubProgramInfo());
const RISCVInstrInfo *TII = STI.getInstrInfo();
MachineBasicBlock::iterator MBBI = MBB.begin();
bool IsEntryFunction = RMFI->isEntryFunction();
@ -371,9 +374,9 @@ void RISCVFrameLowering::emitPrologue(MachineFunction &MF,
uint64_t SPStackSize = getStackSize(MF, RISCVStackID::SGPRSpill);
uint64_t TPStackSize = getStackSize(MF, RISCVStackID::VGPRSpill);
CurrentProgramInfo->PDSMemory += TPStackSize;
// FIXME: need to add local data declaration calculation
CurrentProgramInfo->LDSMemory += SPStackSize;
CurrentSubProgramInfo->LDSMemory += SPStackSize;
CurrentSubProgramInfo->PDSMemory += TPStackSize;
//uint64_t RealStackSize = IsEntryFunction ?
// SPStackSize + RMFI->getLibCallStackSize() :
// TPStackSize + RMFI->getLibCallStackSize();
@ -394,6 +397,8 @@ void RISCVFrameLowering::emitPrologue(MachineFunction &MF,
// Allocate space on the local-mem stack and private-mem stack if necessary.
if(SPStackSize) {
RI->insertRegToSet(MRI, CurrentRegisterAddedSet, CurrentSubProgramInfo,
SPReg);
RI->adjustReg(MBB, MBBI, DL, SPReg, SPReg,
StackOffset::getFixed(SPStackSize),
MachineInstr::FrameSetup, getStackAlign());
@ -407,6 +412,10 @@ void RISCVFrameLowering::emitPrologue(MachineFunction &MF,
}
if(TPStackSize) {
RI->insertRegToSet(MRI, CurrentRegisterAddedSet, CurrentSubProgramInfo,
TPReg);
RI->insertRegToSet(MRI, CurrentRegisterAddedSet, CurrentSubProgramInfo,
RI->getPrivateMemoryBaseRegister(MF));
RI->adjustReg(MBB, MBBI, DL, TPReg, TPReg,
StackOffset::getFixed(TPStackSize),
MachineInstr::FrameSetup, getStackAlign());

47
llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
View File

@ -172,17 +172,29 @@ MCRegister RISCVRegisterInfo::findUnusedRegister(const MachineRegisterInfo &MRI,
void RISCVRegisterInfo::analyzeRegisterUsage(DenseSet<Register> RewriteRegs,
MachineFunction *MF) const {
auto CurrentProgramInfo = const_cast<VentusProgramInfo*>(
auto *CurrentProgramInfo = const_cast<VentusProgramInfo*>(
MF->getSubtarget<RISCVSubtarget>().getVentusProgramInfo());
MachineRegisterInfo &MRI = MF->getRegInfo();
for(auto Reg : RewriteRegs) {
if(!isSGPRReg(MRI, Reg))
CurrentProgramInfo->VGPRUsage++;
else
CurrentProgramInfo->SGPRUsage++;
}
// FIXME: need to add two more because of ra && sp, how to simplify this?
CurrentProgramInfo->SGPRUsage += 2;
// When accessing a new function, we need to add a new container to calculate
// its resource usage.
CurrentProgramInfo->RegisterAddedSetVec.push_back(DenseSet<unsigned>());
CurrentProgramInfo->SubProgramInfoVec.push_back(SubVentusProgramInfo());
// Gets the container for the resource calculation of the current function.
auto *CurrentRegisterAddedSet = const_cast<DenseSet<unsigned>*>(
MF->getSubtarget<RISCVSubtarget>().getCurrentRegisterAddedSet());
auto *CurrentSubProgramInfo = const_cast<SubVentusProgramInfo*>(
MF->getSubtarget<RISCVSubtarget>().getCurrentSubProgramInfo());
const MachineRegisterInfo &MRI = MF->getRegInfo();
for(auto Reg : RewriteRegs)
insertRegToSet(MRI, CurrentRegisterAddedSet,
CurrentSubProgramInfo, Reg);
// ra register is a special register.
insertRegToSet(MRI, CurrentRegisterAddedSet,
CurrentSubProgramInfo, RISCV::X1);
}
bool RISCVRegisterInfo::isSGPRReg(const MachineRegisterInfo &MRI,
@ -195,6 +207,21 @@ bool RISCVRegisterInfo::isSGPRReg(const MachineRegisterInfo &MRI,
return RC ? isSGPRClass(RC) : false;
}
void RISCVRegisterInfo::insertRegToSet(const MachineRegisterInfo &MRI,
DenseSet<unsigned int> *CurrentRegisterAddedSet,
SubVentusProgramInfo *CurrentSubProgramInfo,
Register Reg) const {
if (CurrentRegisterAddedSet->contains(Reg))
return;
CurrentRegisterAddedSet->insert(Reg);
if (!isSGPRReg(MRI, Reg))
CurrentSubProgramInfo->VGPRUsage++;
else
CurrentSubProgramInfo->SGPRUsage++;
}
const Register RISCVRegisterInfo::getPrivateMemoryBaseRegister(
const MachineFunction &MF) const {
// FIXME: V0-V31 are used for argument registers, so here we use V32 for

6
llvm/lib/Target/RISCV/RISCVRegisterInfo.h
View File

@ -13,6 +13,7 @@
#ifndef LLVM_LIB_TARGET_RISCV_RISCVREGISTERINFO_H
#define LLVM_LIB_TARGET_RISCV_RISCVREGISTERINFO_H
#include "VentusProgramInfo.h"
#include "llvm/CodeGen/TargetRegisterInfo.h"
#define GET_REGINFO_HEADER
@ -62,6 +63,11 @@ struct RISCVRegisterInfo : public RISCVGenRegisterInfo {
bool isSGPRReg(const MachineRegisterInfo &MRI, Register Reg) const;
void insertRegToSet(const MachineRegisterInfo &MRI,
DenseSet<unsigned int> *CurrentRegUsageSet,
SubVentusProgramInfo *CurrentSubProgramInfo,
Register Reg) const;
const uint32_t *getCallPreservedMask(const MachineFunction &MF,
CallingConv::ID) const override;

9
llvm/lib/Target/RISCV/RISCVSubtarget.h
View File

@ -18,6 +18,7 @@
#include "RISCVISelLowering.h"
#include "RISCVInstrInfo.h"
#include "VentusProgramInfo.h"
#include "llvm/ADT/DenseSet.h"
#include "llvm/CodeGen/GlobalISel/CallLowering.h"
#include "llvm/CodeGen/GlobalISel/InstructionSelector.h"
#include "llvm/CodeGen/GlobalISel/LegalizerInfo.h"
@ -150,6 +151,12 @@ public:
const VentusProgramInfo *getVentusProgramInfo() const {
return &CurrentProgramInfo;
}
const DenseSet<unsigned> *getCurrentRegisterAddedSet() const {
return &CurrentProgramInfo.RegisterAddedSetVec[CurrentProgramInfo.RegisterAddedSetVec.size() - 1];
}
const SubVentusProgramInfo *getCurrentSubProgramInfo() const {
return &CurrentProgramInfo.SubProgramInfoVec[CurrentProgramInfo.SubProgramInfoVec.size() - 1];
}
const RISCVRegisterInfo *getRegisterInfo() const override { return &RegInfo; }
const RISCVTargetLowering *getTargetLowering() const override {
return &TLInfo;
@ -305,6 +312,8 @@ public:
void getPostRAMutations(std::vector<std::unique_ptr<ScheduleDAGMutation>>
&Mutations) const override;
};
// VentusProgramInfo RISCVSubtarget::CurrentProgramInfo = VentusProgramInfo();
} // namespace llvm
#endif

18
llvm/lib/Target/RISCV/VentusProgramInfo.h
View File

@ -14,8 +14,20 @@
#define VENTUS_PROGRAM_INFO_H
#include <cstdint>
#include "llvm/ADT/DenseSet.h"
#include "llvm/ADT/SmallVector.h"
namespace llvm {
struct SubVentusProgramInfo {
uint32_t VGPRUsage = 0; // The number of VGPRS which has been used
uint32_t SGPRUsage = 0; // The number of SGPRS which has been used
uint32_t LDSMemory = 0; // Used local memory size
uint32_t PDSMemory = 0; // Used private memory size
SubVentusProgramInfo() = default;
};
struct VentusProgramInfo {
@ -24,6 +36,12 @@ namespace llvm {
uint32_t LDSMemory = 0; // Used local memory size
uint32_t PDSMemory = 0; // Used private memory size
// Record the registers that have been added to prevent repeated additions.
SmallVector<DenseSet<unsigned>> RegisterAddedSetVec;
// Record the resource usage of each function.
SmallVector<SubVentusProgramInfo> SubProgramInfoVec;
VentusProgramInfo() = default;
};