From 41564530d5ea3d00fb1b41959f091cc2df3939d4 Mon Sep 17 00:00:00 2001 From: yanming Date: Fri, 30 Jun 2023 12:03:25 +0800 Subject: [PATCH] [VENTUS][RISCV][Fix] Add PseudoBR when converge return bb in InsertJoinToVBranch pass. --- llvm/lib/Target/RISCV/VentusInsertJoinToVBranch.cpp | 2 ++ 1 file changed, 2 insertions(+) diff --git a/llvm/lib/Target/RISCV/VentusInsertJoinToVBranch.cpp b/llvm/lib/Target/RISCV/VentusInsertJoinToVBranch.cpp index a08ba816c1f7..f650845d01d5 100644 --- a/llvm/lib/Target/RISCV/VentusInsertJoinToVBranch.cpp +++ b/llvm/lib/Target/RISCV/VentusInsertJoinToVBranch.cpp @@ -191,6 +191,8 @@ bool VentusInsertJoinToVBranch::convergeReturnBlock(MachineFunction &MF) { auto &RetMI = RetBB->back(); assert(RetMI.getOpcode() == RISCV::PseudoRET && "Unexpected opcode"); RetMI.eraseFromParent(); + if (RetBB->getFallThrough() != NewRetBB) + BuildMI(RetBB, DebugLoc(), TII->get(RISCV::PseudoBR)).addMBB(NewRetBB); RetBB->addSuccessor(NewRetBB); }